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00036 #ifndef _ASM_ARCH_RTAI_TIMER_H_
00037 #define _ASM_ARCH_RTAI_TIMER_H_
00038
00039 #include <asm/proc/hard_system.h>
00040 #include <linux/sched.h>
00041
00042 #define CPU_FREQ (tuned.cpu_freq)
00043 #define CHECK_TC2_BOUNDS
00044 #define DEBUG_INLINE 0
00045 #if DEBUG_INLINE > 0
00046 #define DI1(x) x
00047 #else
00048 #define DI1(x)
00049 #endif
00050
00051 extern unsigned long rtai_lasttsc;
00052 extern unsigned long rtai_TC2latch;
00053 extern union rtai_tsc rtai_tsc;
00054
00055 union rtai_tsc {
00056 unsigned long long tsc;
00057 unsigned long hltsc[2];
00058 };
00059
00060 static inline int timer_irq_ack( void )
00061 {
00062 return 0;
00063 }
00064
00065
00066
00067
00068
00069
00070
00071
00072
00073
00074 static inline unsigned long long rdtsc(void)
00075 {
00076 unsigned long flags, ticks, act;
00077
00078
00079 hard_save_flags_and_cli(flags);
00080 act = ( unsigned long) (clps_readl(TC1D) & 0xffff);
00081
00082 ticks = (rtai_lasttsc < act) ? (0x10000 - act + rtai_lasttsc) : (rtai_lasttsc - act);
00083 rtai_lasttsc = act;
00084 rtai_tsc.tsc += (unsigned long long) ticks;
00085 hard_restore_flags(flags);
00086 return rtai_tsc.tsc;
00087 }
00088
00089
00090
00091
00092
00093
00094
00095 static inline void rt_set_timer_latch(unsigned long delay)
00096 {
00097 unsigned long flags;
00098 RTIME diff;
00099
00100
00101 hard_save_flags_cli(flags);
00102
00103 diff = rt_times.intr_time - rdtsc();
00104
00105 if (diff < 0)
00106 diff = 1;
00107
00108 DI1( if (delay > LATCH) {
00109 printk("rt_set_timer_latch delay > LATCH :%ld\n",delay);
00110 delay = LATCH;
00111 });
00112
00113 rtai_TC2latch = (!delay ? ((unsigned long*)(&diff))[0] : delay);
00114 #ifdef CHECK_TC2_BOUNDS
00115 if (rtai_TC2latch > LATCH) {
00116 DI1(printk("rt_set_timer_latch > LATCH :%ld\n",rtai_TC2latch));
00117 rtai_TC2latch = LATCH;
00118 }
00119 #endif
00120
00121 if (!rtai_TC2latch) {
00122 DI1(printk("rt_set_timer_latch < 1 :%ld\n",rtai_TC2latch));
00123 rtai_TC2latch = 1;
00124 }
00125 clps_writel(0,TC2EOI);
00126 clps_writel(rtai_TC2latch, TC2D);
00127 clps_writel((clps_readl(INTMR1)|0x200), INTMR1);
00128 hard_restore_flags(flags);
00129 }
00130
00131 #define rt_set_timer_delay(x) rt_set_timer_latch(x)
00132
00133 #endif