LLVM API Documentation

PPCISelDAGToDAG.cpp File Reference

#include "PPC.h"
#include "PPCTargetMachine.h"
#include "PPCISelLowering.h"
#include "PPCHazardRecognizers.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Constants.h"
#include "llvm/GlobalValue.h"
#include "llvm/Intrinsics.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Visibility.h"
#include <iostream>
#include <set>
#include "PPCGenDAGISel.inc"

Include dependency graph for PPCISelDAGToDAG.cpp:

Go to the source code of this file.

Functions

static bool isIntS16Immediate (SDNode *N, short &Imm)
static bool isIntS16Immediate (SDOperand Op, short &Imm)
static bool isInt32Immediate (SDNode *N, unsigned &Imm)
static bool isInt64Immediate (SDNode *N, uint64_t &Imm)
static bool isInt32Immediate (SDOperand N, unsigned &Imm)
static bool isOpcWithIntImmediate (SDNode *N, unsigned Opc, unsigned &Imm)
static bool isRunOfOnes (unsigned Val, unsigned &MB, unsigned &ME)
static bool isRotateAndMask (SDNode *N, unsigned Mask, bool IsShiftMask, unsigned &SH, unsigned &MB, unsigned &ME)
static unsigned getBCCForSetCC (ISD::CondCode CC)
static unsigned getCRIdxForSetCC (ISD::CondCode CC, bool &Inv)
FunctionPassllvm::createPPCISelDag (PPCTargetMachine &TM)

Variables

Statistic FrameOff ("ppc-codegen","Number of frame idx offsets collapsed")


Function Documentation

static unsigned getBCCForSetCC ( ISD::CondCode  CC  )  [static]

getBCCForSetCC - Returns the PowerPC condition branch mnemonic corresponding to Condition.

Definition at line 786 of file PPCISelDAGToDAG.cpp.

References SETEQ, SETGE, SETGT, SETLE, SETLT, SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, and llvm::ISD::SETUO.

static unsigned getCRIdxForSetCC ( ISD::CondCode  CC,
bool &  Inv 
) [static]

getCRIdxForSetCC - Return the index of the condition register field associated with the SetCC condition, and whether or not the field is treated as inverted. That is, lt = 0; ge = 0 inverted.

Definition at line 817 of file PPCISelDAGToDAG.cpp.

References SETEQ, SETGE, SETGT, SETLE, SETLT, SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, and llvm::ISD::SETUO.

static bool isInt32Immediate ( SDOperand  N,
unsigned &  Imm 
) [static]

Definition at line 360 of file PPCISelDAGToDAG.cpp.

References isInt32Immediate(), and llvm::SDOperand::Val.

static bool isInt32Immediate ( SDNode N,
unsigned &  Imm 
) [static]

isInt32Immediate - This method tests to see if the node is a 32-bit constant operand. If so Imm will receive the 32-bit value.

Definition at line 340 of file PPCISelDAGToDAG.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), and llvm::MVT::i32.

Referenced by isInt32Immediate(), isOpcWithIntImmediate(), and isRotateAndMask().

static bool isInt64Immediate ( SDNode N,
uint64_t &  Imm 
) [static]

isInt64Immediate - This method tests to see if the node is a 64-bit constant operand. If so Imm will receive the 64-bit value.

Definition at line 350 of file PPCISelDAGToDAG.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), and llvm::MVT::i32.

static bool isIntS16Immediate ( SDOperand  Op,
short &  Imm 
) [static]

Definition at line 333 of file PPCISelDAGToDAG.cpp.

References isIntS16Immediate(), Op, and llvm::Use::Val.

static bool isIntS16Immediate ( SDNode N,
short &  Imm 
) [static]

isIntS16Immediate - This method tests to see if the node is either a 32-bit or 64-bit immediate, and if the value can be accurately represented as a sign extension from a 16-bit value. If so, this returns true and the immediate.

Definition at line 322 of file PPCISelDAGToDAG.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), and llvm::MVT::i32.

Referenced by isIntS16Immediate().

static bool isOpcWithIntImmediate ( SDNode N,
unsigned  Opc,
unsigned &  Imm 
) [static]

Definition at line 368 of file PPCISelDAGToDAG.cpp.

References llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), isInt32Immediate(), and llvm::SDOperand::Val.

static bool isRotateAndMask ( SDNode N,
unsigned  Mask,
bool  IsShiftMask,
unsigned &  SH,
unsigned &  MB,
unsigned &  ME 
) [static]

Definition at line 400 of file PPCISelDAGToDAG.cpp.

References llvm::SDNode::getNumOperands(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::MVT::i32, isInt32Immediate(), isRunOfOnes(), SHL, llvm::PPCISD::SRL, and llvm::SDOperand::Val.

static bool isRunOfOnes ( unsigned  Val,
unsigned &  MB,
unsigned &  ME 
) [static]

Definition at line 377 of file PPCISelDAGToDAG.cpp.

References llvm::CountLeadingZeros_32(), and llvm::isShiftedMask_32().

Referenced by isRotateAndMask().


Variable Documentation

std::map<SDOperand, SDOperand> CodeGenMap

Definition at line 186 of file PPCISelDAGToDAG.cpp.

Statistic FrameOff("ppc-codegen","Number of frame idx offsets collapsed") [static]

unsigned GlobalBaseReg

Definition at line 46 of file PPCISelDAGToDAG.cpp.

std::map<SDOperand, SDOperand> HandleMap

Definition at line 189 of file PPCISelDAGToDAG.cpp.

std::set<SDNode*> InFlightSet

Definition at line 195 of file PPCISelDAGToDAG.cpp.

PPCTargetLowering PPCLowering

Definition at line 45 of file PPCISelDAGToDAG.cpp.

std::map<SDOperand, SDOperand> ReplaceMap

Definition at line 192 of file PPCISelDAGToDAG.cpp.

PPCTargetMachine& TM

Definition at line 44 of file PPCISelDAGToDAG.cpp.