LLVM API Documentation
00001 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // Top-level implementation for the PowerPC target. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #include "PPC.h" 00015 #include "PPCFrameInfo.h" 00016 #include "PPCTargetMachine.h" 00017 #include "PPCJITInfo.h" 00018 #include "llvm/Module.h" 00019 #include "llvm/PassManager.h" 00020 #include "llvm/Analysis/Verifier.h" 00021 #include "llvm/CodeGen/MachineFunction.h" 00022 #include "llvm/CodeGen/Passes.h" 00023 #include "llvm/Target/TargetOptions.h" 00024 #include "llvm/Target/TargetMachineRegistry.h" 00025 #include "llvm/Transforms/Scalar.h" 00026 #include "llvm/Support/CommandLine.h" 00027 #include <iostream> 00028 using namespace llvm; 00029 00030 namespace { 00031 // Register the targets 00032 RegisterTarget<PPC32TargetMachine> 00033 X("ppc32", " PowerPC 32"); 00034 RegisterTarget<PPC64TargetMachine> 00035 Y("ppc64", " PowerPC 64"); 00036 } 00037 00038 unsigned PPC32TargetMachine::getJITMatchQuality() { 00039 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 00040 if (sizeof(void*) == 4) 00041 return 10; 00042 #endif 00043 return 0; 00044 } 00045 unsigned PPC64TargetMachine::getJITMatchQuality() { 00046 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 00047 if (sizeof(void*) == 8) 00048 return 10; 00049 #endif 00050 return 0; 00051 } 00052 00053 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) { 00054 // We strongly match "powerpc-*". 00055 std::string TT = M.getTargetTriple(); 00056 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-") 00057 return 20; 00058 00059 if (M.getEndianness() == Module::BigEndian && 00060 M.getPointerSize() == Module::Pointer32) 00061 return 10; // Weak match 00062 else if (M.getEndianness() != Module::AnyEndianness || 00063 M.getPointerSize() != Module::AnyPointerSize) 00064 return 0; // Match for some other target 00065 00066 return getJITMatchQuality()/2; 00067 } 00068 00069 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) { 00070 // We strongly match "powerpc64-*". 00071 std::string TT = M.getTargetTriple(); 00072 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-") 00073 return 20; 00074 00075 if (M.getEndianness() == Module::BigEndian && 00076 M.getPointerSize() == Module::Pointer64) 00077 return 10; // Weak match 00078 else if (M.getEndianness() != Module::AnyEndianness || 00079 M.getPointerSize() != Module::AnyPointerSize) 00080 return 0; // Match for some other target 00081 00082 return getJITMatchQuality()/2; 00083 } 00084 00085 00086 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS, 00087 bool is64Bit) 00088 : TargetMachine("PowerPC"), Subtarget(M, FS, is64Bit), 00089 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), 00090 FrameInfo(*this, false), JITInfo(*this), TLInfo(*this), 00091 InstrItins(Subtarget.getInstrItineraryData()) { 00092 00093 if (getRelocationModel() == Reloc::Default) 00094 if (Subtarget.isDarwin()) 00095 setRelocationModel(Reloc::DynamicNoPIC); 00096 else 00097 setRelocationModel(Reloc::PIC_); 00098 } 00099 00100 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS) 00101 : PPCTargetMachine(M, FS, false) { 00102 } 00103 00104 00105 PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS) 00106 : PPCTargetMachine(M, FS, true) { 00107 } 00108 00109 /// addPassesToEmitFile - Add passes to the specified pass manager to implement 00110 /// a static compiler for this target. 00111 /// 00112 bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM, 00113 std::ostream &Out, 00114 CodeGenFileType FileType, 00115 bool Fast) { 00116 if (FileType != TargetMachine::AssemblyFile) return true; 00117 00118 // Run loop strength reduction before anything else. 00119 if (!Fast) PM.add(createLoopStrengthReducePass(&TLInfo)); 00120 00121 // FIXME: Implement efficient support for garbage collection intrinsics. 00122 PM.add(createLowerGCPass()); 00123 00124 // FIXME: Implement the invoke/unwind instructions! 00125 PM.add(createLowerInvokePass()); 00126 00127 // Clean up after other passes, e.g. merging critical edges. 00128 if (!Fast) PM.add(createCFGSimplificationPass()); 00129 00130 // Make sure that no unreachable blocks are instruction selected. 00131 PM.add(createUnreachableBlockEliminationPass()); 00132 00133 // Install an instruction selector. 00134 PM.add(createPPCISelDag(*this)); 00135 00136 if (PrintMachineCode) 00137 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00138 00139 PM.add(createRegisterAllocator()); 00140 00141 if (PrintMachineCode) 00142 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00143 00144 PM.add(createPrologEpilogCodeInserter()); 00145 00146 // Must run branch selection immediately preceding the asm printer 00147 PM.add(createPPCBranchSelectionPass()); 00148 00149 PM.add(createDarwinAsmPrinter(Out, *this)); 00150 00151 PM.add(createMachineCodeDeleter()); 00152 return false; 00153 } 00154 00155 void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 00156 // The JIT should use the static relocation model. 00157 TM.setRelocationModel(Reloc::Static); 00158 00159 // Run loop strength reduction before anything else. 00160 PM.add(createLoopStrengthReducePass(TM.getTargetLowering())); 00161 00162 // FIXME: Implement efficient support for garbage collection intrinsics. 00163 PM.add(createLowerGCPass()); 00164 00165 // FIXME: Implement the invoke/unwind instructions! 00166 PM.add(createLowerInvokePass()); 00167 00168 // Clean up after other passes, e.g. merging critical edges. 00169 PM.add(createCFGSimplificationPass()); 00170 00171 // Make sure that no unreachable blocks are instruction selected. 00172 PM.add(createUnreachableBlockEliminationPass()); 00173 00174 // Install an instruction selector. 00175 PM.add(createPPCISelDag(TM)); 00176 00177 PM.add(createRegisterAllocator()); 00178 PM.add(createPrologEpilogCodeInserter()); 00179 00180 // Must run branch selection immediately preceding the asm printer 00181 PM.add(createPPCBranchSelectionPass()); 00182 00183 if (PrintMachineCode) 00184 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00185 } 00186