LLVM API Documentation
00001 //===-- FPMover.cpp - Sparc double-precision floating point move fixer ----===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // Expand FpMOVD/FpABSD/FpNEGD instructions into their single-precision pieces. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #include "Sparc.h" 00015 #include "SparcSubtarget.h" 00016 #include "llvm/CodeGen/MachineFunctionPass.h" 00017 #include "llvm/CodeGen/MachineInstrBuilder.h" 00018 #include "llvm/Target/TargetMachine.h" 00019 #include "llvm/ADT/Statistic.h" 00020 #include "llvm/Support/Debug.h" 00021 #include <iostream> 00022 using namespace llvm; 00023 00024 namespace { 00025 Statistic<> NumFpDs("fpmover", "Number of instructions translated"); 00026 Statistic<> NoopFpDs("fpmover", "Number of noop instructions removed"); 00027 00028 struct FPMover : public MachineFunctionPass { 00029 /// Target machine description which we query for reg. names, data 00030 /// layout, etc. 00031 /// 00032 TargetMachine &TM; 00033 00034 FPMover(TargetMachine &tm) : TM(tm) { } 00035 00036 virtual const char *getPassName() const { 00037 return "Sparc Double-FP Move Fixer"; 00038 } 00039 00040 bool runOnMachineBasicBlock(MachineBasicBlock &MBB); 00041 bool runOnMachineFunction(MachineFunction &F); 00042 }; 00043 } // end of anonymous namespace 00044 00045 /// createSparcFPMoverPass - Returns a pass that turns FpMOVD 00046 /// instructions into FMOVS instructions 00047 /// 00048 FunctionPass *llvm::createSparcFPMoverPass(TargetMachine &tm) { 00049 return new FPMover(tm); 00050 } 00051 00052 /// getDoubleRegPair - Given a DFP register, return the even and odd FP 00053 /// registers that correspond to it. 00054 static void getDoubleRegPair(unsigned DoubleReg, unsigned &EvenReg, 00055 unsigned &OddReg) { 00056 static const unsigned EvenHalvesOfPairs[] = { 00057 SP::F0, SP::F2, SP::F4, SP::F6, SP::F8, SP::F10, SP::F12, SP::F14, 00058 SP::F16, SP::F18, SP::F20, SP::F22, SP::F24, SP::F26, SP::F28, SP::F30 00059 }; 00060 static const unsigned OddHalvesOfPairs[] = { 00061 SP::F1, SP::F3, SP::F5, SP::F7, SP::F9, SP::F11, SP::F13, SP::F15, 00062 SP::F17, SP::F19, SP::F21, SP::F23, SP::F25, SP::F27, SP::F29, SP::F31 00063 }; 00064 static const unsigned DoubleRegsInOrder[] = { 00065 SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, 00066 SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15 00067 }; 00068 for (unsigned i = 0; i < sizeof(DoubleRegsInOrder)/sizeof(unsigned); ++i) 00069 if (DoubleRegsInOrder[i] == DoubleReg) { 00070 EvenReg = EvenHalvesOfPairs[i]; 00071 OddReg = OddHalvesOfPairs[i]; 00072 return; 00073 } 00074 assert(0 && "Can't find reg"); 00075 } 00076 00077 /// runOnMachineBasicBlock - Fixup FpMOVD instructions in this MBB. 00078 /// 00079 bool FPMover::runOnMachineBasicBlock(MachineBasicBlock &MBB) { 00080 bool Changed = false; 00081 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) { 00082 MachineInstr *MI = I++; 00083 if (MI->getOpcode() == SP::FpMOVD || MI->getOpcode() == SP::FpABSD || 00084 MI->getOpcode() == SP::FpNEGD) { 00085 Changed = true; 00086 unsigned DestDReg = MI->getOperand(0).getReg(); 00087 unsigned SrcDReg = MI->getOperand(1).getReg(); 00088 if (DestDReg == SrcDReg && MI->getOpcode() == SP::FpMOVD) { 00089 MBB.erase(MI); // Eliminate the noop copy. 00090 ++NoopFpDs; 00091 continue; 00092 } 00093 00094 unsigned EvenSrcReg = 0, OddSrcReg = 0, EvenDestReg = 0, OddDestReg = 0; 00095 getDoubleRegPair(DestDReg, EvenDestReg, OddDestReg); 00096 getDoubleRegPair(SrcDReg, EvenSrcReg, OddSrcReg); 00097 00098 if (MI->getOpcode() == SP::FpMOVD) 00099 MI->setOpcode(SP::FMOVS); 00100 else if (MI->getOpcode() == SP::FpNEGD) 00101 MI->setOpcode(SP::FNEGS); 00102 else if (MI->getOpcode() == SP::FpABSD) 00103 MI->setOpcode(SP::FABSS); 00104 else 00105 assert(0 && "Unknown opcode!"); 00106 00107 MI->getOperand(0).setReg(EvenDestReg); 00108 MI->getOperand(1).setReg(EvenSrcReg); 00109 DEBUG(std::cerr << "FPMover: the modified instr is: " << *MI); 00110 // Insert copy for the other half of the double. 00111 if (DestDReg != SrcDReg) { 00112 MI = BuildMI(MBB, I, SP::FMOVS, 1, OddDestReg).addReg(OddSrcReg); 00113 DEBUG(std::cerr << "FPMover: the inserted instr is: " << *MI); 00114 } 00115 ++NumFpDs; 00116 } 00117 } 00118 return Changed; 00119 } 00120 00121 bool FPMover::runOnMachineFunction(MachineFunction &F) { 00122 // If the target has V9 instructions, the fp-mover pseudos will never be 00123 // emitted. Avoid a scan of the instructions to improve compile time. 00124 if (TM.getSubtarget<SparcSubtarget>().isV9()) 00125 return false; 00126 00127 bool Changed = false; 00128 for (MachineFunction::iterator FI = F.begin(), FE = F.end(); 00129 FI != FE; ++FI) 00130 Changed |= runOnMachineBasicBlock(*FI); 00131 return Changed; 00132 }