LLVM API Documentation

SparcInstrInfo.cpp

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00001 //===- SparcInstrInfo.cpp - Sparc Instruction Information -------*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file contains the Sparc implementation of the TargetInstrInfo class.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #include "SparcInstrInfo.h"
00015 #include "Sparc.h"
00016 #include "llvm/CodeGen/MachineInstrBuilder.h"
00017 #include "SparcGenInstrInfo.inc"
00018 using namespace llvm;
00019 
00020 SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST)
00021   : TargetInstrInfo(SparcInsts, sizeof(SparcInsts)/sizeof(SparcInsts[0])),
00022     RI(ST) {
00023 }
00024 
00025 static bool isZeroImm(const MachineOperand &op) {
00026   return op.isImmediate() && op.getImmedValue() == 0;
00027 }
00028 
00029 /// Return true if the instruction is a register to register move and
00030 /// leave the source and dest operands in the passed parameters.
00031 ///
00032 bool SparcInstrInfo::isMoveInstr(const MachineInstr &MI,
00033                                  unsigned &SrcReg, unsigned &DstReg) const {
00034   // We look for 3 kinds of patterns here:
00035   // or with G0 or 0
00036   // add with G0 or 0
00037   // fmovs or FpMOVD (pseudo double move).
00038   if (MI.getOpcode() == SP::ORrr || MI.getOpcode() == SP::ADDrr) {
00039     if (MI.getOperand(1).getReg() == SP::G0) {
00040       DstReg = MI.getOperand(0).getReg();
00041       SrcReg = MI.getOperand(2).getReg();
00042       return true;
00043     } else if (MI.getOperand(2).getReg() == SP::G0) {
00044       DstReg = MI.getOperand(0).getReg();
00045       SrcReg = MI.getOperand(1).getReg();
00046       return true;
00047     }
00048   } else if ((MI.getOpcode() == SP::ORri || MI.getOpcode() == SP::ADDri) &&
00049              isZeroImm(MI.getOperand(2)) && MI.getOperand(1).isRegister()) {
00050     DstReg = MI.getOperand(0).getReg();
00051     SrcReg = MI.getOperand(1).getReg();
00052     return true;
00053   } else if (MI.getOpcode() == SP::FMOVS || MI.getOpcode() == SP::FpMOVD ||
00054              MI.getOpcode() == SP::FMOVD) {
00055     SrcReg = MI.getOperand(1).getReg();
00056     DstReg = MI.getOperand(0).getReg();
00057     return true;
00058   }
00059   return false;
00060 }
00061 
00062 /// isLoadFromStackSlot - If the specified machine instruction is a direct
00063 /// load from a stack slot, return the virtual or physical register number of
00064 /// the destination along with the FrameIndex of the loaded stack slot.  If
00065 /// not, return 0.  This predicate must return 0 if the instruction has
00066 /// any side effects other than loading from the stack slot.
00067 unsigned SparcInstrInfo::isLoadFromStackSlot(MachineInstr *MI,
00068                                              int &FrameIndex) const {
00069   if (MI->getOpcode() == SP::LDri ||
00070       MI->getOpcode() == SP::LDFri ||
00071       MI->getOpcode() == SP::LDDFri) {
00072     if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
00073         MI->getOperand(2).getImmedValue() == 0) {
00074       FrameIndex = MI->getOperand(1).getFrameIndex();
00075       return MI->getOperand(0).getReg();
00076     }
00077   }
00078   return 0;
00079 }
00080 
00081 /// isStoreToStackSlot - If the specified machine instruction is a direct
00082 /// store to a stack slot, return the virtual or physical register number of
00083 /// the source reg along with the FrameIndex of the loaded stack slot.  If
00084 /// not, return 0.  This predicate must return 0 if the instruction has
00085 /// any side effects other than storing to the stack slot.
00086 unsigned SparcInstrInfo::isStoreToStackSlot(MachineInstr *MI,
00087                                             int &FrameIndex) const {
00088   if (MI->getOpcode() == SP::STri ||
00089       MI->getOpcode() == SP::STFri ||
00090       MI->getOpcode() == SP::STDFri) {
00091     if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() &&
00092         MI->getOperand(1).getImmedValue() == 0) {
00093       FrameIndex = MI->getOperand(0).getFrameIndex();
00094       return MI->getOperand(2).getReg();
00095     }
00096   }
00097   return 0;
00098 }