LLVM API Documentation

PromoteMemToReg.h

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00001 //===- PromoteMemToReg.h - Promote Allocas to Scalars -----------*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file exposes an interface to promote alloca instructions to SSA
00011 // registers, by using the SSA construction algorithm.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef TRANSFORMS_UTILS_PROMOTEMEMTOREG_H
00016 #define TRANSFORMS_UTILS_PROMOTEMEMTOREG_H
00017 
00018 #include <vector>
00019 
00020 namespace llvm {
00021 
00022 class AllocaInst;
00023 struct DominatorTree;
00024 struct DominanceFrontier;
00025 class TargetData;
00026 class AliasSetTracker;
00027 
00028 /// isAllocaPromotable - Return true if this alloca is legal for promotion.
00029 /// This is true if there are only loads and stores to the alloca...
00030 ///
00031 bool isAllocaPromotable(const AllocaInst *AI, const TargetData &TD);
00032 
00033 /// PromoteMemToReg - Promote the specified list of alloca instructions into
00034 /// scalar registers, inserting PHI nodes as appropriate.  This function makes
00035 /// use of DominanceFrontier information.  This function does not modify the CFG
00036 /// of the function at all.  All allocas must be from the same function.
00037 ///
00038 /// If AST is specified, the specified tracker is updated to reflect changes
00039 /// made to the IR.
00040 ///
00041 void PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
00042                      DominatorTree &DT, DominanceFrontier &DF,
00043                      const TargetData &TD, AliasSetTracker *AST = 0);
00044 
00045 } // End llvm namespace
00046 
00047 #endif