LLVM API Documentation
00001 //===- TableGen'erated file -------------------------------------*- C++ -*-===// 00002 // 00003 // Assembly Writer Source Fragment 00004 // 00005 // Automatically generated file, do not edit! 00006 // 00007 //===----------------------------------------------------------------------===// 00008 00009 /// printInstruction - This method is automatically generated by tablegen 00010 /// from the instruction set description. This method returns true if the 00011 /// machine instruction was sufficiently described to print it, otherwise 00012 /// it returns false. 00013 bool X86IntelAsmPrinter::printInstruction(const MachineInstr *MI) { 00014 static const char * const OpStrs[] = { 00015 "PHINODE\n", // PHI 00016 0, // INLINEASM 00017 "adc ", // ADC32mi 00018 "adc ", // ADC32mi8 00019 "adc ", // ADC32mr 00020 "adc ", // ADC32ri 00021 "adc ", // ADC32ri8 00022 "adc ", // ADC32rm 00023 "adc ", // ADC32rr 00024 "add ", // ADD16mi 00025 "add ", // ADD16mi8 00026 "add ", // ADD16mr 00027 "add ", // ADD16ri 00028 "add ", // ADD16ri8 00029 "add ", // ADD16rm 00030 "add ", // ADD16rr 00031 "add ", // ADD32mi 00032 "add ", // ADD32mi8 00033 "add ", // ADD32mr 00034 "add ", // ADD32ri 00035 "add ", // ADD32ri8 00036 "add ", // ADD32rm 00037 "add ", // ADD32rr 00038 "add ", // ADD8mi 00039 "add ", // ADD8mr 00040 "add ", // ADD8ri 00041 "add ", // ADD8rm 00042 "add ", // ADD8rr 00043 "addpd ", // ADDPDrm 00044 "addpd ", // ADDPDrr 00045 "addps ", // ADDPSrm 00046 "addps ", // ADDPSrr 00047 "addsd ", // ADDSDrm 00048 "addsd ", // ADDSDrr 00049 "addss ", // ADDSSrm 00050 "addss ", // ADDSSrr 00051 "#ADJCALLSTACKDOWN\n", // ADJCALLSTACKDOWN 00052 "#ADJCALLSTACKUP\n", // ADJCALLSTACKUP 00053 "add ", // ADJSTACKPTRri 00054 "and ", // AND16mi 00055 "and ", // AND16mi8 00056 "and ", // AND16mr 00057 "and ", // AND16ri 00058 "and ", // AND16ri8 00059 "and ", // AND16rm 00060 "and ", // AND16rr 00061 "and ", // AND32mi 00062 "and ", // AND32mi8 00063 "and ", // AND32mr 00064 "and ", // AND32ri 00065 "and ", // AND32ri8 00066 "and ", // AND32rm 00067 "and ", // AND32rr 00068 "and ", // AND8mi 00069 "and ", // AND8mr 00070 "and ", // AND8ri 00071 "and ", // AND8rm 00072 "and ", // AND8rr 00073 "andnpd ", // ANDNPDrm 00074 "andnpd ", // ANDNPDrr 00075 "andnps ", // ANDNPSrm 00076 "andnps ", // ANDNPSrr 00077 "andpd ", // ANDPDrm 00078 "andpd ", // ANDPDrr 00079 "andps ", // ANDPSrm 00080 "andps ", // ANDPSrr 00081 "bswap ", // BSWAP32r 00082 "call ", // CALL32m 00083 "call ", // CALL32r 00084 "call ", // CALLpcrel32 00085 "cbw\n", // CBW 00086 "cdq\n", // CDQ 00087 "cmova ", // CMOVA16rm 00088 "cmova ", // CMOVA16rr 00089 "cmova ", // CMOVA32rm 00090 "cmova ", // CMOVA32rr 00091 "cmovae ", // CMOVAE16rm 00092 "cmovae ", // CMOVAE16rr 00093 "cmovae ", // CMOVAE32rm 00094 "cmovae ", // CMOVAE32rr 00095 "cmovb ", // CMOVB16rm 00096 "cmovb ", // CMOVB16rr 00097 "cmovb ", // CMOVB32rm 00098 "cmovb ", // CMOVB32rr 00099 "cmovbe ", // CMOVBE16rm 00100 "cmovbe ", // CMOVBE16rr 00101 "cmovbe ", // CMOVBE32rm 00102 "cmovbe ", // CMOVBE32rr 00103 "cmove ", // CMOVE16rm 00104 "cmove ", // CMOVE16rr 00105 "cmove ", // CMOVE32rm 00106 "cmove ", // CMOVE32rr 00107 "cmovg ", // CMOVG16rm 00108 "cmovg ", // CMOVG16rr 00109 "cmovg ", // CMOVG32rm 00110 "cmovg ", // CMOVG32rr 00111 "cmovge ", // CMOVGE16rm 00112 "cmovge ", // CMOVGE16rr 00113 "cmovge ", // CMOVGE32rm 00114 "cmovge ", // CMOVGE32rr 00115 "cmovl ", // CMOVL16rm 00116 "cmovl ", // CMOVL16rr 00117 "cmovl ", // CMOVL32rm 00118 "cmovl ", // CMOVL32rr 00119 "cmovle ", // CMOVLE16rm 00120 "cmovle ", // CMOVLE16rr 00121 "cmovle ", // CMOVLE32rm 00122 "cmovle ", // CMOVLE32rr 00123 "cmovne ", // CMOVNE16rm 00124 "cmovne ", // CMOVNE16rr 00125 "cmovne ", // CMOVNE32rm 00126 "cmovne ", // CMOVNE32rr 00127 "cmovnp ", // CMOVNP16rm 00128 "cmovnp ", // CMOVNP16rr 00129 "cmovnp ", // CMOVNP32rm 00130 "cmovnp ", // CMOVNP32rr 00131 "cmovns ", // CMOVNS16rm 00132 "cmovns ", // CMOVNS16rr 00133 "cmovns ", // CMOVNS32rm 00134 "cmovns ", // CMOVNS32rr 00135 "cmovp ", // CMOVP16rm 00136 "cmovp ", // CMOVP16rr 00137 "cmovp ", // CMOVP32rm 00138 "cmovp ", // CMOVP32rr 00139 "cmovs ", // CMOVS16rm 00140 "cmovs ", // CMOVS16rr 00141 "cmovs ", // CMOVS32rm 00142 "cmovs ", // CMOVS32rr 00143 "#CMOV_FR32 PSEUDO!\n", // CMOV_FR32 00144 "#CMOV_FR64 PSEUDO!\n", // CMOV_FR64 00145 "#CMOV_V2F64 PSEUDO!\n", // CMOV_V2F64 00146 "#CMOV_V2I64 PSEUDO!\n", // CMOV_V2I64 00147 "#CMOV_V4F32 PSEUDO!\n", // CMOV_V4F32 00148 "cmp ", // CMP16mi 00149 "cmp ", // CMP16mi8 00150 "cmp ", // CMP16mr 00151 "cmp ", // CMP16ri 00152 "cmp ", // CMP16ri8 00153 "cmp ", // CMP16rm 00154 "cmp ", // CMP16rr 00155 "cmp ", // CMP32mi 00156 "cmp ", // CMP32mi8 00157 "cmp ", // CMP32mr 00158 "cmp ", // CMP32ri 00159 "cmp ", // CMP32ri8 00160 "cmp ", // CMP32rm 00161 "cmp ", // CMP32rr 00162 "cmp ", // CMP8mi 00163 "cmp ", // CMP8mr 00164 "cmp ", // CMP8ri 00165 "cmp ", // CMP8rm 00166 "cmp ", // CMP8rr 00167 "cmp", // CMPPDrm 00168 "cmp", // CMPPDrr 00169 "cmp", // CMPPSrm 00170 "cmp", // CMPPSrr 00171 "cmp", // CMPSDrm 00172 "cmp", // CMPSDrr 00173 "cmp", // CMPSSrm 00174 "cmp", // CMPSSrr 00175 "cvtdq2pd ", // CVTDQ2PDrm 00176 "cvtdq2pd ", // CVTDQ2PDrr 00177 "cvtdq2ps ", // CVTDQ2PSrm 00178 "cvtdq2ps ", // CVTDQ2PSrr 00179 "cvtpd2dq ", // CVTPD2DQrm 00180 "cvtpd2dq ", // CVTPD2DQrr 00181 "cvtpd2pi ", // CVTPD2PIrm 00182 "cvtpd2pi ", // CVTPD2PIrr 00183 "cvtpd2ps ", // CVTPD2PSrm 00184 "cvtpd2ps ", // CVTPD2PSrr 00185 "cvtpi2pd ", // CVTPI2PDrm 00186 "cvtpi2pd ", // CVTPI2PDrr 00187 "cvtpi2ps ", // CVTPI2PSrm 00188 "cvtpi2ps ", // CVTPI2PSrr 00189 "cvtps2dq ", // CVTPS2DQrm 00190 "cvtps2dq ", // CVTPS2DQrr 00191 "cvtps2pd ", // CVTPS2PDrm 00192 "cvtps2pd ", // CVTPS2PDrr 00193 "cvtps2pi ", // CVTPS2PIrm 00194 "cvtps2pi ", // CVTPS2PIrr 00195 "cvtsd2si ", // CVTSD2SIrm 00196 "cvtsd2si ", // CVTSD2SIrr 00197 "cvtsd2ss ", // CVTSD2SSrm 00198 "cvtsd2ss ", // CVTSD2SSrr 00199 "cvtsi2sd ", // CVTSI2SDrm 00200 "cvtsi2sd ", // CVTSI2SDrr 00201 "cvtsi2ss ", // CVTSI2SSrm 00202 "cvtsi2ss ", // CVTSI2SSrr 00203 "cvtss2sd ", // CVTSS2SDrm 00204 "cvtss2sd ", // CVTSS2SDrr 00205 "cvtss2si ", // CVTSS2SIrm 00206 "cvtss2si ", // CVTSS2SIrr 00207 "cvttpd2dq ", // CVTTPD2DQrm 00208 "cvttpd2dq ", // CVTTPD2DQrr 00209 "cvttps2dq ", // CVTTPS2DQrm 00210 "cvttps2dq ", // CVTTPS2DQrr 00211 "cvttps2pi ", // CVTTPS2PIrm 00212 "cvttps2pi ", // CVTTPS2PIrr 00213 "cvttsd2si ", // CVTTSD2SIrm 00214 "cvttsd2si ", // CVTTSD2SIrr 00215 "cvttss2si ", // CVTTSS2SIrm 00216 "cvttss2si ", // CVTTSS2SIrr 00217 "cwd\n", // CWD 00218 "dec ", // DEC16m 00219 "dec ", // DEC16r 00220 "dec ", // DEC32m 00221 "dec ", // DEC32r 00222 "dec ", // DEC8m 00223 "dec ", // DEC8r 00224 "div ", // DIV16m 00225 "div ", // DIV16r 00226 "div ", // DIV32m 00227 "div ", // DIV32r 00228 "div ", // DIV8m 00229 "div ", // DIV8r 00230 "divpd ", // DIVPDrm 00231 "divpd ", // DIVPDrr 00232 "divps ", // DIVPSrm 00233 "divps ", // DIVPSrr 00234 "divsd ", // DIVSDrm 00235 "divsd ", // DIVSDrr 00236 "divss ", // DIVSSrm 00237 "divss ", // DIVSSrr 00238 "\nLdebug_loc", // DWARF_LABEL 00239 "; .loc ", // DWARF_LOC 00240 "fabs\n", // FABS 00241 "fadd ", // FADD32m 00242 "fadd ", // FADD64m 00243 "faddp ", // FADDPrST0 00244 "fadd ", // FADDST0r 00245 "fadd ", // FADDrST0 00246 "fchs\n", // FCHS 00247 "fcmovb %ST(0), ", // FCMOVB 00248 "fcmovbe %ST(0), ", // FCMOVBE 00249 "fcmove %ST(0), ", // FCMOVE 00250 "fcmovnb %ST(0), ", // FCMOVNB 00251 "fcmovnbe %ST(0), ", // FCMOVNBE 00252 "fcmovne %ST(0), ", // FCMOVNE 00253 "fcmovnu %ST(0), ", // FCMOVNP 00254 "fcmovu %ST(0), ", // FCMOVP 00255 "fcos\n", // FCOS 00256 "fdiv ", // FDIV32m 00257 "fdiv ", // FDIV64m 00258 "fdivp ", // FDIVPrST0 00259 "fdivr ", // FDIVR32m 00260 "fdivr ", // FDIVR64m 00261 "fdivrp ", // FDIVRPrST0 00262 "fdivr ", // FDIVRST0r 00263 "fdivr ", // FDIVRrST0 00264 "fdiv ", // FDIVST0r 00265 "fdiv ", // FDIVrST0 00266 "fiadd ", // FIADD16m 00267 "fiadd ", // FIADD32m 00268 "fidiv ", // FIDIV16m 00269 "fidiv ", // FIDIV32m 00270 "fidivr ", // FIDIVR16m 00271 "fidivr ", // FIDIVR32m 00272 "fild ", // FILD16m 00273 "fild ", // FILD32m 00274 "fild ", // FILD64m 00275 "fimul ", // FIMUL16m 00276 "fimul ", // FIMUL32m 00277 "fist ", // FIST16m 00278 "fist ", // FIST32m 00279 "fistp ", // FISTP16m 00280 "fistp ", // FISTP32m 00281 "fistp ", // FISTP64m 00282 "fisttp ", // FISTTP16m 00283 "fisttp ", // FISTTP32m 00284 "fisttp ", // FISTTP64m 00285 "fisub ", // FISUB16m 00286 "fisub ", // FISUB32m 00287 "fisubr ", // FISUBR16m 00288 "fisubr ", // FISUBR32m 00289 "fldz\n", // FLD0 00290 "fld1\n", // FLD1 00291 "fld ", // FLD32m 00292 "fld ", // FLD64m 00293 "fldcw ", // FLDCW16m 00294 "fld ", // FLDrr 00295 "fmul ", // FMUL32m 00296 "fmul ", // FMUL64m 00297 "fmulp ", // FMULPrST0 00298 "fmul ", // FMULST0r 00299 "fmul ", // FMULrST0 00300 "fnstcw ", // FNSTCW16m 00301 "fnstsw\n", // FNSTSW8r 00302 "#FP_REG_KILL\n", // FP_REG_KILL 00303 "#FP_TO_INT16_IN_MEM PSEUDO!\n", // FP_TO_INT16_IN_MEM 00304 "#FP_TO_INT32_IN_MEM PSEUDO!\n", // FP_TO_INT32_IN_MEM 00305 "#FP_TO_INT64_IN_MEM PSEUDO!\n", // FP_TO_INT64_IN_MEM 00306 "fsin\n", // FSIN 00307 "fsqrt\n", // FSQRT 00308 "fst ", // FST32m 00309 "fst ", // FST64m 00310 "fstp ", // FSTP32m 00311 "fstp ", // FSTP64m 00312 "fstp ", // FSTPrr 00313 "fst ", // FSTrr 00314 "fsub ", // FSUB32m 00315 "fsub ", // FSUB64m 00316 "fsubp ", // FSUBPrST0 00317 "fsubr ", // FSUBR32m 00318 "fsubr ", // FSUBR64m 00319 "fsubrp ", // FSUBRPrST0 00320 "fsubr ", // FSUBRST0r 00321 "fsubr ", // FSUBRrST0 00322 "fsub ", // FSUBST0r 00323 "fsub ", // FSUBrST0 00324 "ftst\n", // FTST 00325 "fucomip %ST(0), ", // FUCOMIPr 00326 "fucomi %ST(0), ", // FUCOMIr 00327 "fucompp\n", // FUCOMPPr 00328 "fucomp ", // FUCOMPr 00329 "fucom ", // FUCOMr 00330 "fxch ", // FXCH 00331 0, // FpABS 00332 0, // FpADD 00333 0, // FpADD32m 00334 0, // FpADD64m 00335 0, // FpCHS 00336 0, // FpCMOVB 00337 0, // FpCMOVBE 00338 0, // FpCMOVE 00339 0, // FpCMOVNB 00340 0, // FpCMOVNBE 00341 0, // FpCMOVNE 00342 0, // FpCMOVNP 00343 0, // FpCMOVP 00344 0, // FpCOS 00345 0, // FpDIV 00346 0, // FpDIV32m 00347 0, // FpDIV64m 00348 0, // FpDIVR32m 00349 0, // FpDIVR64m 00350 0, // FpGETRESULT 00351 0, // FpIADD16m 00352 0, // FpIADD32m 00353 0, // FpIDIV16m 00354 0, // FpIDIV32m 00355 0, // FpIDIVR16m 00356 0, // FpIDIVR32m 00357 0, // FpILD16m 00358 0, // FpILD32m 00359 0, // FpILD64m 00360 0, // FpIMUL16m 00361 0, // FpIMUL32m 00362 0, // FpIST16m 00363 0, // FpIST32m 00364 0, // FpIST64m 00365 0, // FpISTT16m 00366 0, // FpISTT32m 00367 0, // FpISTT64m 00368 0, // FpISUB16m 00369 0, // FpISUB32m 00370 0, // FpISUBR16m 00371 0, // FpISUBR32m 00372 0, // FpLD0 00373 0, // FpLD1 00374 0, // FpLD32m 00375 0, // FpLD64m 00376 0, // FpMOV 00377 0, // FpMUL 00378 0, // FpMUL32m 00379 0, // FpMUL64m 00380 0, // FpSETRESULT 00381 0, // FpSIN 00382 0, // FpSQRT 00383 0, // FpST32m 00384 0, // FpST64m 00385 0, // FpSTP32m 00386 0, // FpSTP64m 00387 0, // FpSUB 00388 0, // FpSUB32m 00389 0, // FpSUB64m 00390 0, // FpSUBR32m 00391 0, // FpSUBR64m 00392 0, // FpTST 00393 0, // FpUCOMIr 00394 0, // FpUCOMr 00395 "andnpd ", // FsANDNPDrm 00396 "andnpd ", // FsANDNPDrr 00397 "andnps ", // FsANDNPSrm 00398 "andnps ", // FsANDNPSrr 00399 "andpd ", // FsANDPDrm 00400 "andpd ", // FsANDPDrr 00401 "andps ", // FsANDPSrm 00402 "andps ", // FsANDPSrr 00403 "pxor ", // FsFLD0SD 00404 "pxor ", // FsFLD0SS 00405 "movapd ", // FsMOVAPDrm 00406 "movapd ", // FsMOVAPDrr 00407 "movaps ", // FsMOVAPSrm 00408 "movaps ", // FsMOVAPSrr 00409 "orpd ", // FsORPDrm 00410 "orpd ", // FsORPDrr 00411 "orps ", // FsORPSrm 00412 "orps ", // FsORPSrr 00413 "xorpd ", // FsXORPDrm 00414 "xorpd ", // FsXORPDrr 00415 "xorps ", // FsXORPSrm 00416 "xorps ", // FsXORPSrr 00417 "haddpd ", // HADDPDrm 00418 "haddpd ", // HADDPDrr 00419 "haddps ", // HADDPSrm 00420 "haddps ", // HADDPSrr 00421 "hsubpd ", // HSUBPDrm 00422 "hsubpd ", // HSUBPDrr 00423 "hsubps ", // HSUBPSrm 00424 "hsubps ", // HSUBPSrr 00425 "idiv ", // IDIV16m 00426 "idiv ", // IDIV16r 00427 "idiv ", // IDIV32m 00428 "idiv ", // IDIV32r 00429 "idiv ", // IDIV8m 00430 "idiv ", // IDIV8r 00431 "#IMPLICIT_DEF\n", // IMPLICIT_DEF 00432 "#IMPLICIT_DEF ", // IMPLICIT_DEF_FR32 00433 "#IMPLICIT_DEF ", // IMPLICIT_DEF_FR64 00434 "#IMPLICIT_DEF ", // IMPLICIT_DEF_R16 00435 "#IMPLICIT_DEF ", // IMPLICIT_DEF_R32 00436 "#IMPLICIT_DEF ", // IMPLICIT_DEF_R8 00437 "#IMPLICIT_DEF ", // IMPLICIT_DEF_VR128 00438 "#IMPLICIT_DEF ", // IMPLICIT_DEF_VR64 00439 "#IMPLICIT_USE\n", // IMPLICIT_USE 00440 "imul ", // IMUL16m 00441 "imul ", // IMUL16r 00442 "imul ", // IMUL16rm 00443 "imul ", // IMUL16rmi 00444 "imul ", // IMUL16rmi8 00445 "imul ", // IMUL16rr 00446 "imul ", // IMUL16rri 00447 "imul ", // IMUL16rri8 00448 "imul ", // IMUL32m 00449 "imul ", // IMUL32r 00450 "imul ", // IMUL32rm 00451 "imul ", // IMUL32rmi 00452 "imul ", // IMUL32rmi8 00453 "imul ", // IMUL32rr 00454 "imul ", // IMUL32rri 00455 "imul ", // IMUL32rri8 00456 "imul ", // IMUL8m 00457 "imul ", // IMUL8r 00458 "in %AX, ", // IN16ri 00459 "in %AX, %DX\n", // IN16rr 00460 "in %EAX, ", // IN32ri 00461 "in %EAX, %DX\n", // IN32rr 00462 "in %AL, ", // IN8ri 00463 "in %AL, %DX\n", // IN8rr 00464 "inc ", // INC16m 00465 "inc ", // INC16r 00466 "inc ", // INC32m 00467 "inc ", // INC32r 00468 "inc ", // INC8m 00469 "inc ", // INC8r 00470 "addsd ", // Int_ADDSDrm 00471 "addsd ", // Int_ADDSDrr 00472 "addss ", // Int_ADDSSrm 00473 "addss ", // Int_ADDSSrr 00474 "cmp", // Int_CMPSDrm 00475 "cmp", // Int_CMPSDrr 00476 "cmp", // Int_CMPSSrm 00477 "cmp", // Int_CMPSSrr 00478 "comisd ", // Int_COMISDrm 00479 "comisd ", // Int_COMISDrr 00480 "comiss ", // Int_COMISSrm 00481 "comiss ", // Int_COMISSrr 00482 "cvtsd2ss ", // Int_CVTSD2SSrm 00483 "cvtsd2ss ", // Int_CVTSD2SSrr 00484 "cvtsi2sd ", // Int_CVTSI2SDrm 00485 "cvtsi2sd ", // Int_CVTSI2SDrr 00486 "cvtsi2ss ", // Int_CVTSI2SSrm 00487 "cvtsi2ss ", // Int_CVTSI2SSrr 00488 "cvtss2sd ", // Int_CVTSS2SDrm 00489 "cvtss2sd ", // Int_CVTSS2SDrr 00490 "cvttsd2si ", // Int_CVTTSD2SIrm 00491 "cvttsd2si ", // Int_CVTTSD2SIrr 00492 "cvttss2si ", // Int_CVTTSS2SIrm 00493 "cvttss2si ", // Int_CVTTSS2SIrr 00494 "divsd ", // Int_DIVSDrm 00495 "divsd ", // Int_DIVSDrr 00496 "divss ", // Int_DIVSSrm 00497 "divss ", // Int_DIVSSrr 00498 "maxsd ", // Int_MAXSDrm 00499 "maxsd ", // Int_MAXSDrr 00500 "maxss ", // Int_MAXSSrm 00501 "maxss ", // Int_MAXSSrr 00502 "minsd ", // Int_MINSDrm 00503 "minsd ", // Int_MINSDrr 00504 "minss ", // Int_MINSSrm 00505 "minss ", // Int_MINSSrr 00506 "mulsd ", // Int_MULSDrm 00507 "mulsd ", // Int_MULSDrr 00508 "mulss ", // Int_MULSSrm 00509 "mulss ", // Int_MULSSrr 00510 "rcpss ", // Int_RCPSSm 00511 "rcpss ", // Int_RCPSSr 00512 "rsqrtss ", // Int_RSQRTSSm 00513 "rsqrtss ", // Int_RSQRTSSr 00514 "sqrtsd ", // Int_SQRTSDm 00515 "sqrtsd ", // Int_SQRTSDr 00516 "sqrtss ", // Int_SQRTSSm 00517 "sqrtss ", // Int_SQRTSSr 00518 "subsd ", // Int_SUBSDrm 00519 "subsd ", // Int_SUBSDrr 00520 "subss ", // Int_SUBSSrm 00521 "subss ", // Int_SUBSSrr 00522 "ucomisd ", // Int_UCOMISDrm 00523 "ucomisd ", // Int_UCOMISDrr 00524 "ucomiss ", // Int_UCOMISSrm 00525 "ucomiss ", // Int_UCOMISSrr 00526 "ja ", // JA 00527 "jae ", // JAE 00528 "jb ", // JB 00529 "jbe ", // JBE 00530 "je ", // JE 00531 "jg ", // JG 00532 "jge ", // JGE 00533 "jl ", // JL 00534 "jle ", // JLE 00535 "jmp ", // JMP 00536 "jne ", // JNE 00537 "jno ", // JNO 00538 "jnp ", // JNP 00539 "jns ", // JNS 00540 "jo ", // JO 00541 "jp ", // JP 00542 "js ", // JS 00543 "lahf\n", // LAHF 00544 "ldmxcsr ", // LDMXCSR 00545 "lea ", // LEA16r 00546 "lea ", // LEA32r 00547 "leave\n", // LEAVE 00548 "maskmovdqu ", // MASKMOVDQU 00549 "maskmovq ", // MASKMOVQ 00550 "maxpd ", // MAXPDrm 00551 "maxpd ", // MAXPDrr 00552 "maxps ", // MAXPSrm 00553 "maxps ", // MAXPSrr 00554 "maxsd ", // MAXSDrm 00555 "maxsd ", // MAXSDrr 00556 "maxss ", // MAXSSrm 00557 "maxss ", // MAXSSrr 00558 "minpd ", // MINPDrm 00559 "minpd ", // MINPDrr 00560 "minps ", // MINPSrm 00561 "minps ", // MINPSrr 00562 "minsd ", // MINSDrm 00563 "minsd ", // MINSDrr 00564 "minss ", // MINSSrm 00565 "minss ", // MINSSrr 00566 "mov ", // MOV16mi 00567 "mov ", // MOV16mr 00568 "xor ", // MOV16r0 00569 "mov ", // MOV16ri 00570 "mov ", // MOV16rm 00571 "mov ", // MOV16rr 00572 "mov ", // MOV32mi 00573 "mov ", // MOV32mr 00574 "xor ", // MOV32r0 00575 "mov ", // MOV32ri 00576 "mov ", // MOV32rm 00577 "mov ", // MOV32rr 00578 "mov ", // MOV8mi 00579 "mov ", // MOV8mr 00580 "xor ", // MOV8r0 00581 "mov ", // MOV8ri 00582 "mov ", // MOV8rm 00583 "mov ", // MOV8rr 00584 "movapd ", // MOVAPDmr 00585 "movapd ", // MOVAPDrm 00586 "movapd ", // MOVAPDrr 00587 "movaps ", // MOVAPSmr 00588 "movaps ", // MOVAPSrm 00589 "movaps ", // MOVAPSrr 00590 "movd ", // MOVD64mr 00591 "movd ", // MOVD64rm 00592 "movd ", // MOVD64rr 00593 "movd ", // MOVDI2PDIrm 00594 "movd ", // MOVDI2PDIrr 00595 "movdqa ", // MOVDQAmr 00596 "movdqa ", // MOVDQArm 00597 "movdqa ", // MOVDQArr 00598 "movdqu ", // MOVDQUmr 00599 "movdqu ", // MOVDQUrm 00600 "movhlps ", // MOVHLPSrr 00601 "movhpd ", // MOVHPDmr 00602 "movhpd ", // MOVHPDrm 00603 "movhps ", // MOVHPSmr 00604 "movhps ", // MOVHPSrm 00605 "movd ", // MOVLDI2PDIrr 00606 "movlhps ", // MOVLHPSrr 00607 "movlpd ", // MOVLPDmr 00608 "movlpd ", // MOVLPDrm 00609 "movsd ", // MOVLPDrr 00610 "movlps ", // MOVLPSmr 00611 "movlps ", // MOVLPSrm 00612 "movss ", // MOVLPSrr 00613 "movq ", // MOVLQ128mr 00614 "movq ", // MOVLQ128rr 00615 "movsd ", // MOVLSD2PDrr 00616 "movss ", // MOVLSS2PSrr 00617 "movmskpd ", // MOVMSKPDrr 00618 "movmskps ", // MOVMSKPSrr 00619 "movntdq ", // MOVNTDQmr 00620 "movnti ", // MOVNTImr 00621 "movntpd ", // MOVNTPDmr 00622 "movntps ", // MOVNTPSmr 00623 "movntq ", // MOVNTQ 00624 "movsd ", // MOVPD2SDrr 00625 "movd ", // MOVPDI2DImr 00626 "movd ", // MOVPDI2DIrr 00627 "movss ", // MOVPS2SSmr 00628 "movss ", // MOVPS2SSrr 00629 "movq ", // MOVQ64mr 00630 "movq ", // MOVQ64rm 00631 "movq ", // MOVQ64rr 00632 "movq ", // MOVQI2PQIrm 00633 "movq ", // MOVQI2PQIrr 00634 "movsd ", // MOVSD2PDrm 00635 "movsd ", // MOVSD2PDrr 00636 "movsd ", // MOVSDmr 00637 "movsd ", // MOVSDrm 00638 "movsd ", // MOVSDrr 00639 "movss ", // MOVSS2PSrm 00640 "movss ", // MOVSS2PSrr 00641 "movss ", // MOVSSmr 00642 "movss ", // MOVSSrm 00643 "movss ", // MOVSSrr 00644 "movsx ", // MOVSX16rm8 00645 "movsx ", // MOVSX16rr8 00646 "movsx ", // MOVSX32rm16 00647 "movsx ", // MOVSX32rm8 00648 "movsx ", // MOVSX32rr16 00649 "movsx ", // MOVSX32rr8 00650 "movupd ", // MOVUPDmr 00651 "movupd ", // MOVUPDrm 00652 "movupd ", // MOVUPDrr 00653 "movups ", // MOVUPSmr 00654 "movups ", // MOVUPSrm 00655 "movups ", // MOVUPSrr 00656 "movd ", // MOVZDI2PDIrm 00657 "movq ", // MOVZQI2PQIrm 00658 "movsd ", // MOVZSD2PDrm 00659 "movss ", // MOVZSS2PSrm 00660 "movzx ", // MOVZX16rm8 00661 "movzx ", // MOVZX16rr8 00662 "movzx ", // MOVZX32rm16 00663 "movzx ", // MOVZX32rm8 00664 "movzx ", // MOVZX32rr16 00665 "movzx ", // MOVZX32rr8 00666 "mul ", // MUL16m 00667 "mul ", // MUL16r 00668 "mul ", // MUL32m 00669 "mul ", // MUL32r 00670 "mul ", // MUL8m 00671 "mul ", // MUL8r 00672 "mulpd ", // MULPDrm 00673 "mulpd ", // MULPDrr 00674 "mulps ", // MULPSrm 00675 "mulps ", // MULPSrr 00676 "mulsd ", // MULSDrm 00677 "mulsd ", // MULSDrr 00678 "mulss ", // MULSSrm 00679 "mulss ", // MULSSrr 00680 "call ", // MovePCtoStack 00681 "neg ", // NEG16m 00682 "neg ", // NEG16r 00683 "neg ", // NEG32m 00684 "neg ", // NEG32r 00685 "neg ", // NEG8m 00686 "neg ", // NEG8r 00687 "nop\n", // NOOP 00688 "not ", // NOT16m 00689 "not ", // NOT16r 00690 "not ", // NOT32m 00691 "not ", // NOT32r 00692 "not ", // NOT8m 00693 "not ", // NOT8r 00694 "or ", // OR16mi 00695 "or ", // OR16mi8 00696 "or ", // OR16mr 00697 "or ", // OR16ri 00698 "or ", // OR16ri8 00699 "or ", // OR16rm 00700 "or ", // OR16rr 00701 "or ", // OR32mi 00702 "or ", // OR32mi8 00703 "or ", // OR32mr 00704 "or ", // OR32ri 00705 "or ", // OR32ri8 00706 "or ", // OR32rm 00707 "or ", // OR32rr 00708 "or ", // OR8mi 00709 "or ", // OR8mr 00710 "or ", // OR8ri 00711 "or ", // OR8rm 00712 "or ", // OR8rr 00713 "orpd ", // ORPDrm 00714 "orpd ", // ORPDrr 00715 "orps ", // ORPSrm 00716 "orps ", // ORPSrr 00717 "out ", // OUT16ir 00718 "out %DX, %AX\n", // OUT16rr 00719 "out ", // OUT32ir 00720 "out %DX, %EAX\n", // OUT32rr 00721 "out ", // OUT8ir 00722 "out %DX, %AL\n", // OUT8rr 00723 "packssdw ", // PACKSSDWrm 00724 "packssdw ", // PACKSSDWrr 00725 "packsswb ", // PACKSSWBrm 00726 "packsswb ", // PACKSSWBrr 00727 "packuswb ", // PACKUSWBrm 00728 "packuswb ", // PACKUSWBrr 00729 "paddb ", // PADDBrm 00730 "paddb ", // PADDBrr 00731 "paddd ", // PADDDrm 00732 "paddd ", // PADDDrr 00733 "paddd ", // PADDQrm 00734 "paddq ", // PADDQrr 00735 "paddsb ", // PADDSBrm 00736 "paddsb ", // PADDSBrr 00737 "paddsw ", // PADDSWrm 00738 "paddsw ", // PADDSWrr 00739 "paddusb ", // PADDUSBrm 00740 "paddusb ", // PADDUSBrr 00741 "paddusw ", // PADDUSWrm 00742 "paddusw ", // PADDUSWrr 00743 "paddw ", // PADDWrm 00744 "paddw ", // PADDWrr 00745 "pandn ", // PANDNrm 00746 "pandn ", // PANDNrr 00747 "pand ", // PANDrm 00748 "pand ", // PANDrr 00749 "pavgb ", // PAVGBrm 00750 "pavgb ", // PAVGBrr 00751 "pavgw ", // PAVGWrm 00752 "pavgw ", // PAVGWrr 00753 "pextrw ", // PEXTRWm 00754 "pextrw ", // PEXTRWr 00755 "pinsrw ", // PINSRWm 00756 "pinsrw ", // PINSRWr 00757 "pmaddwd ", // PMADDWDrm 00758 "pmaddwd ", // PMADDWDrr 00759 "pmaxsw ", // PMAXSWrm 00760 "pmaxsw ", // PMAXSWrr 00761 "pmaxub ", // PMAXUBrm 00762 "pmaxub ", // PMAXUBrr 00763 "pminsw ", // PMINSWrm 00764 "pminsw ", // PMINSWrr 00765 "pminub ", // PMINUBrm 00766 "pminub ", // PMINUBrr 00767 "pmovmskb ", // PMOVMSKBrr 00768 "pmulhuw ", // PMULHUWrm 00769 "pmulhuw ", // PMULHUWrr 00770 "pmulhw ", // PMULHWrm 00771 "pmulhw ", // PMULHWrr 00772 "pmullw ", // PMULLWrm 00773 "pmullw ", // PMULLWrr 00774 "pmuludq ", // PMULUDQrm 00775 "pmuludq ", // PMULUDQrr 00776 "pop ", // POP32r 00777 "por ", // PORrm 00778 "por ", // PORrr 00779 "prefetcht0 ", // PREFETCHT0 00780 "prefetcht1 ", // PREFETCHT1 00781 "prefetcht2 ", // PREFETCHT2 00782 "prefetchtnta ", // PREFETCHTNTA 00783 "psadbw ", // PSADBWrm 00784 "psadbw ", // PSADBWrr 00785 "pshufd ", // PSHUFDmi 00786 "pshufd ", // PSHUFDri 00787 "pshufhw ", // PSHUFHWmi 00788 "pshufhw ", // PSHUFHWri 00789 "pshuflw ", // PSHUFLWmi 00790 "pshuflw ", // PSHUFLWri 00791 "pshufw ", // PSHUFWmi 00792 "pshufw ", // PSHUFWri 00793 "pslldq ", // PSLLDQri 00794 "psrldq ", // PSRLDQri 00795 "psubb ", // PSUBBrm 00796 "psubb ", // PSUBBrr 00797 "psubd ", // PSUBDrm 00798 "psubd ", // PSUBDrr 00799 "psubd ", // PSUBQrm 00800 "psubq ", // PSUBQrr 00801 "psubsb ", // PSUBSBrm 00802 "psubsb ", // PSUBSBrr 00803 "psubsw ", // PSUBSWrm 00804 "psubsw ", // PSUBSWrr 00805 "psubusb ", // PSUBUSBrm 00806 "psubusb ", // PSUBUSBrr 00807 "psubusw ", // PSUBUSWrm 00808 "psubusw ", // PSUBUSWrr 00809 "psubw ", // PSUBWrm 00810 "psubw ", // PSUBWrr 00811 "punpckhbw ", // PUNPCKHBWrm 00812 "punpckhbw ", // PUNPCKHBWrr 00813 "punpckhdq ", // PUNPCKHDQrm 00814 "punpckhdq ", // PUNPCKHDQrr 00815 "punpckhqdq ", // PUNPCKHQDQrm 00816 "punpckhdq ", // PUNPCKHQDQrr 00817 "punpckhwd ", // PUNPCKHWDrm 00818 "punpckhwd ", // PUNPCKHWDrr 00819 "punpcklbw ", // PUNPCKLBWrm 00820 "punpcklbw ", // PUNPCKLBWrr 00821 "punpckldq ", // PUNPCKLDQrm 00822 "punpckldq ", // PUNPCKLDQrr 00823 "punpcklqdq ", // PUNPCKLQDQrm 00824 "punpcklqdq ", // PUNPCKLQDQrr 00825 "punpcklwd ", // PUNPCKLWDrm 00826 "punpcklwd ", // PUNPCKLWDrr 00827 "pxor ", // PXORrm 00828 "pxor ", // PXORrr 00829 "rcpps ", // RCPPSm 00830 "rcpps ", // RCPPSr 00831 "rcpss ", // RCPSSm 00832 "rcpss ", // RCPSSr 00833 "rdtsc\n", // RDTSC 00834 "rep movsb\n", // REP_MOVSB 00835 "rep movsd\n", // REP_MOVSD 00836 "rep movsw\n", // REP_MOVSW 00837 "rep stosb\n", // REP_STOSB 00838 "rep stosd\n", // REP_STOSD 00839 "rep stosw\n", // REP_STOSW 00840 "ret\n", // RET 00841 "ret ", // RETI 00842 "rol ", // ROL16mCL 00843 "rol ", // ROL16mi 00844 "rol ", // ROL16rCL 00845 "rol ", // ROL16ri 00846 "rol ", // ROL32mCL 00847 "rol ", // ROL32mi 00848 "rol ", // ROL32rCL 00849 "rol ", // ROL32ri 00850 "rol ", // ROL8mCL 00851 "rol ", // ROL8mi 00852 "rol ", // ROL8rCL 00853 "rol ", // ROL8ri 00854 "ror ", // ROR16mCL 00855 "ror ", // ROR16mi 00856 "ror ", // ROR16rCL 00857 "ror ", // ROR16ri 00858 "ror ", // ROR32mCL 00859 "ror ", // ROR32mi 00860 "ror ", // ROR32rCL 00861 "ror ", // ROR32ri 00862 "ror ", // ROR8mCL 00863 "ror ", // ROR8mi 00864 "ror ", // ROR8rCL 00865 "ror ", // ROR8ri 00866 "rsqrtps ", // RSQRTPSm 00867 "rsqrtps ", // RSQRTPSr 00868 "rsqrtss ", // RSQRTSSm 00869 "rsqrtss ", // RSQRTSSr 00870 "sahf\n", // SAHF 00871 "sar ", // SAR16mCL 00872 "sar ", // SAR16mi 00873 "sar ", // SAR16rCL 00874 "sar ", // SAR16ri 00875 "sar ", // SAR32mCL 00876 "sar ", // SAR32mi 00877 "sar ", // SAR32rCL 00878 "sar ", // SAR32ri 00879 "sar ", // SAR8mCL 00880 "sar ", // SAR8mi 00881 "sar ", // SAR8rCL 00882 "sar ", // SAR8ri 00883 "sbb ", // SBB32mi 00884 "sbb ", // SBB32mi8 00885 "sbb ", // SBB32mr 00886 "sbb ", // SBB32ri 00887 "sbb ", // SBB32ri8 00888 "sbb ", // SBB32rm 00889 "sbb ", // SBB32rr 00890 "sbb ", // SBB8mi 00891 "setae ", // SETAEm 00892 "setae ", // SETAEr 00893 "seta ", // SETAm 00894 "seta ", // SETAr 00895 "setbe ", // SETBEm 00896 "setbe ", // SETBEr 00897 "setb ", // SETBm 00898 "setb ", // SETBr 00899 "sete ", // SETEm 00900 "sete ", // SETEr 00901 "setge ", // SETGEm 00902 "setge ", // SETGEr 00903 "setg ", // SETGm 00904 "setg ", // SETGr 00905 "setle ", // SETLEm 00906 "setle ", // SETLEr 00907 "setl ", // SETLm 00908 "setl ", // SETLr 00909 "setne ", // SETNEm 00910 "setne ", // SETNEr 00911 "setnp ", // SETNPm 00912 "setnp ", // SETNPr 00913 "setns ", // SETNSm 00914 "setns ", // SETNSr 00915 "setp ", // SETPm 00916 "setp ", // SETPr 00917 "sets ", // SETSm 00918 "sets ", // SETSr 00919 "sfence\n", // SFENCE 00920 "shl ", // SHL16mCL 00921 "shl ", // SHL16mi 00922 "shl ", // SHL16rCL 00923 "shl ", // SHL16ri 00924 "shl ", // SHL32mCL 00925 "shl ", // SHL32mi 00926 "shl ", // SHL32rCL 00927 "shl ", // SHL32ri 00928 "shl ", // SHL8mCL 00929 "shl ", // SHL8mi 00930 "shl ", // SHL8rCL 00931 "shl ", // SHL8ri 00932 "shld ", // SHLD16mrCL 00933 "shld ", // SHLD16mri8 00934 "shld ", // SHLD16rrCL 00935 "shld ", // SHLD16rri8 00936 "shld ", // SHLD32mrCL 00937 "shld ", // SHLD32mri8 00938 "shld ", // SHLD32rrCL 00939 "shld ", // SHLD32rri8 00940 "shr ", // SHR16mCL 00941 "shr ", // SHR16mi 00942 "shr ", // SHR16rCL 00943 "shr ", // SHR16ri 00944 "shr ", // SHR32mCL 00945 "shr ", // SHR32mi 00946 "shr ", // SHR32rCL 00947 "shr ", // SHR32ri 00948 "shr ", // SHR8mCL 00949 "shr ", // SHR8mi 00950 "shr ", // SHR8rCL 00951 "shr ", // SHR8ri 00952 "shrd ", // SHRD16mrCL 00953 "shrd ", // SHRD16mri8 00954 "shrd ", // SHRD16rrCL 00955 "shrd ", // SHRD16rri8 00956 "shrd ", // SHRD32mrCL 00957 "shrd ", // SHRD32mri8 00958 "shrd ", // SHRD32rrCL 00959 "shrd ", // SHRD32rri8 00960 "shufpd ", // SHUFPDrm 00961 "shufpd ", // SHUFPDrr 00962 "shufps ", // SHUFPSrm 00963 "shufps ", // SHUFPSrr 00964 "sqrtpd ", // SQRTPDm 00965 "sqrtpd ", // SQRTPDr 00966 "sqrtps ", // SQRTPSm 00967 "sqrtps ", // SQRTPSr 00968 "sqrtsd ", // SQRTSDm 00969 "sqrtsd ", // SQRTSDr 00970 "sqrtss ", // SQRTSSm 00971 "sqrtss ", // SQRTSSr 00972 "stmxcsr ", // STMXCSR 00973 "sub ", // SUB16mi 00974 "sub ", // SUB16mi8 00975 "sub ", // SUB16mr 00976 "sub ", // SUB16ri 00977 "sub ", // SUB16ri8 00978 "sub ", // SUB16rm 00979 "sub ", // SUB16rr 00980 "sub ", // SUB32mi 00981 "sub ", // SUB32mi8 00982 "sub ", // SUB32mr 00983 "sub ", // SUB32ri 00984 "sub ", // SUB32ri8 00985 "sub ", // SUB32rm 00986 "sub ", // SUB32rr 00987 "sub ", // SUB8mi 00988 "sub ", // SUB8mr 00989 "sub ", // SUB8ri 00990 "sub ", // SUB8rm 00991 "sub ", // SUB8rr 00992 "subpd ", // SUBPDrm 00993 "subpd ", // SUBPDrr 00994 "subps ", // SUBPSrm 00995 "subps ", // SUBPSrr 00996 "subsd ", // SUBSDrm 00997 "subsd ", // SUBSDrr 00998 "subss ", // SUBSSrm 00999 "subss ", // SUBSSrr 01000 "jmp ", // TAILJMPd 01001 "jmp ", // TAILJMPm 01002 "jmp ", // TAILJMPr 01003 "test ", // TEST16mi 01004 "test ", // TEST16mr 01005 "test ", // TEST16ri 01006 "test ", // TEST16rm 01007 "test ", // TEST16rr 01008 "test ", // TEST32mi 01009 "test ", // TEST32mr 01010 "test ", // TEST32ri 01011 "test ", // TEST32rm 01012 "test ", // TEST32rr 01013 "test ", // TEST8mi 01014 "test ", // TEST8mr 01015 "test ", // TEST8ri 01016 "test ", // TEST8rm 01017 "test ", // TEST8rr 01018 "ucomisd ", // UCOMISDrm 01019 "ucomisd ", // UCOMISDrr 01020 "ucomiss ", // UCOMISSrm 01021 "ucomiss ", // UCOMISSrr 01022 "unpckhpd ", // UNPCKHPDrm 01023 "unpckhpd ", // UNPCKHPDrr 01024 "unpckhps ", // UNPCKHPSrm 01025 "unpckhps ", // UNPCKHPSrr 01026 "unpcklpd ", // UNPCKLPDrm 01027 "unpcklpd ", // UNPCKLPDrr 01028 "unpcklps ", // UNPCKLPSrm 01029 "unpcklps ", // UNPCKLPSrr 01030 "xorpd ", // V_SET0_PD 01031 "pxor ", // V_SET0_PI 01032 "xorps ", // V_SET0_PS 01033 "pcmpeqd ", // V_SETALLONES 01034 "xchg ", // XCHG16mr 01035 "xchg ", // XCHG16rm 01036 "xchg ", // XCHG16rr 01037 "xchg ", // XCHG32mr 01038 "xchg ", // XCHG32rm 01039 "xchg ", // XCHG32rr 01040 "xchg ", // XCHG8mr 01041 "xchg ", // XCHG8rm 01042 "xchg ", // XCHG8rr 01043 "xor ", // XOR16mi 01044 "xor ", // XOR16mi8 01045 "xor ", // XOR16mr 01046 "xor ", // XOR16ri 01047 "xor ", // XOR16ri8 01048 "xor ", // XOR16rm 01049 "xor ", // XOR16rr 01050 "xor ", // XOR32mi 01051 "xor ", // XOR32mi8 01052 "xor ", // XOR32mr 01053 "xor ", // XOR32ri 01054 "xor ", // XOR32ri8 01055 "xor ", // XOR32rm 01056 "xor ", // XOR32rr 01057 "xor ", // XOR8mi 01058 "xor ", // XOR8mr 01059 "xor ", // XOR8ri 01060 "xor ", // XOR8rm 01061 "xor ", // XOR8rr 01062 "xorpd ", // XORPDrm 01063 "xorpd ", // XORPDrr 01064 "xorps ", // XORPSrm 01065 "xorps ", // XORPSrr 01066 }; 01067 01068 // Emit the opcode for the instruction. 01069 if (const char *AsmStr = OpStrs[MI->getOpcode()]) 01070 O << AsmStr; 01071 01072 switch (MI->getOpcode()) { 01073 default: return false; 01074 case X86::INLINEASM: printInlineAsm(MI); break; 01075 case X86::ADC32mi: 01076 case X86::ADC32mi8: 01077 case X86::ADC32mr: 01078 case X86::ADD16mi: 01079 case X86::ADD16mi8: 01080 case X86::ADD16mr: 01081 case X86::ADD32mi: 01082 case X86::ADD32mi8: 01083 case X86::ADD32mr: 01084 case X86::ADD8mi: 01085 case X86::ADD8mr: 01086 case X86::AND16mi: 01087 case X86::AND16mi8: 01088 case X86::AND16mr: 01089 case X86::AND32mi: 01090 case X86::AND32mi8: 01091 case X86::AND32mr: 01092 case X86::AND8mi: 01093 case X86::AND8mr: 01094 case X86::CMP16mi: 01095 case X86::CMP16mi8: 01096 case X86::CMP16mr: 01097 case X86::CMP32mi: 01098 case X86::CMP32mi8: 01099 case X86::CMP32mr: 01100 case X86::CMP8mi: 01101 case X86::CMP8mr: 01102 case X86::MOV16mi: 01103 case X86::MOV16mr: 01104 case X86::MOV32mi: 01105 case X86::MOV32mr: 01106 case X86::MOV8mi: 01107 case X86::MOV8mr: 01108 case X86::MOVAPDmr: 01109 case X86::MOVAPSmr: 01110 case X86::MOVD64mr: 01111 case X86::MOVDQAmr: 01112 case X86::MOVDQUmr: 01113 case X86::MOVHPDmr: 01114 case X86::MOVHPSmr: 01115 case X86::MOVLPDmr: 01116 case X86::MOVLPSmr: 01117 case X86::MOVLQ128mr: 01118 case X86::MOVNTDQmr: 01119 case X86::MOVNTImr: 01120 case X86::MOVNTPDmr: 01121 case X86::MOVNTPSmr: 01122 case X86::MOVNTQ: 01123 case X86::MOVPDI2DImr: 01124 case X86::MOVPS2SSmr: 01125 case X86::MOVQ64mr: 01126 case X86::MOVSDmr: 01127 case X86::MOVSSmr: 01128 case X86::MOVUPDmr: 01129 case X86::MOVUPSmr: 01130 case X86::OR16mi: 01131 case X86::OR16mi8: 01132 case X86::OR16mr: 01133 case X86::OR32mi: 01134 case X86::OR32mi8: 01135 case X86::OR32mr: 01136 case X86::OR8mi: 01137 case X86::OR8mr: 01138 case X86::ROL16mi: 01139 case X86::ROL32mi: 01140 case X86::ROL8mi: 01141 case X86::ROR16mi: 01142 case X86::ROR32mi: 01143 case X86::ROR8mi: 01144 case X86::SAR16mi: 01145 case X86::SAR32mi: 01146 case X86::SAR8mi: 01147 case X86::SBB32mi: 01148 case X86::SBB32mi8: 01149 case X86::SBB32mr: 01150 case X86::SBB8mi: 01151 case X86::SHL16mi: 01152 case X86::SHL32mi: 01153 case X86::SHL8mi: 01154 case X86::SHR16mi: 01155 case X86::SHR32mi: 01156 case X86::SHR8mi: 01157 case X86::SUB16mi: 01158 case X86::SUB16mi8: 01159 case X86::SUB16mr: 01160 case X86::SUB32mi: 01161 case X86::SUB32mi8: 01162 case X86::SUB32mr: 01163 case X86::SUB8mi: 01164 case X86::SUB8mr: 01165 case X86::TEST16mi: 01166 case X86::TEST16mr: 01167 case X86::TEST32mi: 01168 case X86::TEST32mr: 01169 case X86::TEST8mi: 01170 case X86::TEST8mr: 01171 case X86::XCHG16mr: 01172 case X86::XCHG32mr: 01173 case X86::XCHG8mr: 01174 case X86::XOR16mi: 01175 case X86::XOR16mi8: 01176 case X86::XOR16mr: 01177 case X86::XOR32mi: 01178 case X86::XOR32mi8: 01179 case X86::XOR32mr: 01180 case X86::XOR8mi: 01181 case X86::XOR8mr: 01182 switch (MI->getOpcode()) { 01183 case X86::ADC32mi: 01184 case X86::ADC32mi8: 01185 case X86::ADC32mr: 01186 case X86::ADD32mi: 01187 case X86::ADD32mi8: 01188 case X86::ADD32mr: 01189 case X86::AND32mi: 01190 case X86::AND32mi8: 01191 case X86::AND32mr: 01192 case X86::CMP32mi: 01193 case X86::CMP32mi8: 01194 case X86::CMP32mr: 01195 case X86::MOV32mi: 01196 case X86::MOV32mr: 01197 case X86::MOVD64mr: 01198 case X86::MOVNTImr: 01199 case X86::MOVPDI2DImr: 01200 case X86::OR32mi: 01201 case X86::OR32mi8: 01202 case X86::OR32mr: 01203 case X86::ROL32mi: 01204 case X86::ROR32mi: 01205 case X86::SAR32mi: 01206 case X86::SBB32mi: 01207 case X86::SBB32mi8: 01208 case X86::SBB32mr: 01209 case X86::SHL32mi: 01210 case X86::SHR32mi: 01211 case X86::SUB32mi: 01212 case X86::SUB32mi8: 01213 case X86::SUB32mr: 01214 case X86::TEST32mi: 01215 case X86::TEST32mr: 01216 case X86::XCHG32mr: 01217 case X86::XOR32mi: 01218 case X86::XOR32mi8: 01219 case X86::XOR32mr: printi32mem(MI, 0); break; 01220 case X86::ADD16mi: 01221 case X86::ADD16mi8: 01222 case X86::ADD16mr: 01223 case X86::AND16mi: 01224 case X86::AND16mi8: 01225 case X86::AND16mr: 01226 case X86::CMP16mi: 01227 case X86::CMP16mi8: 01228 case X86::CMP16mr: 01229 case X86::MOV16mi: 01230 case X86::MOV16mr: 01231 case X86::OR16mi: 01232 case X86::OR16mi8: 01233 case X86::OR16mr: 01234 case X86::ROL16mi: 01235 case X86::ROR16mi: 01236 case X86::SAR16mi: 01237 case X86::SHL16mi: 01238 case X86::SHR16mi: 01239 case X86::SUB16mi: 01240 case X86::SUB16mi8: 01241 case X86::SUB16mr: 01242 case X86::TEST16mi: 01243 case X86::TEST16mr: 01244 case X86::XCHG16mr: 01245 case X86::XOR16mi: 01246 case X86::XOR16mi8: 01247 case X86::XOR16mr: printi16mem(MI, 0); break; 01248 case X86::ADD8mi: 01249 case X86::ADD8mr: 01250 case X86::AND8mi: 01251 case X86::AND8mr: 01252 case X86::CMP8mi: 01253 case X86::CMP8mr: 01254 case X86::MOV8mi: 01255 case X86::MOV8mr: 01256 case X86::OR8mi: 01257 case X86::OR8mr: 01258 case X86::ROL8mi: 01259 case X86::ROR8mi: 01260 case X86::SAR8mi: 01261 case X86::SBB8mi: 01262 case X86::SHL8mi: 01263 case X86::SHR8mi: 01264 case X86::SUB8mi: 01265 case X86::SUB8mr: 01266 case X86::TEST8mi: 01267 case X86::TEST8mr: 01268 case X86::XCHG8mr: 01269 case X86::XOR8mi: 01270 case X86::XOR8mr: printi8mem(MI, 0); break; 01271 case X86::MOVAPDmr: 01272 case X86::MOVAPSmr: 01273 case X86::MOVNTDQmr: 01274 case X86::MOVUPDmr: 01275 case X86::MOVUPSmr: printf128mem(MI, 0); break; 01276 case X86::MOVDQAmr: 01277 case X86::MOVDQUmr: 01278 case X86::MOVNTPDmr: 01279 case X86::MOVNTPSmr: printi128mem(MI, 0); break; 01280 case X86::MOVHPDmr: 01281 case X86::MOVHPSmr: 01282 case X86::MOVLPDmr: 01283 case X86::MOVLPSmr: 01284 case X86::MOVSDmr: printf64mem(MI, 0); break; 01285 case X86::MOVLQ128mr: 01286 case X86::MOVNTQ: 01287 case X86::MOVQ64mr: printi64mem(MI, 0); break; 01288 case X86::MOVPS2SSmr: 01289 case X86::MOVSSmr: printf32mem(MI, 0); break; 01290 } 01291 O << ", "; 01292 printOperand(MI, 4); 01293 O << "\n"; 01294 break; 01295 case X86::ADC32ri: 01296 case X86::ADC32ri8: 01297 case X86::ADC32rm: 01298 case X86::ADC32rr: 01299 case X86::ADD16ri: 01300 case X86::ADD16ri8: 01301 case X86::ADD16rm: 01302 case X86::ADD16rr: 01303 case X86::ADD32ri: 01304 case X86::ADD32ri8: 01305 case X86::ADD32rm: 01306 case X86::ADD32rr: 01307 case X86::ADD8ri: 01308 case X86::ADD8rm: 01309 case X86::ADD8rr: 01310 case X86::ADDPDrm: 01311 case X86::ADDPDrr: 01312 case X86::ADDPSrm: 01313 case X86::ADDPSrr: 01314 case X86::ADDSDrm: 01315 case X86::ADDSDrr: 01316 case X86::ADDSSrm: 01317 case X86::ADDSSrr: 01318 case X86::ADJSTACKPTRri: 01319 case X86::AND16ri: 01320 case X86::AND16ri8: 01321 case X86::AND16rm: 01322 case X86::AND16rr: 01323 case X86::AND32ri: 01324 case X86::AND32ri8: 01325 case X86::AND32rm: 01326 case X86::AND32rr: 01327 case X86::AND8ri: 01328 case X86::AND8rm: 01329 case X86::AND8rr: 01330 case X86::ANDNPDrm: 01331 case X86::ANDNPDrr: 01332 case X86::ANDNPSrm: 01333 case X86::ANDNPSrr: 01334 case X86::ANDPDrm: 01335 case X86::ANDPDrr: 01336 case X86::ANDPSrm: 01337 case X86::ANDPSrr: 01338 case X86::CMOVA16rm: 01339 case X86::CMOVA16rr: 01340 case X86::CMOVA32rm: 01341 case X86::CMOVA32rr: 01342 case X86::CMOVAE16rm: 01343 case X86::CMOVAE16rr: 01344 case X86::CMOVAE32rm: 01345 case X86::CMOVAE32rr: 01346 case X86::CMOVB16rm: 01347 case X86::CMOVB16rr: 01348 case X86::CMOVB32rm: 01349 case X86::CMOVB32rr: 01350 case X86::CMOVBE16rm: 01351 case X86::CMOVBE16rr: 01352 case X86::CMOVBE32rm: 01353 case X86::CMOVBE32rr: 01354 case X86::CMOVE16rm: 01355 case X86::CMOVE16rr: 01356 case X86::CMOVE32rm: 01357 case X86::CMOVE32rr: 01358 case X86::CMOVG16rm: 01359 case X86::CMOVG16rr: 01360 case X86::CMOVG32rm: 01361 case X86::CMOVG32rr: 01362 case X86::CMOVGE16rm: 01363 case X86::CMOVGE16rr: 01364 case X86::CMOVGE32rm: 01365 case X86::CMOVGE32rr: 01366 case X86::CMOVL16rm: 01367 case X86::CMOVL16rr: 01368 case X86::CMOVL32rm: 01369 case X86::CMOVL32rr: 01370 case X86::CMOVLE16rm: 01371 case X86::CMOVLE16rr: 01372 case X86::CMOVLE32rm: 01373 case X86::CMOVLE32rr: 01374 case X86::CMOVNE16rm: 01375 case X86::CMOVNE16rr: 01376 case X86::CMOVNE32rm: 01377 case X86::CMOVNE32rr: 01378 case X86::CMOVNP16rm: 01379 case X86::CMOVNP16rr: 01380 case X86::CMOVNP32rm: 01381 case X86::CMOVNP32rr: 01382 case X86::CMOVNS16rm: 01383 case X86::CMOVNS16rr: 01384 case X86::CMOVNS32rm: 01385 case X86::CMOVNS32rr: 01386 case X86::CMOVP16rm: 01387 case X86::CMOVP16rr: 01388 case X86::CMOVP32rm: 01389 case X86::CMOVP32rr: 01390 case X86::CMOVS16rm: 01391 case X86::CMOVS16rr: 01392 case X86::CMOVS32rm: 01393 case X86::CMOVS32rr: 01394 case X86::CMP16ri: 01395 case X86::CMP16ri8: 01396 case X86::CMP16rm: 01397 case X86::CMP16rr: 01398 case X86::CMP32ri: 01399 case X86::CMP32ri8: 01400 case X86::CMP32rm: 01401 case X86::CMP32rr: 01402 case X86::CMP8ri: 01403 case X86::CMP8rm: 01404 case X86::CMP8rr: 01405 case X86::CVTDQ2PDrm: 01406 case X86::CVTDQ2PDrr: 01407 case X86::CVTDQ2PSrm: 01408 case X86::CVTDQ2PSrr: 01409 case X86::CVTPD2DQrm: 01410 case X86::CVTPD2DQrr: 01411 case X86::CVTPD2PIrm: 01412 case X86::CVTPD2PIrr: 01413 case X86::CVTPD2PSrm: 01414 case X86::CVTPD2PSrr: 01415 case X86::CVTPI2PDrm: 01416 case X86::CVTPI2PDrr: 01417 case X86::CVTPI2PSrm: 01418 case X86::CVTPI2PSrr: 01419 case X86::CVTPS2DQrm: 01420 case X86::CVTPS2DQrr: 01421 case X86::CVTPS2PDrm: 01422 case X86::CVTPS2PDrr: 01423 case X86::CVTPS2PIrm: 01424 case X86::CVTPS2PIrr: 01425 case X86::CVTSD2SIrm: 01426 case X86::CVTSD2SIrr: 01427 case X86::CVTSD2SSrm: 01428 case X86::CVTSD2SSrr: 01429 case X86::CVTSI2SDrm: 01430 case X86::CVTSI2SDrr: 01431 case X86::CVTSI2SSrm: 01432 case X86::CVTSI2SSrr: 01433 case X86::CVTSS2SDrm: 01434 case X86::CVTSS2SDrr: 01435 case X86::CVTSS2SIrm: 01436 case X86::CVTSS2SIrr: 01437 case X86::CVTTPD2DQrm: 01438 case X86::CVTTPD2DQrr: 01439 case X86::CVTTPS2DQrm: 01440 case X86::CVTTPS2DQrr: 01441 case X86::CVTTPS2PIrm: 01442 case X86::CVTTPS2PIrr: 01443 case X86::CVTTSD2SIrm: 01444 case X86::CVTTSD2SIrr: 01445 case X86::CVTTSS2SIrm: 01446 case X86::CVTTSS2SIrr: 01447 case X86::DIVPDrm: 01448 case X86::DIVPDrr: 01449 case X86::DIVPSrm: 01450 case X86::DIVPSrr: 01451 case X86::DIVSDrm: 01452 case X86::DIVSDrr: 01453 case X86::DIVSSrm: 01454 case X86::DIVSSrr: 01455 case X86::FsANDNPDrm: 01456 case X86::FsANDNPDrr: 01457 case X86::FsANDNPSrm: 01458 case X86::FsANDNPSrr: 01459 case X86::FsANDPDrm: 01460 case X86::FsANDPDrr: 01461 case X86::FsANDPSrm: 01462 case X86::FsANDPSrr: 01463 case X86::FsFLD0SD: 01464 case X86::FsFLD0SS: 01465 case X86::FsMOVAPDrm: 01466 case X86::FsMOVAPDrr: 01467 case X86::FsMOVAPSrm: 01468 case X86::FsMOVAPSrr: 01469 case X86::FsORPDrm: 01470 case X86::FsORPDrr: 01471 case X86::FsORPSrm: 01472 case X86::FsORPSrr: 01473 case X86::FsXORPDrm: 01474 case X86::FsXORPDrr: 01475 case X86::FsXORPSrm: 01476 case X86::FsXORPSrr: 01477 case X86::HADDPDrm: 01478 case X86::HADDPDrr: 01479 case X86::HADDPSrm: 01480 case X86::HADDPSrr: 01481 case X86::HSUBPDrm: 01482 case X86::HSUBPDrr: 01483 case X86::HSUBPSrm: 01484 case X86::HSUBPSrr: 01485 case X86::IMUL16rm: 01486 case X86::IMUL16rr: 01487 case X86::IMUL32rm: 01488 case X86::IMUL32rr: 01489 case X86::Int_ADDSDrm: 01490 case X86::Int_ADDSDrr: 01491 case X86::Int_ADDSSrm: 01492 case X86::Int_ADDSSrr: 01493 case X86::Int_COMISDrm: 01494 case X86::Int_COMISDrr: 01495 case X86::Int_COMISSrm: 01496 case X86::Int_COMISSrr: 01497 case X86::Int_CVTSD2SSrm: 01498 case X86::Int_CVTSD2SSrr: 01499 case X86::Int_CVTSI2SDrm: 01500 case X86::Int_CVTSI2SDrr: 01501 case X86::Int_CVTSI2SSrm: 01502 case X86::Int_CVTSI2SSrr: 01503 case X86::Int_CVTSS2SDrm: 01504 case X86::Int_CVTSS2SDrr: 01505 case X86::Int_CVTTSD2SIrm: 01506 case X86::Int_CVTTSD2SIrr: 01507 case X86::Int_CVTTSS2SIrm: 01508 case X86::Int_CVTTSS2SIrr: 01509 case X86::Int_DIVSDrm: 01510 case X86::Int_DIVSDrr: 01511 case X86::Int_DIVSSrm: 01512 case X86::Int_DIVSSrr: 01513 case X86::Int_MAXSDrm: 01514 case X86::Int_MAXSDrr: 01515 case X86::Int_MAXSSrm: 01516 case X86::Int_MAXSSrr: 01517 case X86::Int_MINSDrm: 01518 case X86::Int_MINSDrr: 01519 case X86::Int_MINSSrm: 01520 case X86::Int_MINSSrr: 01521 case X86::Int_MULSDrm: 01522 case X86::Int_MULSDrr: 01523 case X86::Int_MULSSrm: 01524 case X86::Int_MULSSrr: 01525 case X86::Int_RCPSSm: 01526 case X86::Int_RCPSSr: 01527 case X86::Int_RSQRTSSm: 01528 case X86::Int_RSQRTSSr: 01529 case X86::Int_SQRTSDm: 01530 case X86::Int_SQRTSDr: 01531 case X86::Int_SQRTSSm: 01532 case X86::Int_SQRTSSr: 01533 case X86::Int_SUBSDrm: 01534 case X86::Int_SUBSDrr: 01535 case X86::Int_SUBSSrm: 01536 case X86::Int_SUBSSrr: 01537 case X86::Int_UCOMISDrm: 01538 case X86::Int_UCOMISDrr: 01539 case X86::Int_UCOMISSrm: 01540 case X86::Int_UCOMISSrr: 01541 case X86::LEA16r: 01542 case X86::LEA32r: 01543 case X86::MASKMOVDQU: 01544 case X86::MASKMOVQ: 01545 case X86::MAXPDrm: 01546 case X86::MAXPDrr: 01547 case X86::MAXPSrm: 01548 case X86::MAXPSrr: 01549 case X86::MAXSDrm: 01550 case X86::MAXSDrr: 01551 case X86::MAXSSrm: 01552 case X86::MAXSSrr: 01553 case X86::MINPDrm: 01554 case X86::MINPDrr: 01555 case X86::MINPSrm: 01556 case X86::MINPSrr: 01557 case X86::MINSDrm: 01558 case X86::MINSDrr: 01559 case X86::MINSSrm: 01560 case X86::MINSSrr: 01561 case X86::MOV16r0: 01562 case X86::MOV16ri: 01563 case X86::MOV16rm: 01564 case X86::MOV16rr: 01565 case X86::MOV32r0: 01566 case X86::MOV32ri: 01567 case X86::MOV32rm: 01568 case X86::MOV32rr: 01569 case X86::MOV8r0: 01570 case X86::MOV8ri: 01571 case X86::MOV8rm: 01572 case X86::MOV8rr: 01573 case X86::MOVAPDrm: 01574 case X86::MOVAPDrr: 01575 case X86::MOVAPSrm: 01576 case X86::MOVAPSrr: 01577 case X86::MOVD64rm: 01578 case X86::MOVD64rr: 01579 case X86::MOVDI2PDIrm: 01580 case X86::MOVDI2PDIrr: 01581 case X86::MOVDQArm: 01582 case X86::MOVDQArr: 01583 case X86::MOVDQUrm: 01584 case X86::MOVHLPSrr: 01585 case X86::MOVHPDrm: 01586 case X86::MOVHPSrm: 01587 case X86::MOVLDI2PDIrr: 01588 case X86::MOVLHPSrr: 01589 case X86::MOVLPDrm: 01590 case X86::MOVLPDrr: 01591 case X86::MOVLPSrm: 01592 case X86::MOVLPSrr: 01593 case X86::MOVLQ128rr: 01594 case X86::MOVLSD2PDrr: 01595 case X86::MOVLSS2PSrr: 01596 case X86::MOVMSKPDrr: 01597 case X86::MOVMSKPSrr: 01598 case X86::MOVPD2SDrr: 01599 case X86::MOVPDI2DIrr: 01600 case X86::MOVPS2SSrr: 01601 case X86::MOVQ64rm: 01602 case X86::MOVQ64rr: 01603 case X86::MOVQI2PQIrm: 01604 case X86::MOVQI2PQIrr: 01605 case X86::MOVSD2PDrm: 01606 case X86::MOVSD2PDrr: 01607 case X86::MOVSDrm: 01608 case X86::MOVSDrr: 01609 case X86::MOVSS2PSrm: 01610 case X86::MOVSS2PSrr: 01611 case X86::MOVSSrm: 01612 case X86::MOVSSrr: 01613 case X86::MOVSX16rm8: 01614 case X86::MOVSX16rr8: 01615 case X86::MOVSX32rm16: 01616 case X86::MOVSX32rm8: 01617 case X86::MOVSX32rr16: 01618 case X86::MOVSX32rr8: 01619 case X86::MOVUPDrm: 01620 case X86::MOVUPDrr: 01621 case X86::MOVUPSrm: 01622 case X86::MOVUPSrr: 01623 case X86::MOVZDI2PDIrm: 01624 case X86::MOVZQI2PQIrm: 01625 case X86::MOVZSD2PDrm: 01626 case X86::MOVZSS2PSrm: 01627 case X86::MOVZX16rm8: 01628 case X86::MOVZX16rr8: 01629 case X86::MOVZX32rm16: 01630 case X86::MOVZX32rm8: 01631 case X86::MOVZX32rr16: 01632 case X86::MOVZX32rr8: 01633 case X86::MULPDrm: 01634 case X86::MULPDrr: 01635 case X86::MULPSrm: 01636 case X86::MULPSrr: 01637 case X86::MULSDrm: 01638 case X86::MULSDrr: 01639 case X86::MULSSrm: 01640 case X86::MULSSrr: 01641 case X86::OR16ri: 01642 case X86::OR16ri8: 01643 case X86::OR16rm: 01644 case X86::OR16rr: 01645 case X86::OR32ri: 01646 case X86::OR32ri8: 01647 case X86::OR32rm: 01648 case X86::OR32rr: 01649 case X86::OR8ri: 01650 case X86::OR8rm: 01651 case X86::OR8rr: 01652 case X86::ORPDrm: 01653 case X86::ORPDrr: 01654 case X86::ORPSrm: 01655 case X86::ORPSrr: 01656 case X86::PACKSSDWrm: 01657 case X86::PACKSSDWrr: 01658 case X86::PACKSSWBrm: 01659 case X86::PACKSSWBrr: 01660 case X86::PACKUSWBrm: 01661 case X86::PACKUSWBrr: 01662 case X86::PADDBrm: 01663 case X86::PADDBrr: 01664 case X86::PADDDrm: 01665 case X86::PADDDrr: 01666 case X86::PADDQrm: 01667 case X86::PADDQrr: 01668 case X86::PADDSBrm: 01669 case X86::PADDSBrr: 01670 case X86::PADDSWrm: 01671 case X86::PADDSWrr: 01672 case X86::PADDUSBrm: 01673 case X86::PADDUSBrr: 01674 case X86::PADDUSWrm: 01675 case X86::PADDUSWrr: 01676 case X86::PADDWrm: 01677 case X86::PADDWrr: 01678 case X86::PANDNrm: 01679 case X86::PANDNrr: 01680 case X86::PANDrm: 01681 case X86::PANDrr: 01682 case X86::PAVGBrm: 01683 case X86::PAVGBrr: 01684 case X86::PAVGWrm: 01685 case X86::PAVGWrr: 01686 case X86::PMADDWDrm: 01687 case X86::PMADDWDrr: 01688 case X86::PMAXSWrm: 01689 case X86::PMAXSWrr: 01690 case X86::PMAXUBrm: 01691 case X86::PMAXUBrr: 01692 case X86::PMINSWrm: 01693 case X86::PMINSWrr: 01694 case X86::PMINUBrm: 01695 case X86::PMINUBrr: 01696 case X86::PMOVMSKBrr: 01697 case X86::PMULHUWrm: 01698 case X86::PMULHUWrr: 01699 case X86::PMULHWrm: 01700 case X86::PMULHWrr: 01701 case X86::PMULLWrm: 01702 case X86::PMULLWrr: 01703 case X86::PMULUDQrm: 01704 case X86::PMULUDQrr: 01705 case X86::PORrm: 01706 case X86::PORrr: 01707 case X86::PSADBWrm: 01708 case X86::PSADBWrr: 01709 case X86::PSLLDQri: 01710 case X86::PSRLDQri: 01711 case X86::PSUBBrm: 01712 case X86::PSUBBrr: 01713 case X86::PSUBDrm: 01714 case X86::PSUBDrr: 01715 case X86::PSUBQrm: 01716 case X86::PSUBQrr: 01717 case X86::PSUBSBrm: 01718 case X86::PSUBSBrr: 01719 case X86::PSUBSWrm: 01720 case X86::PSUBSWrr: 01721 case X86::PSUBUSBrm: 01722 case X86::PSUBUSBrr: 01723 case X86::PSUBUSWrm: 01724 case X86::PSUBUSWrr: 01725 case X86::PSUBWrm: 01726 case X86::PSUBWrr: 01727 case X86::PUNPCKHBWrm: 01728 case X86::PUNPCKHBWrr: 01729 case X86::PUNPCKHDQrm: 01730 case X86::PUNPCKHDQrr: 01731 case X86::PUNPCKHQDQrm: 01732 case X86::PUNPCKHQDQrr: 01733 case X86::PUNPCKHWDrm: 01734 case X86::PUNPCKHWDrr: 01735 case X86::PUNPCKLBWrm: 01736 case X86::PUNPCKLBWrr: 01737 case X86::PUNPCKLDQrm: 01738 case X86::PUNPCKLDQrr: 01739 case X86::PUNPCKLQDQrm: 01740 case X86::PUNPCKLQDQrr: 01741 case X86::PUNPCKLWDrm: 01742 case X86::PUNPCKLWDrr: 01743 case X86::PXORrm: 01744 case X86::PXORrr: 01745 case X86::RCPPSm: 01746 case X86::RCPPSr: 01747 case X86::RCPSSm: 01748 case X86::RCPSSr: 01749 case X86::ROL16ri: 01750 case X86::ROL32ri: 01751 case X86::ROL8ri: 01752 case X86::ROR16ri: 01753 case X86::ROR32ri: 01754 case X86::ROR8ri: 01755 case X86::RSQRTPSm: 01756 case X86::RSQRTPSr: 01757 case X86::RSQRTSSm: 01758 case X86::RSQRTSSr: 01759 case X86::SAR16ri: 01760 case X86::SAR32ri: 01761 case X86::SAR8ri: 01762 case X86::SBB32ri: 01763 case X86::SBB32ri8: 01764 case X86::SBB32rm: 01765 case X86::SBB32rr: 01766 case X86::SHL16ri: 01767 case X86::SHL32ri: 01768 case X86::SHL8ri: 01769 case X86::SHR16ri: 01770 case X86::SHR32ri: 01771 case X86::SHR8ri: 01772 case X86::SQRTPDm: 01773 case X86::SQRTPDr: 01774 case X86::SQRTPSm: 01775 case X86::SQRTPSr: 01776 case X86::SQRTSDm: 01777 case X86::SQRTSDr: 01778 case X86::SQRTSSm: 01779 case X86::SQRTSSr: 01780 case X86::SUB16ri: 01781 case X86::SUB16ri8: 01782 case X86::SUB16rm: 01783 case X86::SUB16rr: 01784 case X86::SUB32ri: 01785 case X86::SUB32ri8: 01786 case X86::SUB32rm: 01787 case X86::SUB32rr: 01788 case X86::SUB8ri: 01789 case X86::SUB8rm: 01790 case X86::SUB8rr: 01791 case X86::SUBPDrm: 01792 case X86::SUBPDrr: 01793 case X86::SUBPSrm: 01794 case X86::SUBPSrr: 01795 case X86::SUBSDrm: 01796 case X86::SUBSDrr: 01797 case X86::SUBSSrm: 01798 case X86::SUBSSrr: 01799 case X86::TEST16ri: 01800 case X86::TEST16rm: 01801 case X86::TEST16rr: 01802 case X86::TEST32ri: 01803 case X86::TEST32rm: 01804 case X86::TEST32rr: 01805 case X86::TEST8ri: 01806 case X86::TEST8rm: 01807 case X86::TEST8rr: 01808 case X86::UCOMISDrm: 01809 case X86::UCOMISDrr: 01810 case X86::UCOMISSrm: 01811 case X86::UCOMISSrr: 01812 case X86::UNPCKHPDrm: 01813 case X86::UNPCKHPDrr: 01814 case X86::UNPCKHPSrm: 01815 case X86::UNPCKHPSrr: 01816 case X86::UNPCKLPDrm: 01817 case X86::UNPCKLPDrr: 01818 case X86::UNPCKLPSrm: 01819 case X86::UNPCKLPSrr: 01820 case X86::V_SET0_PD: 01821 case X86::V_SET0_PI: 01822 case X86::V_SET0_PS: 01823 case X86::V_SETALLONES: 01824 case X86::XCHG16rm: 01825 case X86::XCHG16rr: 01826 case X86::XCHG32rm: 01827 case X86::XCHG32rr: 01828 case X86::XCHG8rm: 01829 case X86::XCHG8rr: 01830 case X86::XOR16ri: 01831 case X86::XOR16ri8: 01832 case X86::XOR16rm: 01833 case X86::XOR16rr: 01834 case X86::XOR32ri: 01835 case X86::XOR32ri8: 01836 case X86::XOR32rm: 01837 case X86::XOR32rr: 01838 case X86::XOR8ri: 01839 case X86::XOR8rm: 01840 case X86::XOR8rr: 01841 case X86::XORPDrm: 01842 case X86::XORPDrr: 01843 case X86::XORPSrm: 01844 case X86::XORPSrr: 01845 printOperand(MI, 0); 01846 O << ", "; 01847 switch (MI->getOpcode()) { 01848 case X86::ADC32ri: 01849 case X86::ADC32ri8: 01850 case X86::ADC32rr: 01851 case X86::ADD16ri: 01852 case X86::ADD16ri8: 01853 case X86::ADD16rr: 01854 case X86::ADD32ri: 01855 case X86::ADD32ri8: 01856 case X86::ADD32rr: 01857 case X86::ADD8ri: 01858 case X86::ADD8rr: 01859 case X86::ADDPDrr: 01860 case X86::ADDPSrr: 01861 case X86::ADDSDrr: 01862 case X86::ADDSSrr: 01863 case X86::ADJSTACKPTRri: 01864 case X86::AND16ri: 01865 case X86::AND16ri8: 01866 case X86::AND16rr: 01867 case X86::AND32ri: 01868 case X86::AND32ri8: 01869 case X86::AND32rr: 01870 case X86::AND8ri: 01871 case X86::AND8rr: 01872 case X86::ANDNPDrr: 01873 case X86::ANDNPSrr: 01874 case X86::ANDPDrr: 01875 case X86::ANDPSrr: 01876 case X86::CMOVA16rr: 01877 case X86::CMOVA32rr: 01878 case X86::CMOVAE16rr: 01879 case X86::CMOVAE32rr: 01880 case X86::CMOVB16rr: 01881 case X86::CMOVB32rr: 01882 case X86::CMOVBE16rr: 01883 case X86::CMOVBE32rr: 01884 case X86::CMOVE16rr: 01885 case X86::CMOVE32rr: 01886 case X86::CMOVG16rr: 01887 case X86::CMOVG32rr: 01888 case X86::CMOVGE16rr: 01889 case X86::CMOVGE32rr: 01890 case X86::CMOVL16rr: 01891 case X86::CMOVL32rr: 01892 case X86::CMOVLE16rr: 01893 case X86::CMOVLE32rr: 01894 case X86::CMOVNE16rr: 01895 case X86::CMOVNE32rr: 01896 case X86::CMOVNP16rr: 01897 case X86::CMOVNP32rr: 01898 case X86::CMOVNS16rr: 01899 case X86::CMOVNS32rr: 01900 case X86::CMOVP16rr: 01901 case X86::CMOVP32rr: 01902 case X86::CMOVS16rr: 01903 case X86::CMOVS32rr: 01904 case X86::CMP16ri: 01905 case X86::CMP16ri8: 01906 case X86::CMP16rr: 01907 case X86::CMP32ri: 01908 case X86::CMP32ri8: 01909 case X86::CMP32rr: 01910 case X86::CMP8ri: 01911 case X86::CMP8rr: 01912 case X86::CVTDQ2PDrr: 01913 case X86::CVTDQ2PSrr: 01914 case X86::CVTPD2DQrr: 01915 case X86::CVTPD2PIrr: 01916 case X86::CVTPD2PSrr: 01917 case X86::CVTPI2PDrr: 01918 case X86::CVTPI2PSrr: 01919 case X86::CVTPS2DQrr: 01920 case X86::CVTPS2PDrr: 01921 case X86::CVTPS2PIrr: 01922 case X86::CVTSD2SIrr: 01923 case X86::CVTSD2SSrr: 01924 case X86::CVTSI2SDrr: 01925 case X86::CVTSI2SSrr: 01926 case X86::CVTSS2SDrr: 01927 case X86::CVTSS2SIrr: 01928 case X86::CVTTPD2DQrr: 01929 case X86::CVTTPS2DQrr: 01930 case X86::CVTTPS2PIrr: 01931 case X86::CVTTSD2SIrr: 01932 case X86::CVTTSS2SIrr: 01933 case X86::DIVPDrr: 01934 case X86::DIVPSrr: 01935 case X86::DIVSDrr: 01936 case X86::DIVSSrr: 01937 case X86::FsANDNPDrr: 01938 case X86::FsANDNPSrr: 01939 case X86::FsANDPDrr: 01940 case X86::FsANDPSrr: 01941 case X86::FsMOVAPDrr: 01942 case X86::FsMOVAPSrr: 01943 case X86::FsORPDrr: 01944 case X86::FsORPSrr: 01945 case X86::FsXORPDrr: 01946 case X86::FsXORPSrr: 01947 case X86::HADDPDrr: 01948 case X86::HADDPSrr: 01949 case X86::HSUBPDrr: 01950 case X86::HSUBPSrr: 01951 case X86::IMUL16rr: 01952 case X86::IMUL32rr: 01953 case X86::Int_ADDSDrr: 01954 case X86::Int_ADDSSrr: 01955 case X86::Int_COMISDrr: 01956 case X86::Int_COMISSrr: 01957 case X86::Int_CVTSD2SSrr: 01958 case X86::Int_CVTSI2SDrr: 01959 case X86::Int_CVTSI2SSrr: 01960 case X86::Int_CVTSS2SDrr: 01961 case X86::Int_CVTTSD2SIrr: 01962 case X86::Int_CVTTSS2SIrr: 01963 case X86::Int_DIVSDrr: 01964 case X86::Int_DIVSSrr: 01965 case X86::Int_MAXSDrr: 01966 case X86::Int_MAXSSrr: 01967 case X86::Int_MINSDrr: 01968 case X86::Int_MINSSrr: 01969 case X86::Int_MULSDrr: 01970 case X86::Int_MULSSrr: 01971 case X86::Int_RCPSSr: 01972 case X86::Int_RSQRTSSr: 01973 case X86::Int_SQRTSDr: 01974 case X86::Int_SQRTSSr: 01975 case X86::Int_SUBSDrr: 01976 case X86::Int_SUBSSrr: 01977 case X86::Int_UCOMISDrr: 01978 case X86::Int_UCOMISSrr: 01979 case X86::MASKMOVDQU: 01980 case X86::MASKMOVQ: 01981 case X86::MAXPDrr: 01982 case X86::MAXPSrr: 01983 case X86::MAXSDrr: 01984 case X86::MAXSSrr: 01985 case X86::MINPDrr: 01986 case X86::MINPSrr: 01987 case X86::MINSDrr: 01988 case X86::MINSSrr: 01989 case X86::MOV16ri: 01990 case X86::MOV16rr: 01991 case X86::MOV32ri: 01992 case X86::MOV32rr: 01993 case X86::MOV8ri: 01994 case X86::MOV8rr: 01995 case X86::MOVAPDrr: 01996 case X86::MOVAPSrr: 01997 case X86::MOVD64rr: 01998 case X86::MOVDI2PDIrr: 01999 case X86::MOVDQArr: 02000 case X86::MOVHLPSrr: 02001 case X86::MOVLDI2PDIrr: 02002 case X86::MOVLHPSrr: 02003 case X86::MOVLPDrr: 02004 case X86::MOVLPSrr: 02005 case X86::MOVLQ128rr: 02006 case X86::MOVLSD2PDrr: 02007 case X86::MOVLSS2PSrr: 02008 case X86::MOVMSKPDrr: 02009 case X86::MOVMSKPSrr: 02010 case X86::MOVPD2SDrr: 02011 case X86::MOVPDI2DIrr: 02012 case X86::MOVPS2SSrr: 02013 case X86::MOVQ64rr: 02014 case X86::MOVQI2PQIrr: 02015 case X86::MOVSD2PDrr: 02016 case X86::MOVSDrr: 02017 case X86::MOVSS2PSrr: 02018 case X86::MOVSSrr: 02019 case X86::MOVSX16rr8: 02020 case X86::MOVSX32rr16: 02021 case X86::MOVSX32rr8: 02022 case X86::MOVUPDrr: 02023 case X86::MOVUPSrr: 02024 case X86::MOVZX16rr8: 02025 case X86::MOVZX32rr16: 02026 case X86::MOVZX32rr8: 02027 case X86::MULPDrr: 02028 case X86::MULPSrr: 02029 case X86::MULSDrr: 02030 case X86::MULSSrr: 02031 case X86::OR16ri: 02032 case X86::OR16ri8: 02033 case X86::OR16rr: 02034 case X86::OR32ri: 02035 case X86::OR32ri8: 02036 case X86::OR32rr: 02037 case X86::OR8ri: 02038 case X86::OR8rr: 02039 case X86::ORPDrr: 02040 case X86::ORPSrr: 02041 case X86::PACKSSDWrr: 02042 case X86::PACKSSWBrr: 02043 case X86::PACKUSWBrr: 02044 case X86::PADDBrr: 02045 case X86::PADDDrr: 02046 case X86::PADDQrr: 02047 case X86::PADDSBrr: 02048 case X86::PADDSWrr: 02049 case X86::PADDUSBrr: 02050 case X86::PADDUSWrr: 02051 case X86::PADDWrr: 02052 case X86::PANDNrr: 02053 case X86::PANDrr: 02054 case X86::PAVGBrr: 02055 case X86::PAVGWrr: 02056 case X86::PMADDWDrr: 02057 case X86::PMAXSWrr: 02058 case X86::PMAXUBrr: 02059 case X86::PMINSWrr: 02060 case X86::PMINUBrr: 02061 case X86::PMOVMSKBrr: 02062 case X86::PMULHUWrr: 02063 case X86::PMULHWrr: 02064 case X86::PMULLWrr: 02065 case X86::PMULUDQrr: 02066 case X86::PORrr: 02067 case X86::PSADBWrr: 02068 case X86::PSLLDQri: 02069 case X86::PSRLDQri: 02070 case X86::PSUBBrr: 02071 case X86::PSUBDrr: 02072 case X86::PSUBQrr: 02073 case X86::PSUBSBrr: 02074 case X86::PSUBSWrr: 02075 case X86::PSUBUSBrr: 02076 case X86::PSUBUSWrr: 02077 case X86::PSUBWrr: 02078 case X86::PUNPCKHBWrr: 02079 case X86::PUNPCKHDQrr: 02080 case X86::PUNPCKHQDQrr: 02081 case X86::PUNPCKHWDrr: 02082 case X86::PUNPCKLBWrr: 02083 case X86::PUNPCKLDQrr: 02084 case X86::PUNPCKLQDQrr: 02085 case X86::PUNPCKLWDrr: 02086 case X86::PXORrr: 02087 case X86::RCPPSr: 02088 case X86::RCPSSr: 02089 case X86::ROL16ri: 02090 case X86::ROL32ri: 02091 case X86::ROL8ri: 02092 case X86::ROR16ri: 02093 case X86::ROR32ri: 02094 case X86::ROR8ri: 02095 case X86::RSQRTPSr: 02096 case X86::RSQRTSSr: 02097 case X86::SAR16ri: 02098 case X86::SAR32ri: 02099 case X86::SAR8ri: 02100 case X86::SBB32ri: 02101 case X86::SBB32ri8: 02102 case X86::SBB32rr: 02103 case X86::SHL16ri: 02104 case X86::SHL32ri: 02105 case X86::SHL8ri: 02106 case X86::SHR16ri: 02107 case X86::SHR32ri: 02108 case X86::SHR8ri: 02109 case X86::SQRTPDr: 02110 case X86::SQRTPSr: 02111 case X86::SQRTSDr: 02112 case X86::SQRTSSr: 02113 case X86::SUB16ri: 02114 case X86::SUB16ri8: 02115 case X86::SUB16rr: 02116 case X86::SUB32ri: 02117 case X86::SUB32ri8: 02118 case X86::SUB32rr: 02119 case X86::SUB8ri: 02120 case X86::SUB8rr: 02121 case X86::SUBPDrr: 02122 case X86::SUBPSrr: 02123 case X86::SUBSDrr: 02124 case X86::SUBSSrr: 02125 case X86::TEST16ri: 02126 case X86::TEST16rr: 02127 case X86::TEST32ri: 02128 case X86::TEST32rr: 02129 case X86::TEST8ri: 02130 case X86::TEST8rr: 02131 case X86::UCOMISDrr: 02132 case X86::UCOMISSrr: 02133 case X86::UNPCKHPDrr: 02134 case X86::UNPCKHPSrr: 02135 case X86::UNPCKLPDrr: 02136 case X86::UNPCKLPSrr: 02137 case X86::XCHG16rr: 02138 case X86::XCHG32rr: 02139 case X86::XCHG8rr: 02140 case X86::XOR16ri: 02141 case X86::XOR16ri8: 02142 case X86::XOR16rr: 02143 case X86::XOR32ri: 02144 case X86::XOR32ri8: 02145 case X86::XOR32rr: 02146 case X86::XOR8ri: 02147 case X86::XOR8rr: 02148 case X86::XORPDrr: 02149 case X86::XORPSrr: printOperand(MI, 1); break; 02150 case X86::ADC32rm: 02151 case X86::ADD32rm: 02152 case X86::AND32rm: 02153 case X86::CMOVA32rm: 02154 case X86::CMOVAE32rm: 02155 case X86::CMOVB32rm: 02156 case X86::CMOVBE32rm: 02157 case X86::CMOVE32rm: 02158 case X86::CMOVG32rm: 02159 case X86::CMOVGE32rm: 02160 case X86::CMOVL32rm: 02161 case X86::CMOVLE32rm: 02162 case X86::CMOVNE32rm: 02163 case X86::CMOVNP32rm: 02164 case X86::CMOVNS32rm: 02165 case X86::CMOVP32rm: 02166 case X86::CMOVS32rm: 02167 case X86::CMP32rm: 02168 case X86::CVTSI2SDrm: 02169 case X86::CVTSI2SSrm: 02170 case X86::IMUL32rm: 02171 case X86::Int_CVTSI2SDrm: 02172 case X86::Int_CVTSI2SSrm: 02173 case X86::LEA16r: 02174 case X86::LEA32r: 02175 case X86::MOV32rm: 02176 case X86::MOVD64rm: 02177 case X86::MOVDI2PDIrm: 02178 case X86::MOVZDI2PDIrm: 02179 case X86::OR32rm: 02180 case X86::SBB32rm: 02181 case X86::SUB32rm: 02182 case X86::TEST32rm: 02183 case X86::XCHG32rm: 02184 case X86::XOR32rm: printi32mem(MI, 1); break; 02185 case X86::ADD16rm: 02186 case X86::AND16rm: 02187 case X86::CMOVA16rm: 02188 case X86::CMOVAE16rm: 02189 case X86::CMOVB16rm: 02190 case X86::CMOVBE16rm: 02191 case X86::CMOVE16rm: 02192 case X86::CMOVG16rm: 02193 case X86::CMOVGE16rm: 02194 case X86::CMOVL16rm: 02195 case X86::CMOVLE16rm: 02196 case X86::CMOVNE16rm: 02197 case X86::CMOVNP16rm: 02198 case X86::CMOVNS16rm: 02199 case X86::CMOVP16rm: 02200 case X86::CMOVS16rm: 02201 case X86::CMP16rm: 02202 case X86::IMUL16rm: 02203 case X86::MOV16rm: 02204 case X86::MOVSX32rm16: 02205 case X86::MOVZX32rm16: 02206 case X86::OR16rm: 02207 case X86::SUB16rm: 02208 case X86::TEST16rm: 02209 case X86::XCHG16rm: 02210 case X86::XOR16rm: printi16mem(MI, 1); break; 02211 case X86::ADD8rm: 02212 case X86::AND8rm: 02213 case X86::CMP8rm: 02214 case X86::MOV8rm: 02215 case X86::MOVSX16rm8: 02216 case X86::MOVSX32rm8: 02217 case X86::MOVZX16rm8: 02218 case X86::MOVZX32rm8: 02219 case X86::OR8rm: 02220 case X86::SUB8rm: 02221 case X86::TEST8rm: 02222 case X86::XCHG8rm: 02223 case X86::XOR8rm: printi8mem(MI, 1); break; 02224 case X86::ADDPDrm: 02225 case X86::ADDPSrm: 02226 case X86::ANDNPDrm: 02227 case X86::ANDNPSrm: 02228 case X86::ANDPDrm: 02229 case X86::ANDPSrm: 02230 case X86::CVTPD2DQrm: 02231 case X86::CVTPD2PIrm: 02232 case X86::CVTPD2PSrm: 02233 case X86::CVTPS2DQrm: 02234 case X86::CVTSD2SIrm: 02235 case X86::CVTTPD2DQrm: 02236 case X86::CVTTPS2DQrm: 02237 case X86::DIVPDrm: 02238 case X86::DIVPSrm: 02239 case X86::FsANDNPDrm: 02240 case X86::FsANDNPSrm: 02241 case X86::FsANDPDrm: 02242 case X86::FsANDPSrm: 02243 case X86::FsMOVAPDrm: 02244 case X86::FsMOVAPSrm: 02245 case X86::FsORPDrm: 02246 case X86::FsORPSrm: 02247 case X86::FsXORPDrm: 02248 case X86::FsXORPSrm: 02249 case X86::HADDPDrm: 02250 case X86::HADDPSrm: 02251 case X86::HSUBPDrm: 02252 case X86::HSUBPSrm: 02253 case X86::Int_COMISDrm: 02254 case X86::Int_COMISSrm: 02255 case X86::Int_CVTTSD2SIrm: 02256 case X86::Int_UCOMISDrm: 02257 case X86::Int_UCOMISSrm: 02258 case X86::MOVAPDrm: 02259 case X86::MOVAPSrm: 02260 case X86::MOVUPDrm: 02261 case X86::MOVUPSrm: 02262 case X86::MULPDrm: 02263 case X86::MULPSrm: 02264 case X86::ORPDrm: 02265 case X86::ORPSrm: 02266 case X86::SUBPDrm: 02267 case X86::SUBPSrm: 02268 case X86::UNPCKHPDrm: 02269 case X86::UNPCKHPSrm: 02270 case X86::UNPCKLPDrm: 02271 case X86::UNPCKLPSrm: 02272 case X86::XORPDrm: 02273 case X86::XORPSrm: printf128mem(MI, 1); break; 02274 case X86::ADDSDrm: 02275 case X86::CVTPS2PDrm: 02276 case X86::CVTPS2PIrm: 02277 case X86::CVTSD2SSrm: 02278 case X86::CVTTPS2PIrm: 02279 case X86::CVTTSD2SIrm: 02280 case X86::DIVSDrm: 02281 case X86::Int_ADDSDrm: 02282 case X86::Int_CVTSD2SSrm: 02283 case X86::Int_DIVSDrm: 02284 case X86::Int_MAXSDrm: 02285 case X86::Int_MINSDrm: 02286 case X86::Int_MULSDrm: 02287 case X86::Int_SQRTSDm: 02288 case X86::Int_SUBSDrm: 02289 case X86::MAXPDrm: 02290 case X86::MAXSDrm: 02291 case X86::MINPDrm: 02292 case X86::MINSDrm: 02293 case X86::MOVHPDrm: 02294 case X86::MOVHPSrm: 02295 case X86::MOVLPDrm: 02296 case X86::MOVLPSrm: 02297 case X86::MOVSD2PDrm: 02298 case X86::MOVSDrm: 02299 case X86::MOVZSD2PDrm: 02300 case X86::MULSDrm: 02301 case X86::SQRTPDm: 02302 case X86::SQRTSDm: 02303 case X86::SUBSDrm: 02304 case X86::UCOMISDrm: printf64mem(MI, 1); break; 02305 case X86::ADDSSrm: 02306 case X86::CVTSS2SDrm: 02307 case X86::CVTSS2SIrm: 02308 case X86::CVTTSS2SIrm: 02309 case X86::DIVSSrm: 02310 case X86::Int_ADDSSrm: 02311 case X86::Int_CVTSS2SDrm: 02312 case X86::Int_CVTTSS2SIrm: 02313 case X86::Int_DIVSSrm: 02314 case X86::Int_MAXSSrm: 02315 case X86::Int_MINSSrm: 02316 case X86::Int_MULSSrm: 02317 case X86::Int_RCPSSm: 02318 case X86::Int_RSQRTSSm: 02319 case X86::Int_SQRTSSm: 02320 case X86::Int_SUBSSrm: 02321 case X86::MAXPSrm: 02322 case X86::MAXSSrm: 02323 case X86::MINPSrm: 02324 case X86::MINSSrm: 02325 case X86::MOVSS2PSrm: 02326 case X86::MOVSSrm: 02327 case X86::MOVZSS2PSrm: 02328 case X86::MULSSrm: 02329 case X86::RCPPSm: 02330 case X86::RCPSSm: 02331 case X86::RSQRTPSm: 02332 case X86::RSQRTSSm: 02333 case X86::SQRTPSm: 02334 case X86::SQRTSSm: 02335 case X86::SUBSSrm: 02336 case X86::UCOMISSrm: printf32mem(MI, 1); break; 02337 case X86::CVTDQ2PDrm: 02338 case X86::CVTPI2PDrm: 02339 case X86::CVTPI2PSrm: 02340 case X86::MOVQ64rm: 02341 case X86::MOVQI2PQIrm: 02342 case X86::MOVZQI2PQIrm: printi64mem(MI, 1); break; 02343 case X86::CVTDQ2PSrm: 02344 case X86::MOVDQArm: 02345 case X86::MOVDQUrm: 02346 case X86::PACKSSDWrm: 02347 case X86::PACKSSWBrm: 02348 case X86::PACKUSWBrm: 02349 case X86::PADDBrm: 02350 case X86::PADDDrm: 02351 case X86::PADDQrm: 02352 case X86::PADDSBrm: 02353 case X86::PADDSWrm: 02354 case X86::PADDUSBrm: 02355 case X86::PADDUSWrm: 02356 case X86::PADDWrm: 02357 case X86::PANDNrm: 02358 case X86::PANDrm: 02359 case X86::PAVGBrm: 02360 case X86::PAVGWrm: 02361 case X86::PMADDWDrm: 02362 case X86::PMAXSWrm: 02363 case X86::PMAXUBrm: 02364 case X86::PMINSWrm: 02365 case X86::PMINUBrm: 02366 case X86::PMULHUWrm: 02367 case X86::PMULHWrm: 02368 case X86::PMULLWrm: 02369 case X86::PMULUDQrm: 02370 case X86::PORrm: 02371 case X86::PSADBWrm: 02372 case X86::PSUBBrm: 02373 case X86::PSUBDrm: 02374 case X86::PSUBQrm: 02375 case X86::PSUBSBrm: 02376 case X86::PSUBSWrm: 02377 case X86::PSUBUSBrm: 02378 case X86::PSUBUSWrm: 02379 case X86::PSUBWrm: 02380 case X86::PUNPCKHBWrm: 02381 case X86::PUNPCKHDQrm: 02382 case X86::PUNPCKHQDQrm: 02383 case X86::PUNPCKHWDrm: 02384 case X86::PUNPCKLBWrm: 02385 case X86::PUNPCKLDQrm: 02386 case X86::PUNPCKLQDQrm: 02387 case X86::PUNPCKLWDrm: 02388 case X86::PXORrm: printi128mem(MI, 1); break; 02389 case X86::FsFLD0SD: 02390 case X86::FsFLD0SS: 02391 case X86::MOV16r0: 02392 case X86::MOV32r0: 02393 case X86::MOV8r0: 02394 case X86::V_SET0_PD: 02395 case X86::V_SET0_PI: 02396 case X86::V_SET0_PS: 02397 case X86::V_SETALLONES: printOperand(MI, 0); break; 02398 } 02399 O << "\n"; 02400 break; 02401 case X86::ADJCALLSTACKDOWN: 02402 case X86::ADJCALLSTACKUP: 02403 case X86::CBW: 02404 case X86::CDQ: 02405 case X86::CMOV_FR32: 02406 case X86::CMOV_FR64: 02407 case X86::CMOV_V2F64: 02408 case X86::CMOV_V2I64: 02409 case X86::CMOV_V4F32: 02410 case X86::CWD: 02411 case X86::FABS: 02412 case X86::FCHS: 02413 case X86::FCOS: 02414 case X86::FLD0: 02415 case X86::FLD1: 02416 case X86::FNSTSW8r: 02417 case X86::FP_REG_KILL: 02418 case X86::FP_TO_INT16_IN_MEM: 02419 case X86::FP_TO_INT32_IN_MEM: 02420 case X86::FP_TO_INT64_IN_MEM: 02421 case X86::FSIN: 02422 case X86::FSQRT: 02423 case X86::FTST: 02424 case X86::FUCOMPPr: 02425 case X86::IMPLICIT_DEF: 02426 case X86::IMPLICIT_USE: 02427 case X86::IN16rr: 02428 case X86::IN32rr: 02429 case X86::IN8rr: 02430 case X86::LAHF: 02431 case X86::LEAVE: 02432 case X86::NOOP: 02433 case X86::OUT16rr: 02434 case X86::OUT32rr: 02435 case X86::OUT8rr: 02436 case X86::PHI: 02437 case X86::RDTSC: 02438 case X86::REP_MOVSB: 02439 case X86::REP_MOVSD: 02440 case X86::REP_MOVSW: 02441 case X86::REP_STOSB: 02442 case X86::REP_STOSD: 02443 case X86::REP_STOSW: 02444 case X86::RET: 02445 case X86::SAHF: 02446 case X86::SFENCE: 02447 break; 02448 case X86::BSWAP32r: 02449 case X86::CALL32m: 02450 case X86::CALL32r: 02451 case X86::CALLpcrel32: 02452 case X86::DEC16m: 02453 case X86::DEC16r: 02454 case X86::DEC32m: 02455 case X86::DEC32r: 02456 case X86::DEC8m: 02457 case X86::DEC8r: 02458 case X86::DIV16m: 02459 case X86::DIV16r: 02460 case X86::DIV32m: 02461 case X86::DIV32r: 02462 case X86::DIV8m: 02463 case X86::DIV8r: 02464 case X86::FADD32m: 02465 case X86::FADD64m: 02466 case X86::FADDPrST0: 02467 case X86::FADDST0r: 02468 case X86::FCMOVB: 02469 case X86::FCMOVBE: 02470 case X86::FCMOVE: 02471 case X86::FCMOVNB: 02472 case X86::FCMOVNBE: 02473 case X86::FCMOVNE: 02474 case X86::FCMOVNP: 02475 case X86::FCMOVP: 02476 case X86::FDIV32m: 02477 case X86::FDIV64m: 02478 case X86::FDIVPrST0: 02479 case X86::FDIVR32m: 02480 case X86::FDIVR64m: 02481 case X86::FDIVRPrST0: 02482 case X86::FDIVRST0r: 02483 case X86::FDIVST0r: 02484 case X86::FIADD16m: 02485 case X86::FIADD32m: 02486 case X86::FIDIV16m: 02487 case X86::FIDIV32m: 02488 case X86::FIDIVR16m: 02489 case X86::FIDIVR32m: 02490 case X86::FILD16m: 02491 case X86::FILD32m: 02492 case X86::FILD64m: 02493 case X86::FIMUL16m: 02494 case X86::FIMUL32m: 02495 case X86::FIST16m: 02496 case X86::FIST32m: 02497 case X86::FISTP16m: 02498 case X86::FISTP32m: 02499 case X86::FISTP64m: 02500 case X86::FISTTP16m: 02501 case X86::FISTTP32m: 02502 case X86::FISTTP64m: 02503 case X86::FISUB16m: 02504 case X86::FISUB32m: 02505 case X86::FISUBR16m: 02506 case X86::FISUBR32m: 02507 case X86::FLD32m: 02508 case X86::FLD64m: 02509 case X86::FLDCW16m: 02510 case X86::FLDrr: 02511 case X86::FMUL32m: 02512 case X86::FMUL64m: 02513 case X86::FMULPrST0: 02514 case X86::FMULST0r: 02515 case X86::FNSTCW16m: 02516 case X86::FST32m: 02517 case X86::FST64m: 02518 case X86::FSTP32m: 02519 case X86::FSTP64m: 02520 case X86::FSTPrr: 02521 case X86::FSTrr: 02522 case X86::FSUB32m: 02523 case X86::FSUB64m: 02524 case X86::FSUBPrST0: 02525 case X86::FSUBR32m: 02526 case X86::FSUBR64m: 02527 case X86::FSUBRPrST0: 02528 case X86::FSUBRST0r: 02529 case X86::FSUBST0r: 02530 case X86::FUCOMIPr: 02531 case X86::FUCOMIr: 02532 case X86::FUCOMPr: 02533 case X86::FUCOMr: 02534 case X86::FXCH: 02535 case X86::IDIV16m: 02536 case X86::IDIV16r: 02537 case X86::IDIV32m: 02538 case X86::IDIV32r: 02539 case X86::IDIV8m: 02540 case X86::IDIV8r: 02541 case X86::IMPLICIT_DEF_FR32: 02542 case X86::IMPLICIT_DEF_FR64: 02543 case X86::IMPLICIT_DEF_R16: 02544 case X86::IMPLICIT_DEF_R32: 02545 case X86::IMPLICIT_DEF_R8: 02546 case X86::IMPLICIT_DEF_VR128: 02547 case X86::IMPLICIT_DEF_VR64: 02548 case X86::IMUL16m: 02549 case X86::IMUL16r: 02550 case X86::IMUL32m: 02551 case X86::IMUL32r: 02552 case X86::IMUL8m: 02553 case X86::IMUL8r: 02554 case X86::IN16ri: 02555 case X86::IN32ri: 02556 case X86::IN8ri: 02557 case X86::INC16m: 02558 case X86::INC16r: 02559 case X86::INC32m: 02560 case X86::INC32r: 02561 case X86::INC8m: 02562 case X86::INC8r: 02563 case X86::JA: 02564 case X86::JAE: 02565 case X86::JB: 02566 case X86::JBE: 02567 case X86::JE: 02568 case X86::JG: 02569 case X86::JGE: 02570 case X86::JL: 02571 case X86::JLE: 02572 case X86::JMP: 02573 case X86::JNE: 02574 case X86::JNO: 02575 case X86::JNP: 02576 case X86::JNS: 02577 case X86::JO: 02578 case X86::JP: 02579 case X86::JS: 02580 case X86::LDMXCSR: 02581 case X86::MUL16m: 02582 case X86::MUL16r: 02583 case X86::MUL32m: 02584 case X86::MUL32r: 02585 case X86::MUL8m: 02586 case X86::MUL8r: 02587 case X86::MovePCtoStack: 02588 case X86::NEG16m: 02589 case X86::NEG16r: 02590 case X86::NEG32m: 02591 case X86::NEG32r: 02592 case X86::NEG8m: 02593 case X86::NEG8r: 02594 case X86::NOT16m: 02595 case X86::NOT16r: 02596 case X86::NOT32m: 02597 case X86::NOT32r: 02598 case X86::NOT8m: 02599 case X86::NOT8r: 02600 case X86::POP32r: 02601 case X86::PREFETCHT0: 02602 case X86::PREFETCHT1: 02603 case X86::PREFETCHT2: 02604 case X86::PREFETCHTNTA: 02605 case X86::RETI: 02606 case X86::SETAEm: 02607 case X86::SETAEr: 02608 case X86::SETAm: 02609 case X86::SETAr: 02610 case X86::SETBEm: 02611 case X86::SETBEr: 02612 case X86::SETBm: 02613 case X86::SETBr: 02614 case X86::SETEm: 02615 case X86::SETEr: 02616 case X86::SETGEm: 02617 case X86::SETGEr: 02618 case X86::SETGm: 02619 case X86::SETGr: 02620 case X86::SETLEm: 02621 case X86::SETLEr: 02622 case X86::SETLm: 02623 case X86::SETLr: 02624 case X86::SETNEm: 02625 case X86::SETNEr: 02626 case X86::SETNPm: 02627 case X86::SETNPr: 02628 case X86::SETNSm: 02629 case X86::SETNSr: 02630 case X86::SETPm: 02631 case X86::SETPr: 02632 case X86::SETSm: 02633 case X86::SETSr: 02634 case X86::STMXCSR: 02635 switch (MI->getOpcode()) { 02636 case X86::BSWAP32r: 02637 case X86::CALL32r: 02638 case X86::DEC16r: 02639 case X86::DEC32r: 02640 case X86::DEC8r: 02641 case X86::DIV16r: 02642 case X86::DIV32r: 02643 case X86::DIV8r: 02644 case X86::FADDPrST0: 02645 case X86::FADDST0r: 02646 case X86::FCMOVB: 02647 case X86::FCMOVBE: 02648 case X86::FCMOVE: 02649 case X86::FCMOVNB: 02650 case X86::FCMOVNBE: 02651 case X86::FCMOVNE: 02652 case X86::FCMOVNP: 02653 case X86::FCMOVP: 02654 case X86::FDIVPrST0: 02655 case X86::FDIVRPrST0: 02656 case X86::FDIVRST0r: 02657 case X86::FDIVST0r: 02658 case X86::FLDrr: 02659 case X86::FMULPrST0: 02660 case X86::FMULST0r: 02661 case X86::FSTPrr: 02662 case X86::FSTrr: 02663 case X86::FSUBPrST0: 02664 case X86::FSUBRPrST0: 02665 case X86::FSUBRST0r: 02666 case X86::FSUBST0r: 02667 case X86::FUCOMIPr: 02668 case X86::FUCOMIr: 02669 case X86::FUCOMPr: 02670 case X86::FUCOMr: 02671 case X86::FXCH: 02672 case X86::IDIV16r: 02673 case X86::IDIV32r: 02674 case X86::IDIV8r: 02675 case X86::IMPLICIT_DEF_FR32: 02676 case X86::IMPLICIT_DEF_FR64: 02677 case X86::IMPLICIT_DEF_R16: 02678 case X86::IMPLICIT_DEF_R32: 02679 case X86::IMPLICIT_DEF_R8: 02680 case X86::IMPLICIT_DEF_VR128: 02681 case X86::IMPLICIT_DEF_VR64: 02682 case X86::IMUL16r: 02683 case X86::IMUL32r: 02684 case X86::IMUL8r: 02685 case X86::IN16ri: 02686 case X86::IN32ri: 02687 case X86::IN8ri: 02688 case X86::INC16r: 02689 case X86::INC32r: 02690 case X86::INC8r: 02691 case X86::JA: 02692 case X86::JAE: 02693 case X86::JB: 02694 case X86::JBE: 02695 case X86::JE: 02696 case X86::JG: 02697 case X86::JGE: 02698 case X86::JL: 02699 case X86::JLE: 02700 case X86::JMP: 02701 case X86::JNE: 02702 case X86::JNO: 02703 case X86::JNP: 02704 case X86::JNS: 02705 case X86::JO: 02706 case X86::JP: 02707 case X86::JS: 02708 case X86::MUL16r: 02709 case X86::MUL32r: 02710 case X86::MUL8r: 02711 case X86::NEG16r: 02712 case X86::NEG32r: 02713 case X86::NEG8r: 02714 case X86::NOT16r: 02715 case X86::NOT32r: 02716 case X86::NOT8r: 02717 case X86::POP32r: 02718 case X86::RETI: 02719 case X86::SETAEr: 02720 case X86::SETAr: 02721 case X86::SETBEr: 02722 case X86::SETBr: 02723 case X86::SETEr: 02724 case X86::SETGEr: 02725 case X86::SETGr: 02726 case X86::SETLEr: 02727 case X86::SETLr: 02728 case X86::SETNEr: 02729 case X86::SETNPr: 02730 case X86::SETNSr: 02731 case X86::SETPr: 02732 case X86::SETSr: printOperand(MI, 0); break; 02733 case X86::CALL32m: 02734 case X86::DEC32m: 02735 case X86::DIV32m: 02736 case X86::FIADD32m: 02737 case X86::FIDIV32m: 02738 case X86::FIDIVR32m: 02739 case X86::FILD32m: 02740 case X86::FIMUL32m: 02741 case X86::FIST32m: 02742 case X86::FISTP32m: 02743 case X86::FISTTP32m: 02744 case X86::FISUB32m: 02745 case X86::FISUBR32m: 02746 case X86::IDIV32m: 02747 case X86::IMUL32m: 02748 case X86::INC32m: 02749 case X86::LDMXCSR: 02750 case X86::MUL32m: 02751 case X86::NEG32m: 02752 case X86::NOT32m: 02753 case X86::STMXCSR: printi32mem(MI, 0); break; 02754 case X86::CALLpcrel32: printOperand(MI, 0, "call"); break; 02755 case X86::DEC16m: 02756 case X86::DIV16m: 02757 case X86::FIADD16m: 02758 case X86::FIDIV16m: 02759 case X86::FIDIVR16m: 02760 case X86::FILD16m: 02761 case X86::FIMUL16m: 02762 case X86::FIST16m: 02763 case X86::FISTP16m: 02764 case X86::FISTTP16m: 02765 case X86::FISUB16m: 02766 case X86::FISUBR16m: 02767 case X86::FLDCW16m: 02768 case X86::FNSTCW16m: 02769 case X86::IDIV16m: 02770 case X86::IMUL16m: 02771 case X86::INC16m: 02772 case X86::MUL16m: 02773 case X86::NEG16m: 02774 case X86::NOT16m: printi16mem(MI, 0); break; 02775 case X86::DEC8m: 02776 case X86::DIV8m: 02777 case X86::IDIV8m: 02778 case X86::IMUL8m: 02779 case X86::INC8m: 02780 case X86::MUL8m: 02781 case X86::NEG8m: 02782 case X86::NOT8m: 02783 case X86::PREFETCHT0: 02784 case X86::PREFETCHT1: 02785 case X86::PREFETCHT2: 02786 case X86::PREFETCHTNTA: 02787 case X86::SETAEm: 02788 case X86::SETAm: 02789 case X86::SETBEm: 02790 case X86::SETBm: 02791 case X86::SETEm: 02792 case X86::SETGEm: 02793 case X86::SETGm: 02794 case X86::SETLEm: 02795 case X86::SETLm: 02796 case X86::SETNEm: 02797 case X86::SETNPm: 02798 case X86::SETNSm: 02799 case X86::SETPm: 02800 case X86::SETSm: printi8mem(MI, 0); break; 02801 case X86::FADD32m: 02802 case X86::FDIV32m: 02803 case X86::FDIVR32m: 02804 case X86::FLD32m: 02805 case X86::FMUL32m: 02806 case X86::FST32m: 02807 case X86::FSTP32m: 02808 case X86::FSUB32m: 02809 case X86::FSUBR32m: printf32mem(MI, 0); break; 02810 case X86::FADD64m: 02811 case X86::FDIV64m: 02812 case X86::FDIVR64m: 02813 case X86::FLD64m: 02814 case X86::FMUL64m: 02815 case X86::FST64m: 02816 case X86::FSTP64m: 02817 case X86::FSUB64m: 02818 case X86::FSUBR64m: printf64mem(MI, 0); break; 02819 case X86::FILD64m: 02820 case X86::FISTP64m: 02821 case X86::FISTTP64m: printi64mem(MI, 0); break; 02822 case X86::MovePCtoStack: printPICLabel(MI, 0); break; 02823 } 02824 O << "\n"; 02825 break; 02826 case X86::CMPPDrm: 02827 case X86::CMPPSrm: 02828 printSSECC(MI, 5); 02829 switch (MI->getOpcode()) { 02830 case X86::CMPPDrm: O << "pd "; break; 02831 case X86::CMPPSrm: O << "ps "; break; 02832 } 02833 printOperand(MI, 0); 02834 O << ", "; 02835 printf128mem(MI, 1); 02836 O << "\n"; 02837 break; 02838 case X86::CMPPDrr: 02839 case X86::CMPPSrr: 02840 case X86::CMPSDrr: 02841 case X86::CMPSSrr: 02842 case X86::Int_CMPSDrr: 02843 case X86::Int_CMPSSrr: 02844 printSSECC(MI, 2); 02845 switch (MI->getOpcode()) { 02846 case X86::CMPPDrr: O << "pd "; break; 02847 case X86::CMPPSrr: O << "ps "; break; 02848 case X86::CMPSDrr: 02849 case X86::Int_CMPSDrr: O << "sd "; break; 02850 case X86::CMPSSrr: 02851 case X86::Int_CMPSSrr: O << "ss "; break; 02852 } 02853 printOperand(MI, 0); 02854 O << ", "; 02855 printOperand(MI, 1); 02856 O << "\n"; 02857 break; 02858 case X86::CMPSDrm: 02859 case X86::Int_CMPSDrm: 02860 printSSECC(MI, 5); 02861 O << "sd "; 02862 printOperand(MI, 0); 02863 O << ", "; 02864 printf64mem(MI, 1); 02865 O << "\n"; 02866 break; 02867 case X86::CMPSSrm: 02868 case X86::Int_CMPSSrm: 02869 printSSECC(MI, 5); 02870 O << "ss "; 02871 printOperand(MI, 0); 02872 O << ", "; 02873 printf32mem(MI, 1); 02874 O << "\n"; 02875 break; 02876 case X86::DWARF_LABEL: 02877 printOperand(MI, 0, "debug"); 02878 O << ":\n"; 02879 break; 02880 case X86::DWARF_LOC: 02881 printOperand(MI, 2); 02882 O << ", "; 02883 printOperand(MI, 0); 02884 O << ", "; 02885 printOperand(MI, 1); 02886 O << "\n"; 02887 break; 02888 case X86::FADDrST0: 02889 case X86::FDIVRrST0: 02890 case X86::FDIVrST0: 02891 case X86::FMULrST0: 02892 case X86::FSUBRrST0: 02893 case X86::FSUBrST0: 02894 case X86::OUT16ir: 02895 case X86::OUT32ir: 02896 case X86::OUT8ir: 02897 case X86::ROL16rCL: 02898 case X86::ROL32rCL: 02899 case X86::ROL8rCL: 02900 case X86::ROR16rCL: 02901 case X86::ROR32rCL: 02902 case X86::ROR8rCL: 02903 case X86::SAR16rCL: 02904 case X86::SAR32rCL: 02905 case X86::SAR8rCL: 02906 case X86::SHL16rCL: 02907 case X86::SHL32rCL: 02908 case X86::SHL8rCL: 02909 case X86::SHR16rCL: 02910 case X86::SHR32rCL: 02911 case X86::SHR8rCL: 02912 case X86::TAILJMPr: 02913 printOperand(MI, 0); 02914 switch (MI->getOpcode()) { 02915 case X86::FADDrST0: 02916 case X86::FDIVRrST0: 02917 case X86::FDIVrST0: 02918 case X86::FMULrST0: 02919 case X86::FSUBRrST0: 02920 case X86::FSUBrST0: O << ", %ST(0)\n"; break; 02921 case X86::OUT16ir: O << ", %AX\n"; break; 02922 case X86::OUT32ir: O << ", %EAX\n"; break; 02923 case X86::OUT8ir: O << ", %AL\n"; break; 02924 case X86::ROL16rCL: 02925 case X86::ROL32rCL: 02926 case X86::ROL8rCL: 02927 case X86::ROR16rCL: 02928 case X86::ROR32rCL: 02929 case X86::ROR8rCL: 02930 case X86::SAR16rCL: 02931 case X86::SAR32rCL: 02932 case X86::SAR8rCL: 02933 case X86::SHL16rCL: 02934 case X86::SHL32rCL: 02935 case X86::SHL8rCL: 02936 case X86::SHR16rCL: 02937 case X86::SHR32rCL: 02938 case X86::SHR8rCL: O << ", %CL\n"; break; 02939 case X86::TAILJMPr: O << " # TAIL CALL\n"; break; 02940 } 02941 break; 02942 case X86::IMUL16rmi: 02943 case X86::IMUL16rmi8: 02944 case X86::IMUL32rmi: 02945 case X86::IMUL32rmi8: 02946 case X86::PEXTRWm: 02947 case X86::PINSRWm: 02948 case X86::PSHUFDmi: 02949 case X86::PSHUFHWmi: 02950 case X86::PSHUFLWmi: 02951 case X86::PSHUFWmi: 02952 case X86::SHUFPDrm: 02953 case X86::SHUFPSrm: 02954 printOperand(MI, 0); 02955 O << ", "; 02956 switch (MI->getOpcode()) { 02957 case X86::IMUL16rmi: 02958 case X86::IMUL16rmi8: 02959 case X86::PINSRWm: printi16mem(MI, 1); break; 02960 case X86::IMUL32rmi: 02961 case X86::IMUL32rmi8: printi32mem(MI, 1); break; 02962 case X86::PEXTRWm: 02963 case X86::PSHUFDmi: 02964 case X86::PSHUFHWmi: 02965 case X86::PSHUFLWmi: printi128mem(MI, 1); break; 02966 case X86::PSHUFWmi: printi64mem(MI, 1); break; 02967 case X86::SHUFPDrm: 02968 case X86::SHUFPSrm: printf128mem(MI, 1); break; 02969 } 02970 O << ", "; 02971 printOperand(MI, 5); 02972 O << "\n"; 02973 break; 02974 case X86::IMUL16rri: 02975 case X86::IMUL16rri8: 02976 case X86::IMUL32rri: 02977 case X86::IMUL32rri8: 02978 case X86::PEXTRWr: 02979 case X86::PINSRWr: 02980 case X86::PSHUFDri: 02981 case X86::PSHUFHWri: 02982 case X86::PSHUFLWri: 02983 case X86::PSHUFWri: 02984 case X86::SHLD16rri8: 02985 case X86::SHLD32rri8: 02986 case X86::SHRD16rri8: 02987 case X86::SHRD32rri8: 02988 case X86::SHUFPDrr: 02989 case X86::SHUFPSrr: 02990 printOperand(MI, 0); 02991 O << ", "; 02992 printOperand(MI, 1); 02993 O << ", "; 02994 printOperand(MI, 2); 02995 O << "\n"; 02996 break; 02997 case X86::ROL16mCL: 02998 case X86::ROL32mCL: 02999 case X86::ROL8mCL: 03000 case X86::ROR16mCL: 03001 case X86::ROR32mCL: 03002 case X86::ROR8mCL: 03003 case X86::SAR16mCL: 03004 case X86::SAR32mCL: 03005 case X86::SAR8mCL: 03006 case X86::SHL16mCL: 03007 case X86::SHL32mCL: 03008 case X86::SHL8mCL: 03009 case X86::SHR16mCL: 03010 case X86::SHR32mCL: 03011 case X86::SHR8mCL: 03012 switch (MI->getOpcode()) { 03013 case X86::ROL16mCL: 03014 case X86::ROR16mCL: 03015 case X86::SAR16mCL: 03016 case X86::SHL16mCL: 03017 case X86::SHR16mCL: printi16mem(MI, 0); break; 03018 case X86::ROL32mCL: 03019 case X86::ROR32mCL: 03020 case X86::SAR32mCL: 03021 case X86::SHL32mCL: 03022 case X86::SHR32mCL: printi32mem(MI, 0); break; 03023 case X86::ROL8mCL: 03024 case X86::ROR8mCL: 03025 case X86::SAR8mCL: 03026 case X86::SHL8mCL: 03027 case X86::SHR8mCL: printi8mem(MI, 0); break; 03028 } 03029 O << ", %CL\n"; 03030 break; 03031 case X86::SHLD16mrCL: 03032 case X86::SHLD32mrCL: 03033 case X86::SHRD16mrCL: 03034 case X86::SHRD32mrCL: 03035 switch (MI->getOpcode()) { 03036 case X86::SHLD16mrCL: 03037 case X86::SHRD16mrCL: printi16mem(MI, 0); break; 03038 case X86::SHLD32mrCL: 03039 case X86::SHRD32mrCL: printi32mem(MI, 0); break; 03040 } 03041 O << ", "; 03042 printOperand(MI, 4); 03043 O << ", %CL\n"; 03044 break; 03045 case X86::SHLD16mri8: 03046 case X86::SHLD32mri8: 03047 case X86::SHRD16mri8: 03048 case X86::SHRD32mri8: 03049 switch (MI->getOpcode()) { 03050 case X86::SHLD16mri8: 03051 case X86::SHRD16mri8: printi16mem(MI, 0); break; 03052 case X86::SHLD32mri8: 03053 case X86::SHRD32mri8: printi32mem(MI, 0); break; 03054 } 03055 O << ", "; 03056 printOperand(MI, 4); 03057 O << ", "; 03058 printOperand(MI, 5); 03059 O << "\n"; 03060 break; 03061 case X86::SHLD16rrCL: 03062 case X86::SHLD32rrCL: 03063 case X86::SHRD16rrCL: 03064 case X86::SHRD32rrCL: 03065 printOperand(MI, 0); 03066 O << ", "; 03067 printOperand(MI, 1); 03068 O << ", %CL\n"; 03069 break; 03070 case X86::TAILJMPd: 03071 case X86::TAILJMPm: 03072 switch (MI->getOpcode()) { 03073 case X86::TAILJMPd: printOperand(MI, 0, "call"); break; 03074 case X86::TAILJMPm: printi32mem(MI, 0); break; 03075 } 03076 O << " # TAIL CALL\n"; 03077 break; 03078 } 03079 return true; 03080 }