LLVM API Documentation

SparcV9Internals.h

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00001 //===-- SparcV9Internals.h --------------------------------------*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file defines stuff that is to be private to the SparcV9 backend, but is
00011 // shared among different portions of the backend.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef SPARCV9INTERNALS_H
00016 #define SPARCV9INTERNALS_H
00017 
00018 #include "llvm/CodeGen/MachineInstrBuilder.h"
00019 #include "llvm/Target/TargetMachine.h"
00020 #include "llvm/Target/TargetSchedInfo.h"
00021 #include "llvm/Target/TargetFrameInfo.h"
00022 #include "SparcV9RegInfo.h"
00023 #include "llvm/Type.h"
00024 #include "SparcV9RegClassInfo.h"
00025 
00026 namespace llvm {
00027 
00028 class V9LiveRange;
00029 class SparcV9TargetMachine;
00030 class ModulePass;
00031 class GetElementPtrInst;
00032 
00033 enum SparcV9InstrSchedClass {
00034   SPARC_NONE,           /* Instructions with no scheduling restrictions */
00035   SPARC_IEUN,           /* Integer class that can use IEU0 or IEU1 */
00036   SPARC_IEU0,           /* Integer class IEU0 */
00037   SPARC_IEU1,           /* Integer class IEU1 */
00038   SPARC_FPM,            /* FP Multiply or Divide instructions */
00039   SPARC_FPA,            /* All other FP instructions */
00040   SPARC_CTI,            /* Control-transfer instructions */
00041   SPARC_LD,             /* Load instructions */
00042   SPARC_ST,             /* Store instructions */
00043   SPARC_SINGLE,         /* Instructions that must issue by themselves */
00044 
00045   SPARC_INV,            /* This should stay at the end for the next value */
00046   SPARC_NUM_SCHED_CLASSES = SPARC_INV
00047 };
00048 
00049 
00050 //---------------------------------------------------------------------------
00051 // enum SparcV9MachineOpCode.
00052 // const TargetInstrDescriptor SparcV9MachineInstrDesc[]
00053 //
00054 // Purpose:
00055 //   Description of UltraSparcV9 machine instructions.
00056 //
00057 //---------------------------------------------------------------------------
00058 
00059 namespace V9 {
00060   enum SparcV9MachineOpCode {
00061 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
00062           NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS)             \
00063    ENUM,
00064 #include "SparcV9Instr.def"
00065 
00066     // End-of-array marker
00067     INVALID_OPCODE,
00068     NUM_REAL_OPCODES = PHI,             // number of valid opcodes
00069     NUM_TOTAL_OPCODES = INVALID_OPCODE
00070   };
00071 }
00072 
00073 // Array of machine instruction descriptions...
00074 extern const TargetInstrDescriptor SparcV9MachineInstrDesc[];
00075 
00076 //---------------------------------------------------------------------------
00077 // class SparcV9SchedInfo
00078 //
00079 // Purpose:
00080 //   Interface to instruction scheduling information for UltraSPARC.
00081 //   The parameter values above are based on UltraSPARC IIi.
00082 //---------------------------------------------------------------------------
00083 
00084 class SparcV9SchedInfo: public TargetSchedInfo {
00085 public:
00086   SparcV9SchedInfo(const TargetMachine &tgt);
00087 protected:
00088   virtual void initializeResources();
00089 };
00090 
00091 /// createStackSlotsPass - External interface to stack-slots pass that enters 2
00092 /// empty slots at the top of each function stack
00093 ///
00094 FunctionPass *createStackSlotsPass(const TargetMachine &TM);
00095 
00096 /// Specializes LLVM code for a target machine.
00097 ///
00098 FunctionPass *createPreSelectionPass(const TargetMachine &TM);
00099 
00100 // DecomposeMultiDimRefs - Convert multi-dimensional references consisting of
00101 // any combination of 2 or more array and structure indices into a sequence of
00102 // instructions (using getelementpr and cast) so that each instruction has at
00103 // most one index (except structure references, which need an extra leading
00104 // index of [0]).
00105 // This pass decomposes all multi-dimensional references in a function.
00106 FunctionPass *createDecomposeMultiDimRefsPass();
00107 
00108 // This function decomposes a single instance of such a reference.
00109 // Return value: true if the instruction was replaced; false otherwise.
00110 //
00111 bool DecomposeArrayRef(GetElementPtrInst* GEP);
00112 
00113 /// Peephole optimization pass operating on machine code
00114 ///
00115 FunctionPass *createPeepholeOptsPass(const TargetMachine &TM);
00116 
00117 /// Writes out assembly code for the module, one function at a time
00118 ///
00119 FunctionPass *createAsmPrinterPass(std::ostream &Out, TargetMachine &TM);
00120 
00121 /// getPrologEpilogInsertionPass - Inserts prolog/epilog code.
00122 ///
00123 FunctionPass* createPrologEpilogInsertionPass();
00124 
00125 /// getBytecodeAsmPrinterPass - Emits final LLVM bytecode to assembly file.
00126 ///
00127 ModulePass* createBytecodeAsmPrinterPass(std::ostream &Out);
00128 
00129 FunctionPass *createSparcV9MachineCodeDestructionPass();
00130 
00131 } // End llvm namespace
00132 
00133 #endif