LLVM API Documentation
00001 //===-- SparcV9RegInfo.h - SparcV9 Target Register Info ---------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file is used to describe the register file of the SparcV9 target to 00011 // its register allocator. 00012 // 00013 //===----------------------------------------------------------------------===// 00014 00015 #ifndef SPARCV9REGINFO_H 00016 #define SPARCV9REGINFO_H 00017 00018 #include "llvm/ADT/hash_map" 00019 #include <string> 00020 #include <cassert> 00021 00022 namespace llvm { 00023 00024 class TargetMachine; 00025 class IGNode; 00026 class Type; 00027 class Value; 00028 class LiveRangeInfo; 00029 class Function; 00030 class V9LiveRange; 00031 class AddedInstrns; 00032 class MachineInstr; 00033 class BasicBlock; 00034 class SparcV9TargetMachine; 00035 00036 00037 ///---------------------------------------------------------------------------- 00038 /// Interface to description of machine register class (e.g., int reg class 00039 /// float reg class etc) 00040 /// 00041 class TargetRegClassInfo { 00042 protected: 00043 const unsigned RegClassID; // integer ID of a reg class 00044 const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc. 00045 const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc. 00046 00047 public: 00048 virtual ~TargetRegClassInfo() {} 00049 00050 inline unsigned getRegClassID() const { return RegClassID; } 00051 inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; } 00052 inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; } 00053 00054 // This method marks the registers used for a given register number. 00055 // This defaults to marking a single register but may mark multiple 00056 // registers when a single number denotes paired registers. 00057 // 00058 virtual void markColorsUsed(unsigned RegInClass, 00059 int UserRegType, 00060 int RegTypeWanted, 00061 std::vector<bool> &IsColorUsedArr) const { 00062 assert(RegInClass < NumOfAllRegs && RegInClass < IsColorUsedArr.size()); 00063 assert(UserRegType == RegTypeWanted && 00064 "Default method is probably incorrect for class with multiple types."); 00065 IsColorUsedArr[RegInClass] = true; 00066 } 00067 00068 // This method finds unused registers of the specified register type, 00069 // using the given "used" flag array IsColorUsedArr. It defaults to 00070 // checking a single entry in the array directly, but that can be overridden 00071 // for paired registers and other such silliness. 00072 // It returns -1 if no unused color is found. 00073 // 00074 virtual int findUnusedColor(int RegTypeWanted, 00075 const std::vector<bool> &IsColorUsedArr) const { 00076 // find first unused color in the IsColorUsedArr directly 00077 unsigned NC = this->getNumOfAvailRegs(); 00078 assert(IsColorUsedArr.size() >= NC && "Invalid colors-used array"); 00079 for (unsigned c = 0; c < NC; c++) 00080 if (!IsColorUsedArr[c]) 00081 return c; 00082 return -1; 00083 } 00084 00085 // This method should find a color which is not used by neighbors 00086 // (i.e., a false position in IsColorUsedArr) and 00087 virtual void colorIGNode(IGNode *Node, 00088 const std::vector<bool> &IsColorUsedArr) const = 0; 00089 00090 // Check whether a specific register is volatile, i.e., whether it is not 00091 // preserved across calls 00092 virtual bool isRegVolatile(int Reg) const = 0; 00093 00094 // Check whether a specific register is modified as a side-effect of the 00095 // call instruction itself, 00096 virtual bool modifiedByCall(int Reg) const { return false; } 00097 00098 virtual const char* const getRegName(unsigned reg) const = 0; 00099 00100 TargetRegClassInfo(unsigned ID, unsigned NVR, unsigned NAR) 00101 : RegClassID(ID), NumOfAvailRegs(NVR), NumOfAllRegs(NAR) {} 00102 }; 00103 00104 /// SparcV9RegInfo - Interface to register info of SparcV9 target machine 00105 /// 00106 class SparcV9RegInfo { 00107 SparcV9RegInfo(const SparcV9RegInfo &); // DO NOT IMPLEMENT 00108 void operator=(const SparcV9RegInfo &); // DO NOT IMPLEMENT 00109 protected: 00110 // A vector of all machine register classes 00111 // 00112 std::vector<const TargetRegClassInfo *> MachineRegClassArr; 00113 00114 public: 00115 const TargetMachine ⌖ 00116 00117 // A register can be initialized to an invalid number. That number can 00118 // be obtained using this method. 00119 // 00120 static int getInvalidRegNum() { return -1; } 00121 00122 00123 // According the definition of a MachineOperand class, a Value in a 00124 // machine instruction can go into either a normal register or a 00125 // condition code register. If isCCReg is true below, the ID of the condition 00126 // code register class will be returned. Otherwise, the normal register 00127 // class (eg. int, float) must be returned. 00128 00129 // To find the register class used for a specified Type 00130 // 00131 unsigned getRegClassIDOfType (const Type *type, 00132 bool isCCReg = false) const; 00133 00134 // To find the register class to which a specified register belongs 00135 // 00136 unsigned getRegClassIDOfRegType(int regType) const; 00137 00138 unsigned getRegClassIDOfReg(int unifiedRegNum) const { 00139 unsigned classId = 0; 00140 (void) getClassRegNum(unifiedRegNum, classId); 00141 return classId; 00142 } 00143 00144 unsigned int getNumOfRegClasses() const { 00145 return MachineRegClassArr.size(); 00146 } 00147 00148 const TargetRegClassInfo *getMachineRegClass(unsigned i) const { 00149 return MachineRegClassArr[i]; 00150 } 00151 00152 // getZeroRegNum - returns the register that is hardwired to always contain 00153 // zero, if any (-1 if none). This is the unified register number. 00154 // 00155 unsigned getZeroRegNum() const; 00156 00157 // The following methods are used to color special live ranges (e.g. 00158 // method args and return values etc.) with specific hardware registers 00159 // as required. See SparcRegInfo.cpp for the implementation for Sparc. 00160 // 00161 void suggestRegs4MethodArgs(const Function *Func, 00162 LiveRangeInfo& LRI) const; 00163 00164 void suggestRegs4CallArgs(MachineInstr *CallI, 00165 LiveRangeInfo& LRI) const; 00166 00167 void suggestReg4RetValue(MachineInstr *RetI, 00168 LiveRangeInfo& LRI) const; 00169 00170 void colorMethodArgs(const Function *Func, 00171 LiveRangeInfo &LRI, 00172 std::vector<MachineInstr*>& InstrnsBefore, 00173 std::vector<MachineInstr*>& InstrnsAfter) const; 00174 00175 00176 // Check whether a specific register is volatile, i.e., whether it is not 00177 // preserved across calls 00178 inline bool isRegVolatile(int RegClassID, int Reg) const { 00179 return MachineRegClassArr[RegClassID]->isRegVolatile(Reg); 00180 } 00181 00182 // Check whether a specific register is modified as a side-effect of the 00183 // call instruction itself, 00184 inline bool modifiedByCall(int RegClassID, int Reg) const { 00185 return MachineRegClassArr[RegClassID]->modifiedByCall(Reg); 00186 } 00187 00188 // getCallAddressReg - Returns the reg used for pushing the address 00189 // when a method is called. This can be used for other purposes 00190 // between calls 00191 // 00192 unsigned getCallAddressReg() const; 00193 00194 // Each register class has a separate space for register IDs. To convert 00195 // a regId in a register class to a common Id, or vice versa, 00196 // we use the folloing two methods. 00197 // 00198 // This method converts from class reg. number to unified register number. 00199 int getUnifiedRegNum(unsigned regClassID, int reg) const { 00200 if (reg == getInvalidRegNum()) { return getInvalidRegNum(); } 00201 assert(regClassID < getNumOfRegClasses() && "Invalid register class"); 00202 int totalRegs = 0; 00203 for (unsigned rcid = 0; rcid < regClassID; ++rcid) 00204 totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs(); 00205 return reg + totalRegs; 00206 } 00207 00208 // This method converts the unified number to the number in its class, 00209 // and returns the class ID in regClassID. 00210 int getClassRegNum(int uRegNum, unsigned& regClassID) const { 00211 if (uRegNum == getInvalidRegNum()) { return getInvalidRegNum(); } 00212 00213 int totalRegs = 0, rcid = 0, NC = getNumOfRegClasses(); 00214 while (rcid < NC && 00215 uRegNum>= totalRegs+(int)MachineRegClassArr[rcid]->getNumOfAllRegs()) 00216 { 00217 totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs(); 00218 rcid++; 00219 } 00220 if (rcid == NC) { 00221 assert(0 && "getClassRegNum(): Invalid register number"); 00222 return getInvalidRegNum(); 00223 } 00224 regClassID = rcid; 00225 return uRegNum - totalRegs; 00226 } 00227 00228 // Returns the assembly-language name of the specified machine register. 00229 // 00230 const char * const getUnifiedRegName(int UnifiedRegNum) const { 00231 unsigned regClassID = getNumOfRegClasses(); // initialize to invalid value 00232 int regNumInClass = getClassRegNum(UnifiedRegNum, regClassID); 00233 return MachineRegClassArr[regClassID]->getRegName(regNumInClass); 00234 } 00235 00236 // This method gives the the number of bytes of stack space allocated 00237 // to a register when it is spilled to the stack, according to its 00238 // register type. 00239 // 00240 // For SparcV9, currently we allocate 8 bytes on stack for all 00241 // register types. We can optimize this later if necessary to save stack 00242 // space (However, should make sure that stack alignment is correct) 00243 // 00244 int getSpilledRegSize(int RegType) const { 00245 return 8; 00246 } 00247 00248 private: 00249 // Number of registers used for passing int args (usually 6: %o0 - %o5) 00250 // 00251 unsigned const NumOfIntArgRegs; 00252 00253 // Number of registers used for passing float args (usually 32: %f0 - %f31) 00254 // 00255 unsigned const NumOfFloatArgRegs; 00256 00257 // The following methods are used to color special live ranges (e.g. 00258 // function args and return values etc.) with specific hardware registers 00259 // as required. See SparcV9RegInfo.cpp for the implementation. 00260 // 00261 void suggestReg4RetAddr(MachineInstr *RetMI, 00262 LiveRangeInfo &LRI) const; 00263 00264 void suggestReg4CallAddr(MachineInstr *CallMI, LiveRangeInfo &LRI) const; 00265 00266 // Helper used by the all the getRegType() functions. 00267 int getRegTypeForClassAndType(unsigned regClassID, const Type* type) const; 00268 00269 public: 00270 // Type of registers available in SparcV9. There can be several reg types 00271 // in the same class. For instace, the float reg class has Single/Double 00272 // types 00273 // 00274 enum RegTypes { 00275 IntRegType, 00276 FPSingleRegType, 00277 FPDoubleRegType, 00278 IntCCRegType, 00279 FloatCCRegType, 00280 SpecialRegType 00281 }; 00282 00283 // The actual register classes in the SparcV9 00284 // 00285 // **** WARNING: If this enum order is changed, also modify 00286 // getRegisterClassOfValue method below since it assumes this particular 00287 // order for efficiency. 00288 // 00289 enum RegClassIDs { 00290 IntRegClassID, // Integer 00291 FloatRegClassID, // Float (both single/double) 00292 IntCCRegClassID, // Int Condition Code 00293 FloatCCRegClassID, // Float Condition code 00294 SpecialRegClassID // Special (unallocated) registers 00295 }; 00296 00297 SparcV9RegInfo(const SparcV9TargetMachine &tgt); 00298 00299 ~SparcV9RegInfo() { 00300 for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i) 00301 delete MachineRegClassArr[i]; 00302 } 00303 00304 // Returns the register containing the return address. 00305 // It should be made sure that this register contains the return 00306 // value when a return instruction is reached. 00307 // 00308 unsigned getReturnAddressReg() const; 00309 00310 // Number of registers used for passing int args (usually 6: %o0 - %o5) 00311 // and float args (usually 32: %f0 - %f31) 00312 // 00313 unsigned const getNumOfIntArgRegs() const { return NumOfIntArgRegs; } 00314 unsigned const getNumOfFloatArgRegs() const { return NumOfFloatArgRegs; } 00315 00316 // Compute which register can be used for an argument, if any 00317 // 00318 int regNumForIntArg(bool inCallee, bool isVarArgsCall, 00319 unsigned argNo, unsigned& regClassId) const; 00320 00321 int regNumForFPArg(unsigned RegType, bool inCallee, bool isVarArgsCall, 00322 unsigned argNo, unsigned& regClassId) const; 00323 00324 00325 // method used for printing a register for debugging purposes 00326 // 00327 void printReg(const V9LiveRange *LR) const; 00328 00329 // To obtain the return value and the indirect call address (if any) 00330 // contained in a CALL machine instruction 00331 // 00332 const Value * getCallInstRetVal(const MachineInstr *CallMI) const; 00333 const Value * getCallInstIndirectAddrVal(const MachineInstr *CallMI) const; 00334 00335 // The following methods are used to generate "copy" machine instructions 00336 // for an architecture. Currently they are used in TargetRegClass 00337 // interface. However, they can be moved to TargetInstrInfo interface if 00338 // necessary. 00339 // 00340 // The function regTypeNeedsScratchReg() can be used to check whether a 00341 // scratch register is needed to copy a register of type `regType' to 00342 // or from memory. If so, such a scratch register can be provided by 00343 // the caller (e.g., if it knows which regsiters are free); otherwise 00344 // an arbitrary one will be chosen and spilled by the copy instructions. 00345 // If a scratch reg is needed, the reg. type that must be used 00346 // for scratch registers is returned in scratchRegType. 00347 // 00348 00349 bool regTypeNeedsScratchReg(int RegType, 00350 int& scratchRegClassId) const; 00351 00352 void cpReg2RegMI(std::vector<MachineInstr*>& mvec, 00353 unsigned SrcReg, unsigned DestReg, 00354 int RegType) const; 00355 00356 void cpReg2MemMI(std::vector<MachineInstr*>& mvec, 00357 unsigned SrcReg, unsigned DestPtrReg, 00358 int Offset, int RegType, int scratchReg = -1) const; 00359 00360 void cpMem2RegMI(std::vector<MachineInstr*>& mvec, 00361 unsigned SrcPtrReg, int Offset, unsigned DestReg, 00362 int RegType, int scratchReg = -1) const; 00363 00364 void cpValue2Value(Value *Src, Value *Dest, 00365 std::vector<MachineInstr*>& mvec) const; 00366 00367 // Get the register type for a register identified different ways. 00368 // Note that getRegTypeForLR(LR) != getRegTypeForDataType(LR->getType())! 00369 // The reg class of a LR depends both on the Value types in it and whether 00370 // they are CC registers or not (for example). 00371 int getRegTypeForDataType(const Type* type) const; 00372 int getRegTypeForLR(const V9LiveRange *LR) const; 00373 int getRegType(int unifiedRegNum) const; 00374 00375 unsigned getFramePointer() const; 00376 unsigned getStackPointer() const; 00377 }; 00378 00379 } // End llvm namespace 00380 00381 #endif // SPARCV9REGINFO_H