LLVM API Documentation

X86IntelAsmPrinter.h

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00001 //===-- X86IntelAsmPrinter.h - Convert X86 LLVM code to Intel assembly ----===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // Intel assembly code printer class.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef X86INTELASMPRINTER_H
00015 #define X86INTELASMPRINTER_H
00016 
00017 #include "X86AsmPrinter.h"
00018 #include "llvm/CodeGen/ValueTypes.h"
00019 #include "llvm/Target/MRegisterInfo.h"
00020 
00021 namespace llvm {
00022 
00023 struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
00024  X86IntelAsmPrinter(std::ostream &O, X86TargetMachine &TM)
00025     : X86SharedAsmPrinter(O, TM) { }
00026 
00027   virtual const char *getPassName() const {
00028     return "X86 Intel-Style Assembly Printer";
00029   }
00030 
00031   /// printInstruction - This method is automatically generated by tablegen
00032   /// from the instruction set description.  This method returns true if the
00033   /// machine instruction was sufficiently described to print it, otherwise it
00034   /// returns false.
00035   bool printInstruction(const MachineInstr *MI);
00036 
00037   // This method is used by the tablegen'erated instruction printer.
00038   void printOperand(const MachineInstr *MI, unsigned OpNo,
00039                     const char *Modifier = 0) {
00040     const MachineOperand &MO = MI->getOperand(OpNo);
00041     if (MO.getType() == MachineOperand::MO_MachineRegister) {
00042       assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
00043       // Bug Workaround: See note in Printer::doInitialization about %.
00044       O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
00045     } else {
00046       printOp(MO, Modifier);
00047     }
00048   }
00049 
00050   void printi8mem(const MachineInstr *MI, unsigned OpNo) {
00051     O << "BYTE PTR ";
00052     printMemReference(MI, OpNo);
00053   }
00054   void printi16mem(const MachineInstr *MI, unsigned OpNo) {
00055     O << "WORD PTR ";
00056     printMemReference(MI, OpNo);
00057   }
00058   void printi32mem(const MachineInstr *MI, unsigned OpNo) {
00059     O << "DWORD PTR ";
00060     printMemReference(MI, OpNo);
00061   }
00062   void printi64mem(const MachineInstr *MI, unsigned OpNo) {
00063     O << "QWORD PTR ";
00064     printMemReference(MI, OpNo);
00065   }
00066   void printi128mem(const MachineInstr *MI, unsigned OpNo) {
00067     O << "XMMWORD PTR ";
00068     printMemReference(MI, OpNo);
00069   }
00070   void printf32mem(const MachineInstr *MI, unsigned OpNo) {
00071     O << "DWORD PTR ";
00072     printMemReference(MI, OpNo);
00073   }
00074   void printf64mem(const MachineInstr *MI, unsigned OpNo) {
00075     O << "QWORD PTR ";
00076     printMemReference(MI, OpNo);
00077   }
00078   void printf128mem(const MachineInstr *MI, unsigned OpNo) {
00079     O << "XMMWORD PTR ";
00080     printMemReference(MI, OpNo);
00081   }
00082 
00083   void printMachineInstruction(const MachineInstr *MI);
00084   void printOp(const MachineOperand &MO, const char *Modifier = 0);
00085   void printSSECC(const MachineInstr *MI, unsigned Op);
00086   void printMemReference(const MachineInstr *MI, unsigned Op);
00087   void printPICLabel(const MachineInstr *MI, unsigned Op);
00088   bool runOnMachineFunction(MachineFunction &F);
00089   bool doInitialization(Module &M);
00090 };
00091 
00092 } // end namespace llvm
00093 
00094 #endif