LLVM API Documentation

X86InstrBuilder.h

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00001 //===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file exposes functions that may be used with BuildMI from the
00011 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
00012 //
00013 // The BuildMem function may be used with the BuildMI function to add entire
00014 // memory references in a single, typed, function call.  X86 memory references
00015 // can be very complex expressions (described in the README), so wrapping them
00016 // up behind an easier to use interface makes sense.  Descriptions of the
00017 // functions are included below.
00018 //
00019 // For reference, the order of operands for memory references is:
00020 // (Operand), Base, Scale, Index, Displacement.
00021 //
00022 //===----------------------------------------------------------------------===//
00023 
00024 #ifndef X86INSTRBUILDER_H
00025 #define X86INSTRBUILDER_H
00026 
00027 #include "llvm/CodeGen/MachineInstrBuilder.h"
00028 
00029 namespace llvm {
00030 
00031 /// X86AddressMode - This struct holds a generalized full x86 address mode.
00032 /// The base register can be a frame index, which will eventually be replaced
00033 /// with BP or SP and Disp being offsetted accordingly.  The displacement may
00034 /// also include the offset of a global value.
00035 struct X86AddressMode {
00036   enum {
00037     RegBase,
00038     FrameIndexBase,
00039   } BaseType;
00040 
00041   union {
00042     unsigned Reg;
00043     int FrameIndex;
00044   } Base;
00045 
00046   unsigned Scale;
00047   unsigned IndexReg;
00048   unsigned Disp;
00049   GlobalValue *GV;
00050 
00051   X86AddressMode() : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0) {
00052     Base.Reg = 0;
00053   }
00054 };
00055 
00056 /// addDirectMem - This function is used to add a direct memory reference to the
00057 /// current instruction -- that is, a dereference of an address in a register,
00058 /// with no scale, index or displacement. An example is: DWORD PTR [EAX].
00059 ///
00060 inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
00061                                                unsigned Reg) {
00062   // Because memory references are always represented with four
00063   // values, this adds: Reg, [1, NoReg, 0] to the instruction.
00064   return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0);
00065 }
00066 
00067 
00068 /// addRegOffset - This function is used to add a memory reference of the form
00069 /// [Reg + Offset], i.e., one with no scale or index, but with a
00070 /// displacement. An example is: DWORD PTR [EAX + 4].
00071 ///
00072 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
00073                                                unsigned Reg, int Offset) {
00074   return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset);
00075 }
00076 
00077 /// addRegReg - This function is used to add a memory reference of the form:
00078 /// [Reg + Reg].
00079 inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
00080                                             unsigned Reg1, unsigned Reg2) {
00081   return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addSImm(0);
00082 }
00083 
00084 inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
00085                                                  const X86AddressMode &AM) {
00086   assert (AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
00087 
00088   if (AM.BaseType == X86AddressMode::RegBase)
00089     MIB.addReg(AM.Base.Reg);
00090   else if (AM.BaseType == X86AddressMode::FrameIndexBase)
00091     MIB.addFrameIndex(AM.Base.FrameIndex);
00092   else
00093     assert (0);
00094   MIB.addZImm(AM.Scale).addReg(AM.IndexReg);
00095   if (AM.GV)
00096     return MIB.addGlobalAddress(AM.GV, false, AM.Disp);
00097   else
00098     return MIB.addSImm(AM.Disp);
00099 }
00100 
00101 /// addFrameReference - This function is used to add a reference to the base of
00102 /// an abstract object on the stack frame of the current function.  This
00103 /// reference has base register as the FrameIndex offset until it is resolved.
00104 /// This allows a constant offset to be specified as well...
00105 ///
00106 inline const MachineInstrBuilder &
00107 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
00108   return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset);
00109 }
00110 
00111 /// addConstantPoolReference - This function is used to add a reference to the
00112 /// base of a constant value spilled to the per-function constant pool.  The
00113 /// reference has base register ConstantPoolIndex offset which is retained until
00114 /// either machine code emission or assembly output.  This allows an optional
00115 /// offset to be added as well.
00116 ///
00117 inline const MachineInstrBuilder &
00118 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
00119                          int Offset = 0) {
00120   return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset);
00121 }
00122 
00123 } // End llvm namespace
00124 
00125 #endif