LLVM API Documentation
#include <X86ISelLowering.h>
Inheritance diagram for llvm::X86TargetLowering:
Definition at line 262 of file X86ISelLowering.h.
X86TargetLowering::X86TargetLowering | ( | TargetMachine & | TM | ) |
Definition at line 39 of file X86ISelLowering.cpp.
References llvm::ISD::ADD, llvm::TargetLowering::addLegalAddressScale(), llvm::TargetLowering::addLegalFPImmediate(), llvm::TargetLowering::AddPromotedToType(), llvm::TargetLowering::addRegisterClass(), llvm::TargetLowering::allowUnalignedMemoryAccesses, llvm::ISD::AND, llvm::ISD::BIT_CONVERT, llvm::ISD::BR_CC, llvm::ISD::BRCOND, llvm::ISD::BSWAP, llvm::ISD::BUILD_VECTOR, llvm::TargetLowering::computeRegisterProperties(), llvm::ISD::ConstantFP, llvm::ISD::ConstantPool, llvm::ISD::CTLZ, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::TargetLowering::Custom, llvm::ISD::DEBUG_LABEL, llvm::ISD::DEBUG_LOC, llvm::ISD::DYNAMIC_STACKALLOC, N86::ESP, llvm::TargetLowering::Expand, llvm::ISD::ExternalSymbol, llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FABS, llvm::ISD::FCOPYSIGN, llvm::ISD::FCOS, llvm::ISD::FNEG, llvm::ISD::FP_ROUND_INREG, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FREM, llvm::ISD::FSIN, llvm::TargetMachine::getSubtarget(), llvm::ISD::GlobalAddress, llvm::X86Subtarget::hasMMX(), llvm::X86Subtarget::hasSSE1(), llvm::X86Subtarget::hasSSE2(), llvm::X86Subtarget::hasSSE3(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::X86Subtarget::isTargetDarwin(), llvm::MVT::LAST_VALUETYPE, llvm::TargetLowering::Legal, llvm::ISD::LOAD, llvm::ISD::LOCATION, llvm::TargetLowering::Mask, llvm::TargetLowering::maxStoresPerMemcpy, llvm::TargetLowering::maxStoresPerMemmove, llvm::TargetLowering::maxStoresPerMemset, llvm::ISD::MEMCPY, llvm::ISD::MEMMOVE, llvm::ISD::MEMSET, llvm::ISD::MUL, llvm::ISD::OR, llvm::MVT::Other, llvm::TargetLowering::Promote, llvm::ISD::READCYCLECOUNTER, llvm::ISD::RET, llvm::ISD::SCALAR_TO_VECTOR, llvm::TargetLowering::SchedulingForRegPressure, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::TargetLowering::setOperationAction(), llvm::TargetLowering::setSchedulingPreference(), llvm::TargetLowering::setSetCCResultContents(), llvm::TargetLowering::setSetCCResultType(), llvm::TargetLowering::setShiftAmountFlavor(), llvm::TargetLowering::setShiftAmountType(), llvm::TargetLowering::setStackPointerRegisterToSaveRestore(), llvm::TargetLowering::setUseUnderscoreSetJmpLongJmp(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SRA_PARTS, llvm::ISD::SRL_PARTS, llvm::ISD::STACKRESTORE, llvm::ISD::STACKSAVE, llvm::ISD::SUB, llvm::ISD::UINT_TO_FP, llvm::ISD::UNDEF, llvm::UnsafeFPMath, llvm::MVT::v16i8, llvm::MVT::v2f64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4f32, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, llvm::MVT::v8i8, llvm::ISD::VAARG, llvm::ISD::VACOPY, llvm::ISD::VAEND, llvm::ISD::VASTART, llvm::MVT::Vector, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::XOR, llvm::TargetLowering::ZeroOrOneSetCCResult, and llvm::ISD::ZEXTLOAD.
void X86TargetLowering::computeMaskedBitsForTargetNode | ( | const SDOperand | Op, | |
uint64_t | Mask, | |||
uint64_t & | KnownZero, | |||
uint64_t & | KnownOne, | |||
unsigned | Depth = 0 | |||
) | const [virtual] |
computeMaskedBitsForTargetNode - Determine which of the bits specified in Mask are known to be either zero or one and return them in the KnownZero/KnownOne bitsets.
Reimplemented from llvm::TargetLowering.
Definition at line 3057 of file X86ISelLowering.cpp.
References llvm::ISD::BUILTIN_OP_END, llvm::MVT::getIntVTBitMask(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, Op, and llvm::X86ISD::SETCC.
unsigned llvm::X86TargetLowering::getBytesCallerReserves | ( | ) | const [inline] |
Definition at line 277 of file X86ISelLowering.h.
unsigned llvm::X86TargetLowering::getBytesToPopOnReturn | ( | ) | const [inline] |
std::vector< unsigned > X86TargetLowering::getRegClassForInlineAsmConstraint | ( | const std::string & | Constraint, | |
MVT::ValueType | VT | |||
) | const |
Definition at line 3080 of file X86ISelLowering.cpp.
References N86::EAX, N86::EBP, N86::EBX, N86::ECX, N86::EDI, N86::EDX, N86::ESI, N86::ESP, llvm::X86Subtarget::hasSSE1(), and llvm::X86Subtarget::hasSSE2().
SDOperand X86TargetLowering::getReturnAddressFrameIndex | ( | SelectionDAG & | DAG | ) |
Definition at line 1153 of file X86ISelLowering.cpp.
References llvm::MachineFrameInfo::CreateFixedObject(), DAG, llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::SelectionDAG::getMachineFunction(), and MF.
Referenced by LowerFrameReturnAddress().
const char * X86TargetLowering::getTargetNodeName | ( | unsigned | Opcode | ) | const [virtual] |
getTargetNodeName - This method returns the name of a target specific DAG node.
Reimplemented from llvm::TargetLowering.
Definition at line 3018 of file X86ISelLowering.cpp.
References llvm::X86ISD::BRCOND, llvm::X86ISD::CALL, llvm::X86ISD::CMOV, llvm::X86ISD::CMP, llvm::X86ISD::COMI, llvm::X86ISD::FAND, llvm::X86ISD::FILD, llvm::X86ISD::FILD_FLAG, llvm::X86ISD::FLD, llvm::X86ISD::FP_GET_RESULT, llvm::X86ISD::FP_SET_RESULT, llvm::X86ISD::FP_TO_INT16_IN_MEM, llvm::X86ISD::FP_TO_INT32_IN_MEM, llvm::X86ISD::FP_TO_INT64_IN_MEM, llvm::X86ISD::FST, llvm::X86ISD::FXOR, llvm::X86ISD::GlobalBaseReg, llvm::X86ISD::LOAD_PACK, llvm::X86ISD::PEXTRW, llvm::X86ISD::PINSRW, llvm::X86ISD::RDTSC_DAG, llvm::X86ISD::REP_MOVS, llvm::X86ISD::REP_STOS, llvm::X86ISD::RET_FLAG, llvm::X86ISD::S2VEC, llvm::X86ISD::SETCC, llvm::X86ISD::SHLD, llvm::X86ISD::SHRD, llvm::X86ISD::TAILCALL, llvm::X86ISD::TEST, llvm::X86ISD::UCOMI, llvm::X86ISD::Wrapper, and llvm::X86ISD::ZEXT_S2VEC.
MachineBasicBlock * X86TargetLowering::InsertAtEndOfBasicBlock | ( | MachineInstr * | MI, | |
MachineBasicBlock * | MBB | |||
) | [virtual] |
Reimplemented from llvm::TargetLowering.
Definition at line 1288 of file X86ISelLowering.cpp.
References llvm::addFrameReference(), llvm::addFullAddress(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::addSuccessor(), llvm::X86AddressMode::Base, llvm::X86AddressMode::BaseType, BB, llvm::BuildMI(), llvm::X86AddressMode::Disp, F, llvm::X86ISD::FP_TO_INT16_IN_MEM, llvm::X86ISD::FP_TO_INT32_IN_MEM, llvm::X86ISD::FP_TO_INT64_IN_MEM, llvm::X86AddressMode::FrameIndex, llvm::X86AddressMode::FrameIndexBase, getCondBrOpcodeForX86CC(), llvm::MachineOperand::getImmedValue(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::BasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::X86AddressMode::GV, llvm::X86AddressMode::IndexReg, MI, Op, llvm::PHI, llvm::X86AddressMode::Reg, llvm::X86AddressMode::RegBase, and llvm::X86AddressMode::Scale.
bool X86TargetLowering::isLegalAddressImmediate | ( | GlobalValue * | GV | ) | const [virtual] |
Reimplemented from llvm::TargetLowering.
Definition at line 3122 of file X86ISelLowering.cpp.
References DarwinGVRequiresExtraLoad(), llvm::Reloc::DynamicNoPIC, llvm::TargetMachine::getRelocationModel(), llvm::TargetLowering::getTargetMachine(), GV, llvm::X86Subtarget::isTargetDarwin(), and llvm::Reloc::Static.
bool X86TargetLowering::isLegalAddressImmediate | ( | int64_t | V | ) | const [virtual] |
isLegalAddressImmediate - Return true if the integer value or GlobalValue can be used as the offset of the target addressing mode.
Reimplemented from llvm::TargetLowering.
Definition at line 3117 of file X86ISelLowering.cpp.
bool X86TargetLowering::isShuffleMaskLegal | ( | SDOperand | Mask, | |
MVT::ValueType | VT | |||
) | const [virtual] |
isShuffleMaskLegal - Targets can use this to indicate that they only support *some* VECTOR_SHUFFLE operations, those with specific masks. By default, if a target supports the VECTOR_SHUFFLE node, all mask values are assumed to be legal.
Definition at line 3140 of file X86ISelLowering.cpp.
References llvm::MVT::getSizeInBits(), llvm::X86::isMOVSMask(), llvm::X86::isPSHUFDMask(), isPSHUFHW_PSHUFLWMask(), llvm::X86::isSHUFPMask(), llvm::X86::isSplatMask(), llvm::X86::isUNPCKHMask(), llvm::X86::isUNPCKL_v_undef_Mask(), llvm::X86::isUNPCKLMask(), and llvm::TargetLowering::Mask.
std::vector< SDOperand > X86TargetLowering::LowerArguments | ( | Function & | F, | |
SelectionDAG & | DAG | |||
) | [virtual] |
LowerArguments - This hook must be implemented to indicate how we should lower the arguments for the specified function, into the specified DAG.
Reimplemented from llvm::TargetLowering.
Definition at line 361 of file X86ISelLowering.cpp.
References DAG, EnableFastCC, F, and llvm::CallingConv::Fast.
std::pair< SDOperand, SDOperand > X86TargetLowering::LowerCallTo | ( | SDOperand | Chain, | |
const Type * | RetTy, | |||
bool | isVarArg, | |||
unsigned | CC, | |||
bool | isTailCall, | |||
SDOperand | Callee, | |||
ArgListTy & | Args, | |||
SelectionDAG & | DAG | |||
) | [virtual] |
LowerCallTo - This hook lowers an abstract call to a function into an actual call.
Definition at line 368 of file X86ISelLowering.cpp.
References llvm::CallingConv::C, DAG, EnableFastCC, llvm::CallingConv::Fast, G, llvm::TargetLowering::getPointerTy(), llvm::SelectionDAG::getTargetExternalSymbol(), llvm::SelectionDAG::getTargetGlobalAddress(), and RetTy.
Referenced by LowerOperation().
std::pair< SDOperand, SDOperand > X86TargetLowering::LowerFrameReturnAddress | ( | bool | isFrameAddr, | |
SDOperand | Chain, | |||
unsigned | Depth, | |||
SelectionDAG & | DAG | |||
) | [virtual] |
LowerFrameReturnAddress - This hook lowers a call to llvm.returnaddress or llvm.frameaddress (depending on the value of the first argument). The return values are the result pointer and the resultant token chain. If not implemented, both of these intrinsics will return null.
Reimplemented from llvm::TargetLowering.
Definition at line 1166 of file X86ISelLowering.cpp.
References DAG, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getNode(), llvm::TargetLowering::getPointerTy(), getReturnAddressFrameIndex(), llvm::SelectionDAG::getSrcValue(), and llvm::ISD::SUB.
SDOperand X86TargetLowering::LowerOperation | ( | SDOperand | Op, | |
SelectionDAG & | DAG | |||
) | [virtual] |
LowerOperation - Provide custom lowering hooks for some operations.
Reimplemented from llvm::TargetLowering.
Definition at line 1910 of file X86ISelLowering.cpp.
References abort(), llvm::ISD::ADD, Align, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, Assert, llvm::ISD::AssertZext, llvm::BitsToDouble(), llvm::BitsToFloat(), llvm::X86ISD::BRCOND, llvm::ISD::BRCOND, llvm::ISD::BUILD_VECTOR, llvm::CallingConv::C, llvm::X86ISD::CMOV, llvm::X86ISD::CMP, llvm::X86ISD::COMI, CommuteVectorShuffle(), llvm::X86ISD::COND_E, llvm::X86ISD::COND_NE, llvm::X86ISD::COND_NP, llvm::X86ISD::COND_P, llvm::ISD::ConstantPool, Copy, CP, llvm::MachineFrameInfo::CreateStackObject(), DAG, DarwinGVRequiresExtraLoad(), Dest, N86::EAX, N86::ECX, N86::EDI, N86::EDX, N86::ESI, llvm::ISD::ExternalSymbol, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::MVT::f64, llvm::ISD::FABS, llvm::X86ISD::FAND, llvm::X86ISD::FILD, llvm::X86ISD::FILD_FLAG, llvm::MVT::Flag, llvm::X86ISD::FLD, llvm::ISD::FNEG, llvm::X86ISD::FP_SET_RESULT, llvm::X86ISD::FP_TO_INT16_IN_MEM, llvm::X86ISD::FP_TO_INT32_IN_MEM, llvm::X86ISD::FP_TO_INT64_IN_MEM, llvm::ISD::FP_TO_SINT, llvm::FR, llvm::X86ISD::FST, llvm::X86ISD::FXOR, llvm::ConstantStruct::get(), llvm::ConstantFP::get(), getBytesToPopOnReturn(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getConstantPool(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getExternalSymbol(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::TargetData::getIntPtrType(), llvm::MVT::getIntVectorWithNumElements(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getMachineFunction(), llvm::X86Subtarget::getMinRepStrSizeThreshold(), llvm::SelectionDAG::getNode(), llvm::SDOperand::getNumOperands(), llvm::SDNode::getNumValues(), llvm::SDOperand::getOpcode(), llvm::SDOperand::getOperand(), llvm::TargetLowering::getPointerTy(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getSrcValue(), llvm::SelectionDAG::getTargetConstantPool(), llvm::TargetLowering::getTargetData(), llvm::SelectionDAG::getTargetExternalSymbol(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::TargetLowering::getTargetMachine(), llvm::MVT::getTypeForValueType(), llvm::ConstantSDNode::getValue(), llvm::SDOperand::getValue(), llvm::SDOperand::getValueType(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getValueType(), llvm::MVT::getVectorBaseType(), llvm::ISD::GlobalAddress, llvm::X86ISD::GlobalBaseReg, GV, hasFPCMov(), llvm::SDOperand::hasOneUse(), llvm::PPCISD::Hi, I, llvm::MVT::i16, llvm::MVT::i64, llvm::MVT::i8, Idx, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::ISD::isBuildVectorAllOnes(), llvm::MVT::isFloatingPoint(), llvm::MVT::isInteger(), isLowerFromV2UpperFromV1(), llvm::X86::isMOVSMask(), llvm::X86::isPSHUFDMask(), isPSHUFHW_PSHUFLWMask(), llvm::X86::isPSHUFHWMask(), llvm::X86::isPSHUFLWMask(), llvm::X86::isSHUFPMask(), llvm::X86::isSplatMask(), llvm::X86Subtarget::isTargetDarwin(), llvm::X86::isUNPCKHMask(), llvm::X86::isUNPCKL_v_undef_Mask(), llvm::X86::isUNPCKLMask(), llvm::PPCISD::Lo, llvm::ISD::LOAD, llvm::X86ISD::LOAD_PACK, LowerCallTo(), llvm::TargetLowering::Mask, llvm::ISD::MEMCPY, llvm::ISD::MEMSET, llvm::ISD::MERGE_VALUES, MF, Offset, Op, llvm::ISD::OR, llvm::MVT::Other, llvm::X86ISD::PEXTRW, llvm::Reloc::PIC, llvm::X86ISD::PINSRW, llvm::X86ISD::RDTSC_DAG, llvm::ISD::READCYCLECOUNTER, llvm::X86ISD::REP_MOVS, llvm::X86ISD::REP_STOS, llvm::ISD::RET, llvm::X86ISD::RET_FLAG, llvm::X86ISD::S2VEC, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SELECT, llvm::X86ISD::SETCC, llvm::ISD::SETCC, llvm::ISD::SETCC_INVALID, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETOEQ, llvm::ISD::SETUNE, llvm::ISD::SHL, llvm::ISD::SHL_PARTS, llvm::X86ISD::SHLD, ShouldXformedToMOVLP(), llvm::X86ISD::SHRD, llvm::ISD::SINT_TO_FP, llvm::ISD::SRA, llvm::ISD::SRA_PARTS, llvm::ISD::SRL, llvm::ISD::SRL_PARTS, StackSlot, llvm::Reloc::Static, llvm::ISD::STORE, llvm::X86ISD::TEST, translateX86CC(), llvm::ISD::TRUNCATE, U, llvm::X86ISD::UCOMI, llvm::ISD::UNDEF, V, llvm::MVT::v8i16, llvm::Use::Val, Val, llvm::SDOperand::Val, llvm::ISD::VASTART, llvm::ISD::VECTOR_SHUFFLE, llvm::Type::VoidTy, llvm::X86ISD::Wrapper, llvm::Intrinsic::x86_sse2_comieq_sd, llvm::Intrinsic::x86_sse2_comige_sd, llvm::Intrinsic::x86_sse2_comigt_sd, llvm::Intrinsic::x86_sse2_comile_sd, llvm::Intrinsic::x86_sse2_comilt_sd, llvm::Intrinsic::x86_sse2_comineq_sd, llvm::Intrinsic::x86_sse2_ucomieq_sd, llvm::Intrinsic::x86_sse2_ucomige_sd, llvm::Intrinsic::x86_sse2_ucomigt_sd, llvm::Intrinsic::x86_sse2_ucomile_sd, llvm::Intrinsic::x86_sse2_ucomilt_sd, llvm::Intrinsic::x86_sse2_ucomineq_sd, llvm::Intrinsic::x86_sse_comieq_ss, llvm::Intrinsic::x86_sse_comige_ss, llvm::Intrinsic::x86_sse_comigt_ss, llvm::Intrinsic::x86_sse_comile_ss, llvm::Intrinsic::x86_sse_comilt_ss, llvm::Intrinsic::x86_sse_comineq_ss, llvm::Intrinsic::x86_sse_ucomieq_ss, llvm::Intrinsic::x86_sse_ucomige_ss, llvm::Intrinsic::x86_sse_ucomigt_ss, llvm::Intrinsic::x86_sse_ucomile_ss, llvm::Intrinsic::x86_sse_ucomilt_ss, llvm::Intrinsic::x86_sse_ucomineq_ss, llvm::ISD::ZERO_EXTEND, and llvm::X86ISD::ZEXT_S2VEC.