LLVM API Documentation

PPCGenRegisterInfo.inc

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00001 //===- TableGen'erated file -------------------------------------*- C++ -*-===//
00002 //
00003 // Register Information Source Fragment
00004 //
00005 // Automatically generated file, do not edit!
00006 //
00007 //===----------------------------------------------------------------------===//
00008 
00009 namespace llvm {
00010 
00011 namespace {     // Register classes...
00012   // CRRC Register Class...
00013   const unsigned CRRC[] = {
00014     PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, PPC::CR2, PPC::CR3, PPC::CR4, 
00015   };
00016 
00017   // F4RC Register Class...
00018   const unsigned F4RC[] = {
00019     PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 
00020   };
00021 
00022   // F8RC Register Class...
00023   const unsigned F8RC[] = {
00024     PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 
00025   };
00026 
00027   // G8RC Register Class...
00028   const unsigned G8RC[] = {
00029     PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X31, PPC::X0, PPC::X1, 
00030   };
00031 
00032   // GPRC Register Class...
00033   const unsigned GPRC[] = {
00034     PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R0, PPC::R1, PPC::LR, 
00035   };
00036 
00037   // VRRC Register Class...
00038   const unsigned VRRC[] = {
00039     PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 
00040   };
00041 
00042   // CRRCVTs Register Class Value Types...
00043   const MVT::ValueType CRRCVTs[] = {
00044     MVT::i32, MVT::Other
00045   };
00046 
00047   // F4RCVTs Register Class Value Types...
00048   const MVT::ValueType F4RCVTs[] = {
00049     MVT::f32, MVT::Other
00050   };
00051 
00052   // F8RCVTs Register Class Value Types...
00053   const MVT::ValueType F8RCVTs[] = {
00054     MVT::f64, MVT::Other
00055   };
00056 
00057   // G8RCVTs Register Class Value Types...
00058   const MVT::ValueType G8RCVTs[] = {
00059     MVT::i64, MVT::Other
00060   };
00061 
00062   // GPRCVTs Register Class Value Types...
00063   const MVT::ValueType GPRCVTs[] = {
00064     MVT::i32, MVT::Other
00065   };
00066 
00067   // VRRCVTs Register Class Value Types...
00068   const MVT::ValueType VRRCVTs[] = {
00069     MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::Other
00070   };
00071 
00072 }  // end anonymous namespace
00073 
00074 namespace PPC {   // Register class instances
00075   CRRCClass CRRCRegClass;
00076   F4RCClass F4RCRegClass;
00077   F8RCClass F8RCRegClass;
00078   G8RCClass G8RCRegClass;
00079   GPRCClass GPRCRegClass;
00080   VRRCClass VRRCRegClass;
00081 
00082 CRRCClass::CRRCClass()  : TargetRegisterClass(CRRCVTs, 4, 4, CRRC, CRRC + 8) {}
00083 
00084 F4RCClass::F4RCClass()  : TargetRegisterClass(F4RCVTs, 4, 4, F4RC, F4RC + 32) {}
00085 
00086 F8RCClass::F8RCClass()  : TargetRegisterClass(F8RCVTs, 8, 8, F8RC, F8RC + 32) {}
00087 
00088     G8RCClass::iterator
00089     G8RCClass::allocation_order_begin(MachineFunction &MF) const {
00090       return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
00091     }
00092     G8RCClass::iterator
00093     G8RCClass::allocation_order_end(MachineFunction &MF) const {
00094       if (hasFP(MF))
00095         return end()-3;
00096       else
00097         return end()-2;
00098     }
00099   
00100 G8RCClass::G8RCClass()  : TargetRegisterClass(G8RCVTs, 8, 8, G8RC, G8RC + 32) {}
00101 
00102     GPRCClass::iterator
00103     GPRCClass::allocation_order_begin(MachineFunction &MF) const {
00104       return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
00105     }
00106     GPRCClass::iterator
00107     GPRCClass::allocation_order_end(MachineFunction &MF) const {
00108       if (hasFP(MF))
00109         return end()-4;  // don't allocate R31, R0, R1, LR
00110       else
00111         return end()-3;  // don't allocate R0, R1, LR
00112     }
00113   
00114 GPRCClass::GPRCClass()  : TargetRegisterClass(GPRCVTs, 4, 4, GPRC, GPRC + 33) {}
00115 
00116 VRRCClass::VRRCClass()  : TargetRegisterClass(VRRCVTs, 16, 16, VRRC, VRRC + 32) {}
00117 }
00118 
00119 namespace {
00120   const TargetRegisterClass* const RegisterClasses[] = {
00121     &PPC::CRRCRegClass,
00122     &PPC::F4RCRegClass,
00123     &PPC::F8RCRegClass,
00124     &PPC::G8RCRegClass,
00125     &PPC::GPRCRegClass,
00126     &PPC::VRRCRegClass,
00127   };
00128 
00129 
00130   // Register Alias Sets...
00131   const unsigned Empty_AliasSet[] = { 0 };
00132   const unsigned R0_AliasSet[] = { PPC::X0, 0 };
00133   const unsigned R1_AliasSet[] = { PPC::X1, 0 };
00134   const unsigned R2_AliasSet[] = { PPC::X2, 0 };
00135   const unsigned R3_AliasSet[] = { PPC::X3, 0 };
00136   const unsigned R4_AliasSet[] = { PPC::X4, 0 };
00137   const unsigned R5_AliasSet[] = { PPC::X5, 0 };
00138   const unsigned R6_AliasSet[] = { PPC::X6, 0 };
00139   const unsigned R7_AliasSet[] = { PPC::X7, 0 };
00140   const unsigned R8_AliasSet[] = { PPC::X8, 0 };
00141   const unsigned R9_AliasSet[] = { PPC::X9, 0 };
00142   const unsigned R10_AliasSet[] = { PPC::X10, 0 };
00143   const unsigned R11_AliasSet[] = { PPC::X11, 0 };
00144   const unsigned R12_AliasSet[] = { PPC::X12, 0 };
00145   const unsigned R13_AliasSet[] = { PPC::X13, 0 };
00146   const unsigned R14_AliasSet[] = { PPC::X14, 0 };
00147   const unsigned R15_AliasSet[] = { PPC::X15, 0 };
00148   const unsigned R16_AliasSet[] = { PPC::X16, 0 };
00149   const unsigned R17_AliasSet[] = { PPC::X17, 0 };
00150   const unsigned R18_AliasSet[] = { PPC::X18, 0 };
00151   const unsigned R19_AliasSet[] = { PPC::X19, 0 };
00152   const unsigned R20_AliasSet[] = { PPC::X20, 0 };
00153   const unsigned R21_AliasSet[] = { PPC::X21, 0 };
00154   const unsigned R22_AliasSet[] = { PPC::X22, 0 };
00155   const unsigned R23_AliasSet[] = { PPC::X23, 0 };
00156   const unsigned R24_AliasSet[] = { PPC::X24, 0 };
00157   const unsigned R25_AliasSet[] = { PPC::X25, 0 };
00158   const unsigned R26_AliasSet[] = { PPC::X26, 0 };
00159   const unsigned R27_AliasSet[] = { PPC::X27, 0 };
00160   const unsigned R28_AliasSet[] = { PPC::X28, 0 };
00161   const unsigned R29_AliasSet[] = { PPC::X29, 0 };
00162   const unsigned R30_AliasSet[] = { PPC::X30, 0 };
00163   const unsigned R31_AliasSet[] = { PPC::X31, 0 };
00164   const unsigned X0_AliasSet[] = { PPC::R0, 0 };
00165   const unsigned X1_AliasSet[] = { PPC::R1, 0 };
00166   const unsigned X2_AliasSet[] = { PPC::R2, 0 };
00167   const unsigned X3_AliasSet[] = { PPC::R3, 0 };
00168   const unsigned X4_AliasSet[] = { PPC::R4, 0 };
00169   const unsigned X5_AliasSet[] = { PPC::R5, 0 };
00170   const unsigned X6_AliasSet[] = { PPC::R6, 0 };
00171   const unsigned X7_AliasSet[] = { PPC::R7, 0 };
00172   const unsigned X8_AliasSet[] = { PPC::R8, 0 };
00173   const unsigned X9_AliasSet[] = { PPC::R9, 0 };
00174   const unsigned X10_AliasSet[] = { PPC::R10, 0 };
00175   const unsigned X11_AliasSet[] = { PPC::R11, 0 };
00176   const unsigned X12_AliasSet[] = { PPC::R12, 0 };
00177   const unsigned X13_AliasSet[] = { PPC::R13, 0 };
00178   const unsigned X14_AliasSet[] = { PPC::R14, 0 };
00179   const unsigned X15_AliasSet[] = { PPC::R15, 0 };
00180   const unsigned X16_AliasSet[] = { PPC::R16, 0 };
00181   const unsigned X17_AliasSet[] = { PPC::R17, 0 };
00182   const unsigned X18_AliasSet[] = { PPC::R18, 0 };
00183   const unsigned X19_AliasSet[] = { PPC::R19, 0 };
00184   const unsigned X20_AliasSet[] = { PPC::R20, 0 };
00185   const unsigned X21_AliasSet[] = { PPC::R21, 0 };
00186   const unsigned X22_AliasSet[] = { PPC::R22, 0 };
00187   const unsigned X23_AliasSet[] = { PPC::R23, 0 };
00188   const unsigned X24_AliasSet[] = { PPC::R24, 0 };
00189   const unsigned X25_AliasSet[] = { PPC::R25, 0 };
00190   const unsigned X26_AliasSet[] = { PPC::R26, 0 };
00191   const unsigned X27_AliasSet[] = { PPC::R27, 0 };
00192   const unsigned X28_AliasSet[] = { PPC::R28, 0 };
00193   const unsigned X29_AliasSet[] = { PPC::R29, 0 };
00194   const unsigned X30_AliasSet[] = { PPC::R30, 0 };
00195   const unsigned X31_AliasSet[] = { PPC::R31, 0 };
00196 
00197   const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors
00198     { "NOREG",  0 },
00199     { "cr0",  Empty_AliasSet },
00200     { "cr1",  Empty_AliasSet },
00201     { "cr2",  Empty_AliasSet },
00202     { "cr3",  Empty_AliasSet },
00203     { "cr4",  Empty_AliasSet },
00204     { "cr5",  Empty_AliasSet },
00205     { "cr6",  Empty_AliasSet },
00206     { "cr7",  Empty_AliasSet },
00207     { "ctr",  Empty_AliasSet },
00208     { "f0", Empty_AliasSet },
00209     { "f1", Empty_AliasSet },
00210     { "f10",  Empty_AliasSet },
00211     { "f11",  Empty_AliasSet },
00212     { "f12",  Empty_AliasSet },
00213     { "f13",  Empty_AliasSet },
00214     { "f14",  Empty_AliasSet },
00215     { "f15",  Empty_AliasSet },
00216     { "f16",  Empty_AliasSet },
00217     { "f17",  Empty_AliasSet },
00218     { "f18",  Empty_AliasSet },
00219     { "f19",  Empty_AliasSet },
00220     { "f2", Empty_AliasSet },
00221     { "f20",  Empty_AliasSet },
00222     { "f21",  Empty_AliasSet },
00223     { "f22",  Empty_AliasSet },
00224     { "f23",  Empty_AliasSet },
00225     { "f24",  Empty_AliasSet },
00226     { "f25",  Empty_AliasSet },
00227     { "f26",  Empty_AliasSet },
00228     { "f27",  Empty_AliasSet },
00229     { "f28",  Empty_AliasSet },
00230     { "f29",  Empty_AliasSet },
00231     { "f3", Empty_AliasSet },
00232     { "f30",  Empty_AliasSet },
00233     { "f31",  Empty_AliasSet },
00234     { "f4", Empty_AliasSet },
00235     { "f5", Empty_AliasSet },
00236     { "f6", Empty_AliasSet },
00237     { "f7", Empty_AliasSet },
00238     { "f8", Empty_AliasSet },
00239     { "f9", Empty_AliasSet },
00240     { "lr", Empty_AliasSet },
00241     { "r0", R0_AliasSet },
00242     { "r1", R1_AliasSet },
00243     { "r10",  R10_AliasSet },
00244     { "r11",  R11_AliasSet },
00245     { "r12",  R12_AliasSet },
00246     { "r13",  R13_AliasSet },
00247     { "r14",  R14_AliasSet },
00248     { "r15",  R15_AliasSet },
00249     { "r16",  R16_AliasSet },
00250     { "r17",  R17_AliasSet },
00251     { "r18",  R18_AliasSet },
00252     { "r19",  R19_AliasSet },
00253     { "r2", R2_AliasSet },
00254     { "r20",  R20_AliasSet },
00255     { "r21",  R21_AliasSet },
00256     { "r22",  R22_AliasSet },
00257     { "r23",  R23_AliasSet },
00258     { "r24",  R24_AliasSet },
00259     { "r25",  R25_AliasSet },
00260     { "r26",  R26_AliasSet },
00261     { "r27",  R27_AliasSet },
00262     { "r28",  R28_AliasSet },
00263     { "r29",  R29_AliasSet },
00264     { "r3", R3_AliasSet },
00265     { "r30",  R30_AliasSet },
00266     { "r31",  R31_AliasSet },
00267     { "r4", R4_AliasSet },
00268     { "r5", R5_AliasSet },
00269     { "r6", R6_AliasSet },
00270     { "r7", R7_AliasSet },
00271     { "r8", R8_AliasSet },
00272     { "r9", R9_AliasSet },
00273     { "v0", Empty_AliasSet },
00274     { "v1", Empty_AliasSet },
00275     { "v10",  Empty_AliasSet },
00276     { "v11",  Empty_AliasSet },
00277     { "v12",  Empty_AliasSet },
00278     { "v13",  Empty_AliasSet },
00279     { "v14",  Empty_AliasSet },
00280     { "v15",  Empty_AliasSet },
00281     { "v16",  Empty_AliasSet },
00282     { "v17",  Empty_AliasSet },
00283     { "v18",  Empty_AliasSet },
00284     { "v19",  Empty_AliasSet },
00285     { "v2", Empty_AliasSet },
00286     { "v20",  Empty_AliasSet },
00287     { "v21",  Empty_AliasSet },
00288     { "v22",  Empty_AliasSet },
00289     { "v23",  Empty_AliasSet },
00290     { "v24",  Empty_AliasSet },
00291     { "v25",  Empty_AliasSet },
00292     { "v26",  Empty_AliasSet },
00293     { "v27",  Empty_AliasSet },
00294     { "v28",  Empty_AliasSet },
00295     { "v29",  Empty_AliasSet },
00296     { "v3", Empty_AliasSet },
00297     { "v30",  Empty_AliasSet },
00298     { "v31",  Empty_AliasSet },
00299     { "v4", Empty_AliasSet },
00300     { "v5", Empty_AliasSet },
00301     { "v6", Empty_AliasSet },
00302     { "v7", Empty_AliasSet },
00303     { "v8", Empty_AliasSet },
00304     { "v9", Empty_AliasSet },
00305     { "VRsave", Empty_AliasSet },
00306     { "r0", X0_AliasSet },
00307     { "r1", X1_AliasSet },
00308     { "r10",  X10_AliasSet },
00309     { "r11",  X11_AliasSet },
00310     { "r12",  X12_AliasSet },
00311     { "r13",  X13_AliasSet },
00312     { "r14",  X14_AliasSet },
00313     { "r15",  X15_AliasSet },
00314     { "r16",  X16_AliasSet },
00315     { "r17",  X17_AliasSet },
00316     { "r18",  X18_AliasSet },
00317     { "r19",  X19_AliasSet },
00318     { "r2", X2_AliasSet },
00319     { "r20",  X20_AliasSet },
00320     { "r21",  X21_AliasSet },
00321     { "r22",  X22_AliasSet },
00322     { "r23",  X23_AliasSet },
00323     { "r24",  X24_AliasSet },
00324     { "r25",  X25_AliasSet },
00325     { "r26",  X26_AliasSet },
00326     { "r27",  X27_AliasSet },
00327     { "r28",  X28_AliasSet },
00328     { "r29",  X29_AliasSet },
00329     { "r3", X3_AliasSet },
00330     { "r30",  X30_AliasSet },
00331     { "r31",  X31_AliasSet },
00332     { "r4", X4_AliasSet },
00333     { "r5", X5_AliasSet },
00334     { "r6", X6_AliasSet },
00335     { "r7", X7_AliasSet },
00336     { "r8", X8_AliasSet },
00337     { "r9", X9_AliasSet },
00338   };
00339 }
00340 
00341 PPCGenRegisterInfo::PPCGenRegisterInfo(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)
00342   : MRegisterInfo(RegisterDescriptors, 140, RegisterClasses, RegisterClasses+6,
00343                   CallFrameSetupOpcode, CallFrameDestroyOpcode) {}
00344 
00345 const unsigned* PPCGenRegisterInfo::getCalleeSaveRegs() const {
00346   static const unsigned CalleeSaveRegs[] = {
00347     PPC::R1, PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::LR,  0
00348   };
00349   return CalleeSaveRegs;
00350 }
00351 
00352 const TargetRegisterClass* const*
00353 PPCGenRegisterInfo::getCalleeSaveRegClasses() const {
00354   static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
00355     &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::GPRCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::F8RCRegClass, &PPC::CRRCRegClass, &PPC::CRRCRegClass, &PPC::CRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::VRRCRegClass, &PPC::GPRCRegClass,  0
00356   };
00357   return CalleeSaveRegClasses;
00358 }
00359 
00360 int PPCGenRegisterInfo::getDwarfRegNum(unsigned RegNum) const {
00361   static const int DwarfRegNums[] = { -1, // NoRegister
00362     68, 69, 70, 71, 72, 73, 74, 75, 66, 32, 33, 42, 43, 44, 45, 46, 
00363     47, 48, 49, 50, 51, 34, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 
00364     35, 62, 63, 36, 37, 38, 39, 40, 41, 65, 0, 1, 10, 11, 12, 13, 
00365     14, 15, 16, 17, 18, 19, 2, 20, 21, 22, 23, 24, 25, 26, 27, 28, 
00366     29, 3, 30, 31, 4, 5, 6, 7, 8, 9, 77, 78, 87, 88, 89, 90, 
00367     91, 92, 93, 94, 95, 96, 79, 97, 98, 99, 100, 101, 102, 103, 104, 105, 
00368     106, 80, 107, 108, 81, 82, 83, 84, 85, 86, 107, 0, 1, 10, 11, 12, 
00369     13, 14, 15, 16, 17, 18, 19, 2, 20, 21, 22, 23, 24, 25, 26, 27, 
00370     28, 29, 3, 30, 31, 4, 5, 6, 7, 8, 9
00371   };
00372   assert(RegNum < (sizeof(DwarfRegNums)/sizeof(int)) &&
00373          "RegNum exceeds number of registers");
00374   return DwarfRegNums[RegNum];
00375 }
00376 
00377 } // End llvm namespace