LLVM API Documentation

SparcV9GenCodeEmitter.inc

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00001 //===- TableGen'erated file -------------------------------------*- C++ -*-===//
00002 //
00003 // Machine Code Emitter
00004 //
00005 // Automatically generated file, do not edit!
00006 //
00007 //===----------------------------------------------------------------------===//
00008 
00009 unsigned SparcV9CodeEmitter::getBinaryCodeForInstr(MachineInstr &MI) {
00010   unsigned Value = 0;
00011   DEBUG(std::cerr << MI);
00012   switch (MI.getOpcode()) {
00013     case V9::ADDCcci: {
00014       DEBUG(std::cerr << "Emitting ADDCcci\n");
00015       Value = 2160074752U;
00016 
00017       // op0: rs1
00018       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00019       op0 &= (1<<5) - 1;
00020       op0 <<= 14;
00021       Value |= op0;
00022       // op1: simm13
00023       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00024       op1 &= (1<<13) - 1;
00025       Value |= op1;
00026       // op2: rd
00027       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00028       op2 &= (1<<5) - 1;
00029       op2 <<= 25;
00030       Value |= op2;
00031       break;
00032     }
00033     case V9::ADDCccr: {
00034       DEBUG(std::cerr << "Emitting ADDCccr\n");
00035       Value = 2160066560U;
00036 
00037       // op0: rs1
00038       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00039       op0 &= (1<<5) - 1;
00040       op0 <<= 14;
00041       Value |= op0;
00042       // op1: rs2
00043       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00044       op1 &= (1<<5) - 1;
00045       Value |= op1;
00046       // op2: rd
00047       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00048       op2 &= (1<<5) - 1;
00049       op2 <<= 25;
00050       Value |= op2;
00051       break;
00052     }
00053     case V9::ADDCi: {
00054       DEBUG(std::cerr << "Emitting ADDCi\n");
00055       Value = 2151686144U;
00056 
00057       // op0: rs1
00058       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00059       op0 &= (1<<5) - 1;
00060       op0 <<= 14;
00061       Value |= op0;
00062       // op1: simm13
00063       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00064       op1 &= (1<<13) - 1;
00065       Value |= op1;
00066       // op2: rd
00067       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00068       op2 &= (1<<5) - 1;
00069       op2 <<= 25;
00070       Value |= op2;
00071       break;
00072     }
00073     case V9::ADDCr: {
00074       DEBUG(std::cerr << "Emitting ADDCr\n");
00075       Value = 2151677952U;
00076 
00077       // op0: rs1
00078       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00079       op0 &= (1<<5) - 1;
00080       op0 <<= 14;
00081       Value |= op0;
00082       // op1: rs2
00083       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00084       op1 &= (1<<5) - 1;
00085       Value |= op1;
00086       // op2: rd
00087       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00088       op2 &= (1<<5) - 1;
00089       op2 <<= 25;
00090       Value |= op2;
00091       break;
00092     }
00093     case V9::ADDcci: {
00094       DEBUG(std::cerr << "Emitting ADDcci\n");
00095       Value = 2155880448U;
00096 
00097       // op0: rs1
00098       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00099       op0 &= (1<<5) - 1;
00100       op0 <<= 14;
00101       Value |= op0;
00102       // op1: simm13
00103       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00104       op1 &= (1<<13) - 1;
00105       Value |= op1;
00106       // op2: rd
00107       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00108       op2 &= (1<<5) - 1;
00109       op2 <<= 25;
00110       Value |= op2;
00111       break;
00112     }
00113     case V9::ADDccr: {
00114       DEBUG(std::cerr << "Emitting ADDccr\n");
00115       Value = 2155872256U;
00116 
00117       // op0: rs1
00118       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00119       op0 &= (1<<5) - 1;
00120       op0 <<= 14;
00121       Value |= op0;
00122       // op1: rs2
00123       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00124       op1 &= (1<<5) - 1;
00125       Value |= op1;
00126       // op2: rd
00127       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00128       op2 &= (1<<5) - 1;
00129       op2 <<= 25;
00130       Value |= op2;
00131       break;
00132     }
00133     case V9::ADDi: {
00134       DEBUG(std::cerr << "Emitting ADDi\n");
00135       Value = 2147491840U;
00136 
00137       // op0: rs1
00138       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00139       op0 &= (1<<5) - 1;
00140       op0 <<= 14;
00141       Value |= op0;
00142       // op1: simm13
00143       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00144       op1 &= (1<<13) - 1;
00145       Value |= op1;
00146       // op2: rd
00147       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00148       op2 &= (1<<5) - 1;
00149       op2 <<= 25;
00150       Value |= op2;
00151       break;
00152     }
00153     case V9::ADDr: {
00154       DEBUG(std::cerr << "Emitting ADDr\n");
00155       Value = 2147483648U;
00156 
00157       // op0: rs1
00158       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00159       op0 &= (1<<5) - 1;
00160       op0 <<= 14;
00161       Value |= op0;
00162       // op1: rs2
00163       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00164       op1 &= (1<<5) - 1;
00165       Value |= op1;
00166       // op2: rd
00167       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00168       op2 &= (1<<5) - 1;
00169       op2 <<= 25;
00170       Value |= op2;
00171       break;
00172     }
00173     case V9::ANDNcci: {
00174       DEBUG(std::cerr << "Emitting ANDNcci\n");
00175       Value = 2158501888U;
00176 
00177       // op0: rs1
00178       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00179       op0 &= (1<<5) - 1;
00180       op0 <<= 14;
00181       Value |= op0;
00182       // op1: simm13
00183       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00184       op1 &= (1<<13) - 1;
00185       Value |= op1;
00186       // op2: rd
00187       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00188       op2 &= (1<<5) - 1;
00189       op2 <<= 25;
00190       Value |= op2;
00191       break;
00192     }
00193     case V9::ANDNccr: {
00194       DEBUG(std::cerr << "Emitting ANDNccr\n");
00195       Value = 2158493696U;
00196 
00197       // op0: rs1
00198       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00199       op0 &= (1<<5) - 1;
00200       op0 <<= 14;
00201       Value |= op0;
00202       // op1: rs2
00203       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00204       op1 &= (1<<5) - 1;
00205       Value |= op1;
00206       // op2: rd
00207       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00208       op2 &= (1<<5) - 1;
00209       op2 <<= 25;
00210       Value |= op2;
00211       break;
00212     }
00213     case V9::ANDNi: {
00214       DEBUG(std::cerr << "Emitting ANDNi\n");
00215       Value = 2150113280U;
00216 
00217       // op0: rs1
00218       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00219       op0 &= (1<<5) - 1;
00220       op0 <<= 14;
00221       Value |= op0;
00222       // op1: simm13
00223       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00224       op1 &= (1<<13) - 1;
00225       Value |= op1;
00226       // op2: rd
00227       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00228       op2 &= (1<<5) - 1;
00229       op2 <<= 25;
00230       Value |= op2;
00231       break;
00232     }
00233     case V9::ANDNr: {
00234       DEBUG(std::cerr << "Emitting ANDNr\n");
00235       Value = 2150105088U;
00236 
00237       // op0: rs1
00238       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00239       op0 &= (1<<5) - 1;
00240       op0 <<= 14;
00241       Value |= op0;
00242       // op1: rs2
00243       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00244       op1 &= (1<<5) - 1;
00245       Value |= op1;
00246       // op2: rd
00247       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00248       op2 &= (1<<5) - 1;
00249       op2 <<= 25;
00250       Value |= op2;
00251       break;
00252     }
00253     case V9::ANDcci: {
00254       DEBUG(std::cerr << "Emitting ANDcci\n");
00255       Value = 2156404736U;
00256 
00257       // op0: rs1
00258       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00259       op0 &= (1<<5) - 1;
00260       op0 <<= 14;
00261       Value |= op0;
00262       // op1: simm13
00263       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00264       op1 &= (1<<13) - 1;
00265       Value |= op1;
00266       // op2: rd
00267       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00268       op2 &= (1<<5) - 1;
00269       op2 <<= 25;
00270       Value |= op2;
00271       break;
00272     }
00273     case V9::ANDccr: {
00274       DEBUG(std::cerr << "Emitting ANDccr\n");
00275       Value = 2156396544U;
00276 
00277       // op0: rs1
00278       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00279       op0 &= (1<<5) - 1;
00280       op0 <<= 14;
00281       Value |= op0;
00282       // op1: rs2
00283       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00284       op1 &= (1<<5) - 1;
00285       Value |= op1;
00286       // op2: rd
00287       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00288       op2 &= (1<<5) - 1;
00289       op2 <<= 25;
00290       Value |= op2;
00291       break;
00292     }
00293     case V9::ANDi: {
00294       DEBUG(std::cerr << "Emitting ANDi\n");
00295       Value = 2148016128U;
00296 
00297       // op0: rs1
00298       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00299       op0 &= (1<<5) - 1;
00300       op0 <<= 14;
00301       Value |= op0;
00302       // op1: simm13
00303       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00304       op1 &= (1<<13) - 1;
00305       Value |= op1;
00306       // op2: rd
00307       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00308       op2 &= (1<<5) - 1;
00309       op2 <<= 25;
00310       Value |= op2;
00311       break;
00312     }
00313     case V9::ANDr: {
00314       DEBUG(std::cerr << "Emitting ANDr\n");
00315       Value = 2148007936U;
00316 
00317       // op0: rs1
00318       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00319       op0 &= (1<<5) - 1;
00320       op0 <<= 14;
00321       Value |= op0;
00322       // op1: rs2
00323       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00324       op1 &= (1<<5) - 1;
00325       Value |= op1;
00326       // op2: rd
00327       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00328       op2 &= (1<<5) - 1;
00329       op2 <<= 25;
00330       Value |= op2;
00331       break;
00332     }
00333     case V9::BA: {
00334       DEBUG(std::cerr << "Emitting BA\n");
00335       Value = 273154048U;
00336 
00337       // op0: disp
00338       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00339       op0 &= (1<<19) - 1;
00340       Value |= op0;
00341       break;
00342     }
00343     case V9::BCC: {
00344       DEBUG(std::cerr << "Emitting BCC\n");
00345       Value = 440926208U;
00346 
00347       // op0: cc
00348       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00349       op0 &= (1<<2) - 1;
00350       op0 <<= 20;
00351       Value |= op0;
00352       // op1: disp
00353       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00354       op1 &= (1<<19) - 1;
00355       Value |= op1;
00356       break;
00357     }
00358     case V9::BCS: {
00359       DEBUG(std::cerr << "Emitting BCS\n");
00360       Value = 172490752U;
00361 
00362       // op0: cc
00363       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00364       op0 &= (1<<2) - 1;
00365       op0 <<= 20;
00366       Value |= op0;
00367       // op1: disp
00368       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00369       op1 &= (1<<19) - 1;
00370       Value |= op1;
00371       break;
00372     }
00373     case V9::BE: {
00374       DEBUG(std::cerr << "Emitting BE\n");
00375       Value = 38273024U;
00376 
00377       // op0: cc
00378       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00379       op0 &= (1<<2) - 1;
00380       op0 <<= 20;
00381       Value |= op0;
00382       // op1: disp
00383       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00384       op1 &= (1<<19) - 1;
00385       Value |= op1;
00386       break;
00387     }
00388     case V9::BG: {
00389       DEBUG(std::cerr << "Emitting BG\n");
00390       Value = 340262912U;
00391 
00392       // op0: cc
00393       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00394       op0 &= (1<<2) - 1;
00395       op0 <<= 20;
00396       Value |= op0;
00397       // op1: disp
00398       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00399       op1 &= (1<<19) - 1;
00400       Value |= op1;
00401       break;
00402     }
00403     case V9::BGE: {
00404       DEBUG(std::cerr << "Emitting BGE\n");
00405       Value = 373817344U;
00406 
00407       // op0: cc
00408       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00409       op0 &= (1<<2) - 1;
00410       op0 <<= 20;
00411       Value |= op0;
00412       // op1: disp
00413       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00414       op1 &= (1<<19) - 1;
00415       Value |= op1;
00416       break;
00417     }
00418     case V9::BGU: {
00419       DEBUG(std::cerr << "Emitting BGU\n");
00420       Value = 407371776U;
00421 
00422       // op0: cc
00423       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00424       op0 &= (1<<2) - 1;
00425       op0 <<= 20;
00426       Value |= op0;
00427       // op1: disp
00428       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00429       op1 &= (1<<19) - 1;
00430       Value |= op1;
00431       break;
00432     }
00433     case V9::BL: {
00434       DEBUG(std::cerr << "Emitting BL\n");
00435       Value = 105381888U;
00436 
00437       // op0: cc
00438       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00439       op0 &= (1<<2) - 1;
00440       op0 <<= 20;
00441       Value |= op0;
00442       // op1: disp
00443       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00444       op1 &= (1<<19) - 1;
00445       Value |= op1;
00446       break;
00447     }
00448     case V9::BLE: {
00449       DEBUG(std::cerr << "Emitting BLE\n");
00450       Value = 71827456U;
00451 
00452       // op0: cc
00453       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00454       op0 &= (1<<2) - 1;
00455       op0 <<= 20;
00456       Value |= op0;
00457       // op1: disp
00458       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00459       op1 &= (1<<19) - 1;
00460       Value |= op1;
00461       break;
00462     }
00463     case V9::BLEU: {
00464       DEBUG(std::cerr << "Emitting BLEU\n");
00465       Value = 138936320U;
00466 
00467       // op0: cc
00468       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00469       op0 &= (1<<2) - 1;
00470       op0 <<= 20;
00471       Value |= op0;
00472       // op1: disp
00473       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00474       op1 &= (1<<19) - 1;
00475       Value |= op1;
00476       break;
00477     }
00478     case V9::BN: {
00479       DEBUG(std::cerr << "Emitting BN\n");
00480       Value = 4718592U;
00481 
00482       // op0: disp
00483       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00484       op0 &= (1<<19) - 1;
00485       Value |= op0;
00486       break;
00487     }
00488     case V9::BNE: {
00489       DEBUG(std::cerr << "Emitting BNE\n");
00490       Value = 306708480U;
00491 
00492       // op0: cc
00493       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00494       op0 &= (1<<2) - 1;
00495       op0 <<= 20;
00496       Value |= op0;
00497       // op1: disp
00498       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00499       op1 &= (1<<19) - 1;
00500       Value |= op1;
00501       break;
00502     }
00503     case V9::BNEG: {
00504       DEBUG(std::cerr << "Emitting BNEG\n");
00505       Value = 206045184U;
00506 
00507       // op0: cc
00508       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00509       op0 &= (1<<2) - 1;
00510       op0 <<= 20;
00511       Value |= op0;
00512       // op1: disp
00513       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00514       op1 &= (1<<19) - 1;
00515       Value |= op1;
00516       break;
00517     }
00518     case V9::BPOS: {
00519       DEBUG(std::cerr << "Emitting BPOS\n");
00520       Value = 474480640U;
00521 
00522       // op0: cc
00523       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00524       op0 &= (1<<2) - 1;
00525       op0 <<= 20;
00526       Value |= op0;
00527       // op1: disp
00528       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00529       op1 &= (1<<19) - 1;
00530       Value |= op1;
00531       break;
00532     }
00533     case V9::BRGEZ: {
00534       DEBUG(std::cerr << "Emitting BRGEZ\n");
00535       Value = 247988224U;
00536 
00537       // op0: rs1
00538       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00539       op0 &= (1<<5) - 1;
00540       op0 <<= 14;
00541       Value |= op0;
00542       // op1: disp
00543       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00544       Value |= getValueBit(op1, 15) << 21;
00545       Value |= getValueBit(op1, 14) << 20;
00546       Value |= getValueBit(op1, 13) << 13;
00547       Value |= getValueBit(op1, 12) << 12;
00548       Value |= getValueBit(op1, 11) << 11;
00549       Value |= getValueBit(op1, 10) << 10;
00550       Value |= getValueBit(op1, 9) << 9;
00551       Value |= getValueBit(op1, 8) << 8;
00552       Value |= getValueBit(op1, 7) << 7;
00553       Value |= getValueBit(op1, 6) << 6;
00554       Value |= getValueBit(op1, 5) << 5;
00555       Value |= getValueBit(op1, 4) << 4;
00556       Value |= getValueBit(op1, 3) << 3;
00557       Value |= getValueBit(op1, 2) << 2;
00558       Value |= getValueBit(op1, 1) << 1;
00559       Value |= getValueBit(op1, 0) << 0;
00560       break;
00561     }
00562     case V9::BRGZ: {
00563       DEBUG(std::cerr << "Emitting BRGZ\n");
00564       Value = 214433792U;
00565 
00566       // op0: rs1
00567       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00568       op0 &= (1<<5) - 1;
00569       op0 <<= 14;
00570       Value |= op0;
00571       // op1: disp
00572       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00573       Value |= getValueBit(op1, 15) << 21;
00574       Value |= getValueBit(op1, 14) << 20;
00575       Value |= getValueBit(op1, 13) << 13;
00576       Value |= getValueBit(op1, 12) << 12;
00577       Value |= getValueBit(op1, 11) << 11;
00578       Value |= getValueBit(op1, 10) << 10;
00579       Value |= getValueBit(op1, 9) << 9;
00580       Value |= getValueBit(op1, 8) << 8;
00581       Value |= getValueBit(op1, 7) << 7;
00582       Value |= getValueBit(op1, 6) << 6;
00583       Value |= getValueBit(op1, 5) << 5;
00584       Value |= getValueBit(op1, 4) << 4;
00585       Value |= getValueBit(op1, 3) << 3;
00586       Value |= getValueBit(op1, 2) << 2;
00587       Value |= getValueBit(op1, 1) << 1;
00588       Value |= getValueBit(op1, 0) << 0;
00589       break;
00590     }
00591     case V9::BRLEZ: {
00592       DEBUG(std::cerr << "Emitting BRLEZ\n");
00593       Value = 80216064U;
00594 
00595       // op0: rs1
00596       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00597       op0 &= (1<<5) - 1;
00598       op0 <<= 14;
00599       Value |= op0;
00600       // op1: disp
00601       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00602       Value |= getValueBit(op1, 15) << 21;
00603       Value |= getValueBit(op1, 14) << 20;
00604       Value |= getValueBit(op1, 13) << 13;
00605       Value |= getValueBit(op1, 12) << 12;
00606       Value |= getValueBit(op1, 11) << 11;
00607       Value |= getValueBit(op1, 10) << 10;
00608       Value |= getValueBit(op1, 9) << 9;
00609       Value |= getValueBit(op1, 8) << 8;
00610       Value |= getValueBit(op1, 7) << 7;
00611       Value |= getValueBit(op1, 6) << 6;
00612       Value |= getValueBit(op1, 5) << 5;
00613       Value |= getValueBit(op1, 4) << 4;
00614       Value |= getValueBit(op1, 3) << 3;
00615       Value |= getValueBit(op1, 2) << 2;
00616       Value |= getValueBit(op1, 1) << 1;
00617       Value |= getValueBit(op1, 0) << 0;
00618       break;
00619     }
00620     case V9::BRLZ: {
00621       DEBUG(std::cerr << "Emitting BRLZ\n");
00622       Value = 113770496U;
00623 
00624       // op0: rs1
00625       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00626       op0 &= (1<<5) - 1;
00627       op0 <<= 14;
00628       Value |= op0;
00629       // op1: disp
00630       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00631       Value |= getValueBit(op1, 15) << 21;
00632       Value |= getValueBit(op1, 14) << 20;
00633       Value |= getValueBit(op1, 13) << 13;
00634       Value |= getValueBit(op1, 12) << 12;
00635       Value |= getValueBit(op1, 11) << 11;
00636       Value |= getValueBit(op1, 10) << 10;
00637       Value |= getValueBit(op1, 9) << 9;
00638       Value |= getValueBit(op1, 8) << 8;
00639       Value |= getValueBit(op1, 7) << 7;
00640       Value |= getValueBit(op1, 6) << 6;
00641       Value |= getValueBit(op1, 5) << 5;
00642       Value |= getValueBit(op1, 4) << 4;
00643       Value |= getValueBit(op1, 3) << 3;
00644       Value |= getValueBit(op1, 2) << 2;
00645       Value |= getValueBit(op1, 1) << 1;
00646       Value |= getValueBit(op1, 0) << 0;
00647       break;
00648     }
00649     case V9::BRNZ: {
00650       DEBUG(std::cerr << "Emitting BRNZ\n");
00651       Value = 180879360U;
00652 
00653       // op0: rs1
00654       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00655       op0 &= (1<<5) - 1;
00656       op0 <<= 14;
00657       Value |= op0;
00658       // op1: disp
00659       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00660       Value |= getValueBit(op1, 15) << 21;
00661       Value |= getValueBit(op1, 14) << 20;
00662       Value |= getValueBit(op1, 13) << 13;
00663       Value |= getValueBit(op1, 12) << 12;
00664       Value |= getValueBit(op1, 11) << 11;
00665       Value |= getValueBit(op1, 10) << 10;
00666       Value |= getValueBit(op1, 9) << 9;
00667       Value |= getValueBit(op1, 8) << 8;
00668       Value |= getValueBit(op1, 7) << 7;
00669       Value |= getValueBit(op1, 6) << 6;
00670       Value |= getValueBit(op1, 5) << 5;
00671       Value |= getValueBit(op1, 4) << 4;
00672       Value |= getValueBit(op1, 3) << 3;
00673       Value |= getValueBit(op1, 2) << 2;
00674       Value |= getValueBit(op1, 1) << 1;
00675       Value |= getValueBit(op1, 0) << 0;
00676       break;
00677     }
00678     case V9::BRZ: {
00679       DEBUG(std::cerr << "Emitting BRZ\n");
00680       Value = 46661632U;
00681 
00682       // op0: rs1
00683       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00684       op0 &= (1<<5) - 1;
00685       op0 <<= 14;
00686       Value |= op0;
00687       // op1: disp
00688       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00689       Value |= getValueBit(op1, 15) << 21;
00690       Value |= getValueBit(op1, 14) << 20;
00691       Value |= getValueBit(op1, 13) << 13;
00692       Value |= getValueBit(op1, 12) << 12;
00693       Value |= getValueBit(op1, 11) << 11;
00694       Value |= getValueBit(op1, 10) << 10;
00695       Value |= getValueBit(op1, 9) << 9;
00696       Value |= getValueBit(op1, 8) << 8;
00697       Value |= getValueBit(op1, 7) << 7;
00698       Value |= getValueBit(op1, 6) << 6;
00699       Value |= getValueBit(op1, 5) << 5;
00700       Value |= getValueBit(op1, 4) << 4;
00701       Value |= getValueBit(op1, 3) << 3;
00702       Value |= getValueBit(op1, 2) << 2;
00703       Value |= getValueBit(op1, 1) << 1;
00704       Value |= getValueBit(op1, 0) << 0;
00705       break;
00706     }
00707     case V9::BVC: {
00708       DEBUG(std::cerr << "Emitting BVC\n");
00709       Value = 508035072U;
00710 
00711       // op0: cc
00712       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00713       op0 &= (1<<2) - 1;
00714       op0 <<= 20;
00715       Value |= op0;
00716       // op1: disp
00717       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00718       op1 &= (1<<19) - 1;
00719       Value |= op1;
00720       break;
00721     }
00722     case V9::BVS: {
00723       DEBUG(std::cerr << "Emitting BVS\n");
00724       Value = 239599616U;
00725 
00726       // op0: cc
00727       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00728       op0 &= (1<<2) - 1;
00729       op0 <<= 20;
00730       Value |= op0;
00731       // op1: disp
00732       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00733       op1 &= (1<<19) - 1;
00734       Value |= op1;
00735       break;
00736     }
00737     case V9::CALL: {
00738       DEBUG(std::cerr << "Emitting CALL\n");
00739       Value = 1073741824U;
00740 
00741       // op0: disp
00742       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00743       op0 &= (1<<30) - 1;
00744       Value |= op0;
00745       break;
00746     }
00747     case V9::FABSD: {
00748       DEBUG(std::cerr << "Emitting FABSD\n");
00749       Value = 2174746944U;
00750 
00751       // op0: rs2
00752       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00753       op0 &= (1<<5) - 1;
00754       Value |= op0;
00755       // op1: rd
00756       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00757       op1 &= (1<<5) - 1;
00758       op1 <<= 25;
00759       Value |= op1;
00760       break;
00761     }
00762     case V9::FABSS: {
00763       DEBUG(std::cerr << "Emitting FABSS\n");
00764       Value = 2174746912U;
00765 
00766       // op0: rs2
00767       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00768       op0 &= (1<<5) - 1;
00769       Value |= op0;
00770       // op1: rd
00771       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00772       op1 &= (1<<5) - 1;
00773       op1 <<= 25;
00774       Value |= op1;
00775       break;
00776     }
00777     case V9::FADDD: {
00778       DEBUG(std::cerr << "Emitting FADDD\n");
00779       Value = 2174748736U;
00780 
00781       // op0: rs1
00782       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00783       op0 &= (1<<5) - 1;
00784       op0 <<= 14;
00785       Value |= op0;
00786       // op1: rs2
00787       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00788       op1 &= (1<<5) - 1;
00789       Value |= op1;
00790       // op2: rd
00791       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00792       op2 &= (1<<5) - 1;
00793       op2 <<= 25;
00794       Value |= op2;
00795       break;
00796     }
00797     case V9::FADDQ: {
00798       DEBUG(std::cerr << "Emitting FADDQ\n");
00799       Value = 2174748768U;
00800 
00801       // op0: rs1
00802       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00803       op0 &= (1<<5) - 1;
00804       op0 <<= 14;
00805       Value |= op0;
00806       // op1: rs2
00807       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00808       op1 &= (1<<5) - 1;
00809       Value |= op1;
00810       // op2: rd
00811       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00812       op2 &= (1<<5) - 1;
00813       op2 <<= 25;
00814       Value |= op2;
00815       break;
00816     }
00817     case V9::FADDS: {
00818       DEBUG(std::cerr << "Emitting FADDS\n");
00819       Value = 2174748704U;
00820 
00821       // op0: rs1
00822       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00823       op0 &= (1<<5) - 1;
00824       op0 <<= 14;
00825       Value |= op0;
00826       // op1: rs2
00827       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00828       op1 &= (1<<5) - 1;
00829       Value |= op1;
00830       // op2: rd
00831       int op2 = getMachineOpValue(MI, MI.getOperand(2));
00832       op2 &= (1<<5) - 1;
00833       op2 <<= 25;
00834       Value |= op2;
00835       break;
00836     }
00837     case V9::FBA: {
00838       DEBUG(std::cerr << "Emitting FBA\n");
00839       Value = 289931264U;
00840 
00841       // op0: cc
00842       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00843       op0 &= (1<<2) - 1;
00844       op0 <<= 20;
00845       Value |= op0;
00846       // op1: disp
00847       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00848       op1 &= (1<<19) - 1;
00849       Value |= op1;
00850       break;
00851     }
00852     case V9::FBE: {
00853       DEBUG(std::cerr << "Emitting FBE\n");
00854       Value = 323485696U;
00855 
00856       // op0: cc
00857       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00858       op0 &= (1<<2) - 1;
00859       op0 <<= 20;
00860       Value |= op0;
00861       // op1: disp
00862       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00863       op1 &= (1<<19) - 1;
00864       Value |= op1;
00865       break;
00866     }
00867     case V9::FBG: {
00868       DEBUG(std::cerr << "Emitting FBG\n");
00869       Value = 222822400U;
00870 
00871       // op0: cc
00872       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00873       op0 &= (1<<2) - 1;
00874       op0 <<= 20;
00875       Value |= op0;
00876       // op1: disp
00877       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00878       op1 &= (1<<19) - 1;
00879       Value |= op1;
00880       break;
00881     }
00882     case V9::FBGE: {
00883       DEBUG(std::cerr << "Emitting FBGE\n");
00884       Value = 390594560U;
00885 
00886       // op0: cc
00887       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00888       op0 &= (1<<2) - 1;
00889       op0 <<= 20;
00890       Value |= op0;
00891       // op1: disp
00892       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00893       op1 &= (1<<19) - 1;
00894       Value |= op1;
00895       break;
00896     }
00897     case V9::FBL: {
00898       DEBUG(std::cerr << "Emitting FBL\n");
00899       Value = 155713536U;
00900 
00901       // op0: cc
00902       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00903       op0 &= (1<<2) - 1;
00904       op0 <<= 20;
00905       Value |= op0;
00906       // op1: disp
00907       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00908       op1 &= (1<<19) - 1;
00909       Value |= op1;
00910       break;
00911     }
00912     case V9::FBLE: {
00913       DEBUG(std::cerr << "Emitting FBLE\n");
00914       Value = 457703424U;
00915 
00916       // op0: cc
00917       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00918       op0 &= (1<<2) - 1;
00919       op0 <<= 20;
00920       Value |= op0;
00921       // op1: disp
00922       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00923       op1 &= (1<<19) - 1;
00924       Value |= op1;
00925       break;
00926     }
00927     case V9::FBLG: {
00928       DEBUG(std::cerr << "Emitting FBLG\n");
00929       Value = 88604672U;
00930 
00931       // op0: cc
00932       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00933       op0 &= (1<<2) - 1;
00934       op0 <<= 20;
00935       Value |= op0;
00936       // op1: disp
00937       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00938       op1 &= (1<<19) - 1;
00939       Value |= op1;
00940       break;
00941     }
00942     case V9::FBN: {
00943       DEBUG(std::cerr << "Emitting FBN\n");
00944       Value = 21495808U;
00945 
00946       // op0: cc
00947       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00948       op0 &= (1<<2) - 1;
00949       op0 <<= 20;
00950       Value |= op0;
00951       // op1: disp
00952       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00953       op1 &= (1<<19) - 1;
00954       Value |= op1;
00955       break;
00956     }
00957     case V9::FBNE: {
00958       DEBUG(std::cerr << "Emitting FBNE\n");
00959       Value = 55050240U;
00960 
00961       // op0: cc
00962       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00963       op0 &= (1<<2) - 1;
00964       op0 <<= 20;
00965       Value |= op0;
00966       // op1: disp
00967       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00968       op1 &= (1<<19) - 1;
00969       Value |= op1;
00970       break;
00971     }
00972     case V9::FBO: {
00973       DEBUG(std::cerr << "Emitting FBO\n");
00974       Value = 524812288U;
00975 
00976       // op0: cc
00977       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00978       op0 &= (1<<2) - 1;
00979       op0 <<= 20;
00980       Value |= op0;
00981       // op1: disp
00982       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00983       op1 &= (1<<19) - 1;
00984       Value |= op1;
00985       break;
00986     }
00987     case V9::FBU: {
00988       DEBUG(std::cerr << "Emitting FBU\n");
00989       Value = 256376832U;
00990 
00991       // op0: cc
00992       int op0 = getMachineOpValue(MI, MI.getOperand(0));
00993       op0 &= (1<<2) - 1;
00994       op0 <<= 20;
00995       Value |= op0;
00996       // op1: disp
00997       int op1 = getMachineOpValue(MI, MI.getOperand(1));
00998       op1 &= (1<<19) - 1;
00999       Value |= op1;
01000       break;
01001     }
01002     case V9::FBUE: {
01003       DEBUG(std::cerr << "Emitting FBUE\n");
01004       Value = 357040128U;
01005 
01006       // op0: cc
01007       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01008       op0 &= (1<<2) - 1;
01009       op0 <<= 20;
01010       Value |= op0;
01011       // op1: disp
01012       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01013       op1 &= (1<<19) - 1;
01014       Value |= op1;
01015       break;
01016     }
01017     case V9::FBUG: {
01018       DEBUG(std::cerr << "Emitting FBUG\n");
01019       Value = 189267968U;
01020 
01021       // op0: cc
01022       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01023       op0 &= (1<<2) - 1;
01024       op0 <<= 20;
01025       Value |= op0;
01026       // op1: disp
01027       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01028       op1 &= (1<<19) - 1;
01029       Value |= op1;
01030       break;
01031     }
01032     case V9::FBUGE: {
01033       DEBUG(std::cerr << "Emitting FBUGE\n");
01034       Value = 424148992U;
01035 
01036       // op0: cc
01037       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01038       op0 &= (1<<2) - 1;
01039       op0 <<= 20;
01040       Value |= op0;
01041       // op1: disp
01042       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01043       op1 &= (1<<19) - 1;
01044       Value |= op1;
01045       break;
01046     }
01047     case V9::FBUL: {
01048       DEBUG(std::cerr << "Emitting FBUL\n");
01049       Value = 122159104U;
01050 
01051       // op0: cc
01052       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01053       op0 &= (1<<2) - 1;
01054       op0 <<= 20;
01055       Value |= op0;
01056       // op1: disp
01057       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01058       op1 &= (1<<19) - 1;
01059       Value |= op1;
01060       break;
01061     }
01062     case V9::FBULE: {
01063       DEBUG(std::cerr << "Emitting FBULE\n");
01064       Value = 491257856U;
01065 
01066       // op0: cc
01067       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01068       op0 &= (1<<2) - 1;
01069       op0 <<= 20;
01070       Value |= op0;
01071       // op1: disp
01072       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01073       op1 &= (1<<19) - 1;
01074       Value |= op1;
01075       break;
01076     }
01077     case V9::FCMPD: {
01078       DEBUG(std::cerr << "Emitting FCMPD\n");
01079       Value = 2175273536U;
01080 
01081       // op0: cc
01082       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01083       op0 &= (1<<2) - 1;
01084       op0 <<= 25;
01085       Value |= op0;
01086       // op1: rs1
01087       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01088       op1 &= (1<<5) - 1;
01089       op1 <<= 14;
01090       Value |= op1;
01091       // op2: rs2
01092       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01093       op2 &= (1<<5) - 1;
01094       Value |= op2;
01095       break;
01096     }
01097     case V9::FCMPQ: {
01098       DEBUG(std::cerr << "Emitting FCMPQ\n");
01099       Value = 2175273568U;
01100 
01101       // op0: cc
01102       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01103       op0 &= (1<<2) - 1;
01104       op0 <<= 25;
01105       Value |= op0;
01106       // op1: rs1
01107       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01108       op1 &= (1<<5) - 1;
01109       op1 <<= 14;
01110       Value |= op1;
01111       // op2: rs2
01112       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01113       op2 &= (1<<5) - 1;
01114       Value |= op2;
01115       break;
01116     }
01117     case V9::FCMPS: {
01118       DEBUG(std::cerr << "Emitting FCMPS\n");
01119       Value = 2175273504U;
01120 
01121       // op0: cc
01122       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01123       op0 &= (1<<2) - 1;
01124       op0 <<= 25;
01125       Value |= op0;
01126       // op1: rs1
01127       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01128       op1 &= (1<<5) - 1;
01129       op1 <<= 14;
01130       Value |= op1;
01131       // op2: rs2
01132       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01133       op2 &= (1<<5) - 1;
01134       Value |= op2;
01135       break;
01136     }
01137     case V9::FDIVD: {
01138       DEBUG(std::cerr << "Emitting FDIVD\n");
01139       Value = 2174749120U;
01140 
01141       // op0: rs1
01142       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01143       op0 &= (1<<5) - 1;
01144       op0 <<= 14;
01145       Value |= op0;
01146       // op1: rs2
01147       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01148       op1 &= (1<<5) - 1;
01149       Value |= op1;
01150       // op2: rd
01151       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01152       op2 &= (1<<5) - 1;
01153       op2 <<= 25;
01154       Value |= op2;
01155       break;
01156     }
01157     case V9::FDIVQ: {
01158       DEBUG(std::cerr << "Emitting FDIVQ\n");
01159       Value = 2174749152U;
01160 
01161       // op0: rs1
01162       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01163       op0 &= (1<<5) - 1;
01164       op0 <<= 14;
01165       Value |= op0;
01166       // op1: rs2
01167       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01168       op1 &= (1<<5) - 1;
01169       Value |= op1;
01170       // op2: rd
01171       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01172       op2 &= (1<<5) - 1;
01173       op2 <<= 25;
01174       Value |= op2;
01175       break;
01176     }
01177     case V9::FDIVS: {
01178       DEBUG(std::cerr << "Emitting FDIVS\n");
01179       Value = 2174749088U;
01180 
01181       // op0: rs1
01182       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01183       op0 &= (1<<5) - 1;
01184       op0 <<= 14;
01185       Value |= op0;
01186       // op1: rs2
01187       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01188       op1 &= (1<<5) - 1;
01189       Value |= op1;
01190       // op2: rd
01191       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01192       op2 &= (1<<5) - 1;
01193       op2 <<= 25;
01194       Value |= op2;
01195       break;
01196     }
01197     case V9::FDMULQ: {
01198       DEBUG(std::cerr << "Emitting FDMULQ\n");
01199       Value = 2174750144U;
01200 
01201       // op0: rs1
01202       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01203       op0 &= (1<<5) - 1;
01204       op0 <<= 14;
01205       Value |= op0;
01206       // op1: rs2
01207       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01208       op1 &= (1<<5) - 1;
01209       Value |= op1;
01210       // op2: rd
01211       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01212       op2 &= (1<<5) - 1;
01213       op2 <<= 25;
01214       Value |= op2;
01215       break;
01216     }
01217     case V9::FDTOI: {
01218       DEBUG(std::cerr << "Emitting FDTOI\n");
01219       Value = 2174753344U;
01220 
01221       // op0: rs2
01222       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01223       op0 &= (1<<5) - 1;
01224       Value |= op0;
01225       // op1: rd
01226       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01227       op1 &= (1<<5) - 1;
01228       op1 <<= 25;
01229       Value |= op1;
01230       break;
01231     }
01232     case V9::FDTOQ: {
01233       DEBUG(std::cerr << "Emitting FDTOQ\n");
01234       Value = 2174753216U;
01235 
01236       // op0: rs2
01237       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01238       op0 &= (1<<5) - 1;
01239       Value |= op0;
01240       // op1: rd
01241       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01242       op1 &= (1<<5) - 1;
01243       op1 <<= 25;
01244       Value |= op1;
01245       break;
01246     }
01247     case V9::FDTOS: {
01248       DEBUG(std::cerr << "Emitting FDTOS\n");
01249       Value = 2174752960U;
01250 
01251       // op0: rs2
01252       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01253       op0 &= (1<<5) - 1;
01254       Value |= op0;
01255       // op1: rd
01256       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01257       op1 &= (1<<5) - 1;
01258       op1 <<= 25;
01259       Value |= op1;
01260       break;
01261     }
01262     case V9::FDTOX: {
01263       DEBUG(std::cerr << "Emitting FDTOX\n");
01264       Value = 2174750784U;
01265 
01266       // op0: rs2
01267       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01268       op0 &= (1<<5) - 1;
01269       Value |= op0;
01270       // op1: rd
01271       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01272       op1 &= (1<<5) - 1;
01273       op1 <<= 25;
01274       Value |= op1;
01275       break;
01276     }
01277     case V9::FITOD: {
01278       DEBUG(std::cerr << "Emitting FITOD\n");
01279       Value = 2174753024U;
01280 
01281       // op0: rs2
01282       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01283       op0 &= (1<<5) - 1;
01284       Value |= op0;
01285       // op1: rd
01286       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01287       op1 &= (1<<5) - 1;
01288       op1 <<= 25;
01289       Value |= op1;
01290       break;
01291     }
01292     case V9::FITOQ: {
01293       DEBUG(std::cerr << "Emitting FITOQ\n");
01294       Value = 2174753152U;
01295 
01296       // op0: rs2
01297       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01298       op0 &= (1<<5) - 1;
01299       Value |= op0;
01300       // op1: rd
01301       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01302       op1 &= (1<<5) - 1;
01303       op1 <<= 25;
01304       Value |= op1;
01305       break;
01306     }
01307     case V9::FITOS: {
01308       DEBUG(std::cerr << "Emitting FITOS\n");
01309       Value = 2174752896U;
01310 
01311       // op0: rs2
01312       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01313       op0 &= (1<<5) - 1;
01314       Value |= op0;
01315       // op1: rd
01316       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01317       op1 &= (1<<5) - 1;
01318       op1 <<= 25;
01319       Value |= op1;
01320       break;
01321     }
01322     case V9::FMOVD: {
01323       DEBUG(std::cerr << "Emitting FMOVD\n");
01324       Value = 2174746688U;
01325 
01326       // op0: rs2
01327       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01328       op0 &= (1<<5) - 1;
01329       Value |= op0;
01330       // op1: rd
01331       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01332       op1 &= (1<<5) - 1;
01333       op1 <<= 25;
01334       Value |= op1;
01335       break;
01336     }
01337     case V9::FMOVDA: {
01338       DEBUG(std::cerr << "Emitting FMOVDA\n");
01339       Value = 2175402048U;
01340 
01341       // op0: cc
01342       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01343       op0 &= (1<<3) - 1;
01344       op0 <<= 11;
01345       Value |= op0;
01346       // op1: rs2
01347       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01348       op1 &= (1<<5) - 1;
01349       Value |= op1;
01350       // op2: rd
01351       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01352       op2 &= (1<<5) - 1;
01353       op2 <<= 25;
01354       Value |= op2;
01355       break;
01356     }
01357     case V9::FMOVDCC: {
01358       DEBUG(std::cerr << "Emitting FMOVDCC\n");
01359       Value = 2175483968U;
01360 
01361       // op0: cc
01362       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01363       op0 &= (1<<3) - 1;
01364       op0 <<= 11;
01365       Value |= op0;
01366       // op1: rs2
01367       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01368       op1 &= (1<<5) - 1;
01369       Value |= op1;
01370       // op2: rd
01371       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01372       op2 &= (1<<5) - 1;
01373       op2 <<= 25;
01374       Value |= op2;
01375       break;
01376     }
01377     case V9::FMOVDCS: {
01378       DEBUG(std::cerr << "Emitting FMOVDCS\n");
01379       Value = 2175352896U;
01380 
01381       // op0: cc
01382       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01383       op0 &= (1<<3) - 1;
01384       op0 <<= 11;
01385       Value |= op0;
01386       // op1: rs2
01387       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01388       op1 &= (1<<5) - 1;
01389       Value |= op1;
01390       // op2: rd
01391       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01392       op2 &= (1<<5) - 1;
01393       op2 <<= 25;
01394       Value |= op2;
01395       break;
01396     }
01397     case V9::FMOVDE: {
01398       DEBUG(std::cerr << "Emitting FMOVDE\n");
01399       Value = 2175270976U;
01400 
01401       // op0: cc
01402       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01403       op0 &= (1<<3) - 1;
01404       op0 <<= 11;
01405       Value |= op0;
01406       // op1: rs2
01407       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01408       op1 &= (1<<5) - 1;
01409       Value |= op1;
01410       // op2: rd
01411       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01412       op2 &= (1<<5) - 1;
01413       op2 <<= 25;
01414       Value |= op2;
01415       break;
01416     }
01417     case V9::FMOVDFA: {
01418       DEBUG(std::cerr << "Emitting FMOVDFA\n");
01419       Value = 2175336512U;
01420 
01421       // op0: cc
01422       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01423       op0 &= (1<<3) - 1;
01424       op0 <<= 11;
01425       Value |= op0;
01426       // op1: rs2
01427       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01428       op1 &= (1<<5) - 1;
01429       Value |= op1;
01430       // op2: rd
01431       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01432       op2 &= (1<<5) - 1;
01433       op2 <<= 25;
01434       Value |= op2;
01435       break;
01436     }
01437     case V9::FMOVDFE: {
01438       DEBUG(std::cerr << "Emitting FMOVDFE\n");
01439       Value = 2175418432U;
01440 
01441       // op0: cc
01442       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01443       op0 &= (1<<3) - 1;
01444       op0 <<= 11;
01445       Value |= op0;
01446       // op1: rs2
01447       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01448       op1 &= (1<<5) - 1;
01449       Value |= op1;
01450       // op2: rd
01451       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01452       op2 &= (1<<5) - 1;
01453       op2 <<= 25;
01454       Value |= op2;
01455       break;
01456     }
01457     case V9::FMOVDFG: {
01458       DEBUG(std::cerr << "Emitting FMOVDFG\n");
01459       Value = 2175369280U;
01460 
01461       // op0: cc
01462       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01463       op0 &= (1<<3) - 1;
01464       op0 <<= 11;
01465       Value |= op0;
01466       // op1: rs2
01467       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01468       op1 &= (1<<5) - 1;
01469       Value |= op1;
01470       // op2: rd
01471       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01472       op2 &= (1<<5) - 1;
01473       op2 <<= 25;
01474       Value |= op2;
01475       break;
01476     }
01477     case V9::FMOVDFGE: {
01478       DEBUG(std::cerr << "Emitting FMOVDFGE\n");
01479       Value = 2175451200U;
01480 
01481       // op0: cc
01482       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01483       op0 &= (1<<3) - 1;
01484       op0 <<= 11;
01485       Value |= op0;
01486       // op1: rs2
01487       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01488       op1 &= (1<<5) - 1;
01489       Value |= op1;
01490       // op2: rd
01491       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01492       op2 &= (1<<5) - 1;
01493       op2 <<= 25;
01494       Value |= op2;
01495       break;
01496     }
01497     case V9::FMOVDFL: {
01498       DEBUG(std::cerr << "Emitting FMOVDFL\n");
01499       Value = 2175336512U;
01500 
01501       // op0: cc
01502       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01503       op0 &= (1<<3) - 1;
01504       op0 <<= 11;
01505       Value |= op0;
01506       // op1: rs2
01507       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01508       op1 &= (1<<5) - 1;
01509       Value |= op1;
01510       // op2: rd
01511       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01512       op2 &= (1<<5) - 1;
01513       op2 <<= 25;
01514       Value |= op2;
01515       break;
01516     }
01517     case V9::FMOVDFLE: {
01518       DEBUG(std::cerr << "Emitting FMOVDFLE\n");
01519       Value = 2175483968U;
01520 
01521       // op0: cc
01522       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01523       op0 &= (1<<3) - 1;
01524       op0 <<= 11;
01525       Value |= op0;
01526       // op1: rs2
01527       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01528       op1 &= (1<<5) - 1;
01529       Value |= op1;
01530       // op2: rd
01531       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01532       op2 &= (1<<5) - 1;
01533       op2 <<= 25;
01534       Value |= op2;
01535       break;
01536     }
01537     case V9::FMOVDFLG: {
01538       DEBUG(std::cerr << "Emitting FMOVDFLG\n");
01539       Value = 2175303744U;
01540 
01541       // op0: cc
01542       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01543       op0 &= (1<<3) - 1;
01544       op0 <<= 11;
01545       Value |= op0;
01546       // op1: rs2
01547       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01548       op1 &= (1<<5) - 1;
01549       Value |= op1;
01550       // op2: rd
01551       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01552       op2 &= (1<<5) - 1;
01553       op2 <<= 25;
01554       Value |= op2;
01555       break;
01556     }
01557     case V9::FMOVDFN: {
01558       DEBUG(std::cerr << "Emitting FMOVDFN\n");
01559       Value = 2175270976U;
01560 
01561       // op0: cc
01562       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01563       op0 &= (1<<3) - 1;
01564       op0 <<= 11;
01565       Value |= op0;
01566       // op1: rs2
01567       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01568       op1 &= (1<<5) - 1;
01569       Value |= op1;
01570       // op2: rd
01571       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01572       op2 &= (1<<5) - 1;
01573       op2 <<= 25;
01574       Value |= op2;
01575       break;
01576     }
01577     case V9::FMOVDFNE: {
01578       DEBUG(std::cerr << "Emitting FMOVDFNE\n");
01579       Value = 2175287360U;
01580 
01581       // op0: cc
01582       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01583       op0 &= (1<<3) - 1;
01584       op0 <<= 11;
01585       Value |= op0;
01586       // op1: rs2
01587       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01588       op1 &= (1<<5) - 1;
01589       Value |= op1;
01590       // op2: rd
01591       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01592       op2 &= (1<<5) - 1;
01593       op2 <<= 25;
01594       Value |= op2;
01595       break;
01596     }
01597     case V9::FMOVDFO: {
01598       DEBUG(std::cerr << "Emitting FMOVDFO\n");
01599       Value = 2175516736U;
01600 
01601       // op0: cc
01602       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01603       op0 &= (1<<3) - 1;
01604       op0 <<= 11;
01605       Value |= op0;
01606       // op1: rs2
01607       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01608       op1 &= (1<<5) - 1;
01609       Value |= op1;
01610       // op2: rd
01611       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01612       op2 &= (1<<5) - 1;
01613       op2 <<= 25;
01614       Value |= op2;
01615       break;
01616     }
01617     case V9::FMOVDFU: {
01618       DEBUG(std::cerr << "Emitting FMOVDFU\n");
01619       Value = 2175385664U;
01620 
01621       // op0: cc
01622       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01623       op0 &= (1<<3) - 1;
01624       op0 <<= 11;
01625       Value |= op0;
01626       // op1: rs2
01627       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01628       op1 &= (1<<5) - 1;
01629       Value |= op1;
01630       // op2: rd
01631       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01632       op2 &= (1<<5) - 1;
01633       op2 <<= 25;
01634       Value |= op2;
01635       break;
01636     }
01637     case V9::FMOVDFUE: {
01638       DEBUG(std::cerr << "Emitting FMOVDFUE\n");
01639       Value = 2175434816U;
01640 
01641       // op0: cc
01642       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01643       op0 &= (1<<3) - 1;
01644       op0 <<= 11;
01645       Value |= op0;
01646       // op1: rs2
01647       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01648       op1 &= (1<<5) - 1;
01649       Value |= op1;
01650       // op2: rd
01651       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01652       op2 &= (1<<5) - 1;
01653       op2 <<= 25;
01654       Value |= op2;
01655       break;
01656     }
01657     case V9::FMOVDFUG: {
01658       DEBUG(std::cerr << "Emitting FMOVDFUG\n");
01659       Value = 2175352896U;
01660 
01661       // op0: cc
01662       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01663       op0 &= (1<<3) - 1;
01664       op0 <<= 11;
01665       Value |= op0;
01666       // op1: rs2
01667       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01668       op1 &= (1<<5) - 1;
01669       Value |= op1;
01670       // op2: rd
01671       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01672       op2 &= (1<<5) - 1;
01673       op2 <<= 25;
01674       Value |= op2;
01675       break;
01676     }
01677     case V9::FMOVDFUGE: {
01678       DEBUG(std::cerr << "Emitting FMOVDFUGE\n");
01679       Value = 2175467584U;
01680 
01681       // op0: cc
01682       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01683       op0 &= (1<<3) - 1;
01684       op0 <<= 11;
01685       Value |= op0;
01686       // op1: rs2
01687       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01688       op1 &= (1<<5) - 1;
01689       Value |= op1;
01690       // op2: rd
01691       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01692       op2 &= (1<<5) - 1;
01693       op2 <<= 25;
01694       Value |= op2;
01695       break;
01696     }
01697     case V9::FMOVDFUL: {
01698       DEBUG(std::cerr << "Emitting FMOVDFUL\n");
01699       Value = 2175320128U;
01700 
01701       // op0: cc
01702       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01703       op0 &= (1<<3) - 1;
01704       op0 <<= 11;
01705       Value |= op0;
01706       // op1: rs2
01707       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01708       op1 &= (1<<5) - 1;
01709       Value |= op1;
01710       // op2: rd
01711       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01712       op2 &= (1<<5) - 1;
01713       op2 <<= 25;
01714       Value |= op2;
01715       break;
01716     }
01717     case V9::FMOVDFULE: {
01718       DEBUG(std::cerr << "Emitting FMOVDFULE\n");
01719       Value = 2175500352U;
01720 
01721       // op0: cc
01722       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01723       op0 &= (1<<3) - 1;
01724       op0 <<= 11;
01725       Value |= op0;
01726       // op1: rs2
01727       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01728       op1 &= (1<<5) - 1;
01729       Value |= op1;
01730       // op2: rd
01731       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01732       op2 &= (1<<5) - 1;
01733       op2 <<= 25;
01734       Value |= op2;
01735       break;
01736     }
01737     case V9::FMOVDG: {
01738       DEBUG(std::cerr << "Emitting FMOVDG\n");
01739       Value = 2175434816U;
01740 
01741       // op0: cc
01742       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01743       op0 &= (1<<3) - 1;
01744       op0 <<= 11;
01745       Value |= op0;
01746       // op1: rs2
01747       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01748       op1 &= (1<<5) - 1;
01749       Value |= op1;
01750       // op2: rd
01751       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01752       op2 &= (1<<5) - 1;
01753       op2 <<= 25;
01754       Value |= op2;
01755       break;
01756     }
01757     case V9::FMOVDGE: {
01758       DEBUG(std::cerr << "Emitting FMOVDGE\n");
01759       Value = 2175451200U;
01760 
01761       // op0: cc
01762       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01763       op0 &= (1<<3) - 1;
01764       op0 <<= 11;
01765       Value |= op0;
01766       // op1: rs2
01767       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01768       op1 &= (1<<5) - 1;
01769       Value |= op1;
01770       // op2: rd
01771       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01772       op2 &= (1<<5) - 1;
01773       op2 <<= 25;
01774       Value |= op2;
01775       break;
01776     }
01777     case V9::FMOVDGU: {
01778       DEBUG(std::cerr << "Emitting FMOVDGU\n");
01779       Value = 2175467584U;
01780 
01781       // op0: cc
01782       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01783       op0 &= (1<<3) - 1;
01784       op0 <<= 11;
01785       Value |= op0;
01786       // op1: rs2
01787       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01788       op1 &= (1<<5) - 1;
01789       Value |= op1;
01790       // op2: rd
01791       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01792       op2 &= (1<<5) - 1;
01793       op2 <<= 25;
01794       Value |= op2;
01795       break;
01796     }
01797     case V9::FMOVDL: {
01798       DEBUG(std::cerr << "Emitting FMOVDL\n");
01799       Value = 2175320128U;
01800 
01801       // op0: cc
01802       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01803       op0 &= (1<<3) - 1;
01804       op0 <<= 11;
01805       Value |= op0;
01806       // op1: rs2
01807       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01808       op1 &= (1<<5) - 1;
01809       Value |= op1;
01810       // op2: rd
01811       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01812       op2 &= (1<<5) - 1;
01813       op2 <<= 25;
01814       Value |= op2;
01815       break;
01816     }
01817     case V9::FMOVDLE: {
01818       DEBUG(std::cerr << "Emitting FMOVDLE\n");
01819       Value = 2175270976U;
01820 
01821       // op0: cc
01822       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01823       op0 &= (1<<3) - 1;
01824       op0 <<= 11;
01825       Value |= op0;
01826       // op1: rs2
01827       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01828       op1 &= (1<<5) - 1;
01829       Value |= op1;
01830       // op2: rd
01831       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01832       op2 &= (1<<5) - 1;
01833       op2 <<= 25;
01834       Value |= op2;
01835       break;
01836     }
01837     case V9::FMOVDLEU: {
01838       DEBUG(std::cerr << "Emitting FMOVDLEU\n");
01839       Value = 2175336512U;
01840 
01841       // op0: cc
01842       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01843       op0 &= (1<<3) - 1;
01844       op0 <<= 11;
01845       Value |= op0;
01846       // op1: rs2
01847       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01848       op1 &= (1<<5) - 1;
01849       Value |= op1;
01850       // op2: rd
01851       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01852       op2 &= (1<<5) - 1;
01853       op2 <<= 25;
01854       Value |= op2;
01855       break;
01856     }
01857     case V9::FMOVDN: {
01858       DEBUG(std::cerr << "Emitting FMOVDN\n");
01859       Value = 2175270976U;
01860 
01861       // op0: cc
01862       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01863       op0 &= (1<<3) - 1;
01864       op0 <<= 11;
01865       Value |= op0;
01866       // op1: rs2
01867       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01868       op1 &= (1<<5) - 1;
01869       Value |= op1;
01870       // op2: rd
01871       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01872       op2 &= (1<<5) - 1;
01873       op2 <<= 25;
01874       Value |= op2;
01875       break;
01876     }
01877     case V9::FMOVDNE: {
01878       DEBUG(std::cerr << "Emitting FMOVDNE\n");
01879       Value = 2175418432U;
01880 
01881       // op0: cc
01882       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01883       op0 &= (1<<3) - 1;
01884       op0 <<= 11;
01885       Value |= op0;
01886       // op1: rs2
01887       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01888       op1 &= (1<<5) - 1;
01889       Value |= op1;
01890       // op2: rd
01891       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01892       op2 &= (1<<5) - 1;
01893       op2 <<= 25;
01894       Value |= op2;
01895       break;
01896     }
01897     case V9::FMOVDNEG: {
01898       DEBUG(std::cerr << "Emitting FMOVDNEG\n");
01899       Value = 2175369280U;
01900 
01901       // op0: cc
01902       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01903       op0 &= (1<<3) - 1;
01904       op0 <<= 11;
01905       Value |= op0;
01906       // op1: rs2
01907       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01908       op1 &= (1<<5) - 1;
01909       Value |= op1;
01910       // op2: rd
01911       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01912       op2 &= (1<<5) - 1;
01913       op2 <<= 25;
01914       Value |= op2;
01915       break;
01916     }
01917     case V9::FMOVDPOS: {
01918       DEBUG(std::cerr << "Emitting FMOVDPOS\n");
01919       Value = 2175500352U;
01920 
01921       // op0: cc
01922       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01923       op0 &= (1<<3) - 1;
01924       op0 <<= 11;
01925       Value |= op0;
01926       // op1: rs2
01927       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01928       op1 &= (1<<5) - 1;
01929       Value |= op1;
01930       // op2: rd
01931       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01932       op2 &= (1<<5) - 1;
01933       op2 <<= 25;
01934       Value |= op2;
01935       break;
01936     }
01937     case V9::FMOVDVC: {
01938       DEBUG(std::cerr << "Emitting FMOVDVC\n");
01939       Value = 2175516736U;
01940 
01941       // op0: cc
01942       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01943       op0 &= (1<<3) - 1;
01944       op0 <<= 11;
01945       Value |= op0;
01946       // op1: rs2
01947       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01948       op1 &= (1<<5) - 1;
01949       Value |= op1;
01950       // op2: rd
01951       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01952       op2 &= (1<<5) - 1;
01953       op2 <<= 25;
01954       Value |= op2;
01955       break;
01956     }
01957     case V9::FMOVDVS: {
01958       DEBUG(std::cerr << "Emitting FMOVDVS\n");
01959       Value = 2175385664U;
01960 
01961       // op0: cc
01962       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01963       op0 &= (1<<3) - 1;
01964       op0 <<= 11;
01965       Value |= op0;
01966       // op1: rs2
01967       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01968       op1 &= (1<<5) - 1;
01969       Value |= op1;
01970       // op2: rd
01971       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01972       op2 &= (1<<5) - 1;
01973       op2 <<= 25;
01974       Value |= op2;
01975       break;
01976     }
01977     case V9::FMOVQA: {
01978       DEBUG(std::cerr << "Emitting FMOVQA\n");
01979       Value = 2175402080U;
01980 
01981       // op0: cc
01982       int op0 = getMachineOpValue(MI, MI.getOperand(0));
01983       op0 &= (1<<3) - 1;
01984       op0 <<= 11;
01985       Value |= op0;
01986       // op1: rs2
01987       int op1 = getMachineOpValue(MI, MI.getOperand(1));
01988       op1 &= (1<<5) - 1;
01989       Value |= op1;
01990       // op2: rd
01991       int op2 = getMachineOpValue(MI, MI.getOperand(2));
01992       op2 &= (1<<5) - 1;
01993       op2 <<= 25;
01994       Value |= op2;
01995       break;
01996     }
01997     case V9::FMOVQCC: {
01998       DEBUG(std::cerr << "Emitting FMOVQCC\n");
01999       Value = 2175484000U;
02000 
02001       // op0: cc
02002       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02003       op0 &= (1<<3) - 1;
02004       op0 <<= 11;
02005       Value |= op0;
02006       // op1: rs2
02007       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02008       op1 &= (1<<5) - 1;
02009       Value |= op1;
02010       // op2: rd
02011       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02012       op2 &= (1<<5) - 1;
02013       op2 <<= 25;
02014       Value |= op2;
02015       break;
02016     }
02017     case V9::FMOVQCS: {
02018       DEBUG(std::cerr << "Emitting FMOVQCS\n");
02019       Value = 2175352928U;
02020 
02021       // op0: cc
02022       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02023       op0 &= (1<<3) - 1;
02024       op0 <<= 11;
02025       Value |= op0;
02026       // op1: rs2
02027       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02028       op1 &= (1<<5) - 1;
02029       Value |= op1;
02030       // op2: rd
02031       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02032       op2 &= (1<<5) - 1;
02033       op2 <<= 25;
02034       Value |= op2;
02035       break;
02036     }
02037     case V9::FMOVQE: {
02038       DEBUG(std::cerr << "Emitting FMOVQE\n");
02039       Value = 2175271008U;
02040 
02041       // op0: cc
02042       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02043       op0 &= (1<<3) - 1;
02044       op0 <<= 11;
02045       Value |= op0;
02046       // op1: rs2
02047       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02048       op1 &= (1<<5) - 1;
02049       Value |= op1;
02050       // op2: rd
02051       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02052       op2 &= (1<<5) - 1;
02053       op2 <<= 25;
02054       Value |= op2;
02055       break;
02056     }
02057     case V9::FMOVQFA: {
02058       DEBUG(std::cerr << "Emitting FMOVQFA\n");
02059       Value = 2175336544U;
02060 
02061       // op0: cc
02062       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02063       op0 &= (1<<3) - 1;
02064       op0 <<= 11;
02065       Value |= op0;
02066       // op1: rs2
02067       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02068       op1 &= (1<<5) - 1;
02069       Value |= op1;
02070       // op2: rd
02071       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02072       op2 &= (1<<5) - 1;
02073       op2 <<= 25;
02074       Value |= op2;
02075       break;
02076     }
02077     case V9::FMOVQFE: {
02078       DEBUG(std::cerr << "Emitting FMOVQFE\n");
02079       Value = 2175418464U;
02080 
02081       // op0: cc
02082       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02083       op0 &= (1<<3) - 1;
02084       op0 <<= 11;
02085       Value |= op0;
02086       // op1: rs2
02087       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02088       op1 &= (1<<5) - 1;
02089       Value |= op1;
02090       // op2: rd
02091       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02092       op2 &= (1<<5) - 1;
02093       op2 <<= 25;
02094       Value |= op2;
02095       break;
02096     }
02097     case V9::FMOVQFG: {
02098       DEBUG(std::cerr << "Emitting FMOVQFG\n");
02099       Value = 2175369312U;
02100 
02101       // op0: cc
02102       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02103       op0 &= (1<<3) - 1;
02104       op0 <<= 11;
02105       Value |= op0;
02106       // op1: rs2
02107       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02108       op1 &= (1<<5) - 1;
02109       Value |= op1;
02110       // op2: rd
02111       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02112       op2 &= (1<<5) - 1;
02113       op2 <<= 25;
02114       Value |= op2;
02115       break;
02116     }
02117     case V9::FMOVQFGE: {
02118       DEBUG(std::cerr << "Emitting FMOVQFGE\n");
02119       Value = 2175451232U;
02120 
02121       // op0: cc
02122       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02123       op0 &= (1<<3) - 1;
02124       op0 <<= 11;
02125       Value |= op0;
02126       // op1: rs2
02127       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02128       op1 &= (1<<5) - 1;
02129       Value |= op1;
02130       // op2: rd
02131       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02132       op2 &= (1<<5) - 1;
02133       op2 <<= 25;
02134       Value |= op2;
02135       break;
02136     }
02137     case V9::FMOVQFL: {
02138       DEBUG(std::cerr << "Emitting FMOVQFL\n");
02139       Value = 2175336544U;
02140 
02141       // op0: cc
02142       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02143       op0 &= (1<<3) - 1;
02144       op0 <<= 11;
02145       Value |= op0;
02146       // op1: rs2
02147       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02148       op1 &= (1<<5) - 1;
02149       Value |= op1;
02150       // op2: rd
02151       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02152       op2 &= (1<<5) - 1;
02153       op2 <<= 25;
02154       Value |= op2;
02155       break;
02156     }
02157     case V9::FMOVQFLE: {
02158       DEBUG(std::cerr << "Emitting FMOVQFLE\n");
02159       Value = 2175484000U;
02160 
02161       // op0: cc
02162       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02163       op0 &= (1<<3) - 1;
02164       op0 <<= 11;
02165       Value |= op0;
02166       // op1: rs2
02167       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02168       op1 &= (1<<5) - 1;
02169       Value |= op1;
02170       // op2: rd
02171       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02172       op2 &= (1<<5) - 1;
02173       op2 <<= 25;
02174       Value |= op2;
02175       break;
02176     }
02177     case V9::FMOVQFLG: {
02178       DEBUG(std::cerr << "Emitting FMOVQFLG\n");
02179       Value = 2175303776U;
02180 
02181       // op0: cc
02182       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02183       op0 &= (1<<3) - 1;
02184       op0 <<= 11;
02185       Value |= op0;
02186       // op1: rs2
02187       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02188       op1 &= (1<<5) - 1;
02189       Value |= op1;
02190       // op2: rd
02191       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02192       op2 &= (1<<5) - 1;
02193       op2 <<= 25;
02194       Value |= op2;
02195       break;
02196     }
02197     case V9::FMOVQFN: {
02198       DEBUG(std::cerr << "Emitting FMOVQFN\n");
02199       Value = 2175271008U;
02200 
02201       // op0: cc
02202       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02203       op0 &= (1<<3) - 1;
02204       op0 <<= 11;
02205       Value |= op0;
02206       // op1: rs2
02207       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02208       op1 &= (1<<5) - 1;
02209       Value |= op1;
02210       // op2: rd
02211       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02212       op2 &= (1<<5) - 1;
02213       op2 <<= 25;
02214       Value |= op2;
02215       break;
02216     }
02217     case V9::FMOVQFNE: {
02218       DEBUG(std::cerr << "Emitting FMOVQFNE\n");
02219       Value = 2175287392U;
02220 
02221       // op0: cc
02222       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02223       op0 &= (1<<3) - 1;
02224       op0 <<= 11;
02225       Value |= op0;
02226       // op1: rs2
02227       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02228       op1 &= (1<<5) - 1;
02229       Value |= op1;
02230       // op2: rd
02231       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02232       op2 &= (1<<5) - 1;
02233       op2 <<= 25;
02234       Value |= op2;
02235       break;
02236     }
02237     case V9::FMOVQFO: {
02238       DEBUG(std::cerr << "Emitting FMOVQFO\n");
02239       Value = 2175516768U;
02240 
02241       // op0: cc
02242       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02243       op0 &= (1<<3) - 1;
02244       op0 <<= 11;
02245       Value |= op0;
02246       // op1: rs2
02247       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02248       op1 &= (1<<5) - 1;
02249       Value |= op1;
02250       // op2: rd
02251       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02252       op2 &= (1<<5) - 1;
02253       op2 <<= 25;
02254       Value |= op2;
02255       break;
02256     }
02257     case V9::FMOVQFU: {
02258       DEBUG(std::cerr << "Emitting FMOVQFU\n");
02259       Value = 2175385696U;
02260 
02261       // op0: cc
02262       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02263       op0 &= (1<<3) - 1;
02264       op0 <<= 11;
02265       Value |= op0;
02266       // op1: rs2
02267       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02268       op1 &= (1<<5) - 1;
02269       Value |= op1;
02270       // op2: rd
02271       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02272       op2 &= (1<<5) - 1;
02273       op2 <<= 25;
02274       Value |= op2;
02275       break;
02276     }
02277     case V9::FMOVQFUE: {
02278       DEBUG(std::cerr << "Emitting FMOVQFUE\n");
02279       Value = 2175434848U;
02280 
02281       // op0: cc
02282       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02283       op0 &= (1<<3) - 1;
02284       op0 <<= 11;
02285       Value |= op0;
02286       // op1: rs2
02287       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02288       op1 &= (1<<5) - 1;
02289       Value |= op1;
02290       // op2: rd
02291       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02292       op2 &= (1<<5) - 1;
02293       op2 <<= 25;
02294       Value |= op2;
02295       break;
02296     }
02297     case V9::FMOVQFUG: {
02298       DEBUG(std::cerr << "Emitting FMOVQFUG\n");
02299       Value = 2175352928U;
02300 
02301       // op0: cc
02302       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02303       op0 &= (1<<3) - 1;
02304       op0 <<= 11;
02305       Value |= op0;
02306       // op1: rs2
02307       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02308       op1 &= (1<<5) - 1;
02309       Value |= op1;
02310       // op2: rd
02311       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02312       op2 &= (1<<5) - 1;
02313       op2 <<= 25;
02314       Value |= op2;
02315       break;
02316     }
02317     case V9::FMOVQFUGE: {
02318       DEBUG(std::cerr << "Emitting FMOVQFUGE\n");
02319       Value = 2175467616U;
02320 
02321       // op0: cc
02322       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02323       op0 &= (1<<3) - 1;
02324       op0 <<= 11;
02325       Value |= op0;
02326       // op1: rs2
02327       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02328       op1 &= (1<<5) - 1;
02329       Value |= op1;
02330       // op2: rd
02331       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02332       op2 &= (1<<5) - 1;
02333       op2 <<= 25;
02334       Value |= op2;
02335       break;
02336     }
02337     case V9::FMOVQFUL: {
02338       DEBUG(std::cerr << "Emitting FMOVQFUL\n");
02339       Value = 2175320160U;
02340 
02341       // op0: cc
02342       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02343       op0 &= (1<<3) - 1;
02344       op0 <<= 11;
02345       Value |= op0;
02346       // op1: rs2
02347       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02348       op1 &= (1<<5) - 1;
02349       Value |= op1;
02350       // op2: rd
02351       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02352       op2 &= (1<<5) - 1;
02353       op2 <<= 25;
02354       Value |= op2;
02355       break;
02356     }
02357     case V9::FMOVQFULE: {
02358       DEBUG(std::cerr << "Emitting FMOVQFULE\n");
02359       Value = 2175500384U;
02360 
02361       // op0: cc
02362       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02363       op0 &= (1<<3) - 1;
02364       op0 <<= 11;
02365       Value |= op0;
02366       // op1: rs2
02367       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02368       op1 &= (1<<5) - 1;
02369       Value |= op1;
02370       // op2: rd
02371       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02372       op2 &= (1<<5) - 1;
02373       op2 <<= 25;
02374       Value |= op2;
02375       break;
02376     }
02377     case V9::FMOVQG: {
02378       DEBUG(std::cerr << "Emitting FMOVQG\n");
02379       Value = 2175434848U;
02380 
02381       // op0: cc
02382       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02383       op0 &= (1<<3) - 1;
02384       op0 <<= 11;
02385       Value |= op0;
02386       // op1: rs2
02387       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02388       op1 &= (1<<5) - 1;
02389       Value |= op1;
02390       // op2: rd
02391       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02392       op2 &= (1<<5) - 1;
02393       op2 <<= 25;
02394       Value |= op2;
02395       break;
02396     }
02397     case V9::FMOVQGE: {
02398       DEBUG(std::cerr << "Emitting FMOVQGE\n");
02399       Value = 2175451232U;
02400 
02401       // op0: cc
02402       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02403       op0 &= (1<<3) - 1;
02404       op0 <<= 11;
02405       Value |= op0;
02406       // op1: rs2
02407       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02408       op1 &= (1<<5) - 1;
02409       Value |= op1;
02410       // op2: rd
02411       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02412       op2 &= (1<<5) - 1;
02413       op2 <<= 25;
02414       Value |= op2;
02415       break;
02416     }
02417     case V9::FMOVQGU: {
02418       DEBUG(std::cerr << "Emitting FMOVQGU\n");
02419       Value = 2175467616U;
02420 
02421       // op0: cc
02422       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02423       op0 &= (1<<3) - 1;
02424       op0 <<= 11;
02425       Value |= op0;
02426       // op1: rs2
02427       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02428       op1 &= (1<<5) - 1;
02429       Value |= op1;
02430       // op2: rd
02431       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02432       op2 &= (1<<5) - 1;
02433       op2 <<= 25;
02434       Value |= op2;
02435       break;
02436     }
02437     case V9::FMOVQL: {
02438       DEBUG(std::cerr << "Emitting FMOVQL\n");
02439       Value = 2175320160U;
02440 
02441       // op0: cc
02442       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02443       op0 &= (1<<3) - 1;
02444       op0 <<= 11;
02445       Value |= op0;
02446       // op1: rs2
02447       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02448       op1 &= (1<<5) - 1;
02449       Value |= op1;
02450       // op2: rd
02451       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02452       op2 &= (1<<5) - 1;
02453       op2 <<= 25;
02454       Value |= op2;
02455       break;
02456     }
02457     case V9::FMOVQLE: {
02458       DEBUG(std::cerr << "Emitting FMOVQLE\n");
02459       Value = 2175271008U;
02460 
02461       // op0: cc
02462       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02463       op0 &= (1<<3) - 1;
02464       op0 <<= 11;
02465       Value |= op0;
02466       // op1: rs2
02467       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02468       op1 &= (1<<5) - 1;
02469       Value |= op1;
02470       // op2: rd
02471       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02472       op2 &= (1<<5) - 1;
02473       op2 <<= 25;
02474       Value |= op2;
02475       break;
02476     }
02477     case V9::FMOVQLEU: {
02478       DEBUG(std::cerr << "Emitting FMOVQLEU\n");
02479       Value = 2175336544U;
02480 
02481       // op0: cc
02482       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02483       op0 &= (1<<3) - 1;
02484       op0 <<= 11;
02485       Value |= op0;
02486       // op1: rs2
02487       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02488       op1 &= (1<<5) - 1;
02489       Value |= op1;
02490       // op2: rd
02491       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02492       op2 &= (1<<5) - 1;
02493       op2 <<= 25;
02494       Value |= op2;
02495       break;
02496     }
02497     case V9::FMOVQN: {
02498       DEBUG(std::cerr << "Emitting FMOVQN\n");
02499       Value = 2175271008U;
02500 
02501       // op0: cc
02502       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02503       op0 &= (1<<3) - 1;
02504       op0 <<= 11;
02505       Value |= op0;
02506       // op1: rs2
02507       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02508       op1 &= (1<<5) - 1;
02509       Value |= op1;
02510       // op2: rd
02511       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02512       op2 &= (1<<5) - 1;
02513       op2 <<= 25;
02514       Value |= op2;
02515       break;
02516     }
02517     case V9::FMOVQNE: {
02518       DEBUG(std::cerr << "Emitting FMOVQNE\n");
02519       Value = 2175418464U;
02520 
02521       // op0: cc
02522       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02523       op0 &= (1<<3) - 1;
02524       op0 <<= 11;
02525       Value |= op0;
02526       // op1: rs2
02527       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02528       op1 &= (1<<5) - 1;
02529       Value |= op1;
02530       // op2: rd
02531       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02532       op2 &= (1<<5) - 1;
02533       op2 <<= 25;
02534       Value |= op2;
02535       break;
02536     }
02537     case V9::FMOVQNEG: {
02538       DEBUG(std::cerr << "Emitting FMOVQNEG\n");
02539       Value = 2175369312U;
02540 
02541       // op0: cc
02542       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02543       op0 &= (1<<3) - 1;
02544       op0 <<= 11;
02545       Value |= op0;
02546       // op1: rs2
02547       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02548       op1 &= (1<<5) - 1;
02549       Value |= op1;
02550       // op2: rd
02551       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02552       op2 &= (1<<5) - 1;
02553       op2 <<= 25;
02554       Value |= op2;
02555       break;
02556     }
02557     case V9::FMOVQPOS: {
02558       DEBUG(std::cerr << "Emitting FMOVQPOS\n");
02559       Value = 2175500384U;
02560 
02561       // op0: cc
02562       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02563       op0 &= (1<<3) - 1;
02564       op0 <<= 11;
02565       Value |= op0;
02566       // op1: rs2
02567       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02568       op1 &= (1<<5) - 1;
02569       Value |= op1;
02570       // op2: rd
02571       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02572       op2 &= (1<<5) - 1;
02573       op2 <<= 25;
02574       Value |= op2;
02575       break;
02576     }
02577     case V9::FMOVQVC: {
02578       DEBUG(std::cerr << "Emitting FMOVQVC\n");
02579       Value = 2175516768U;
02580 
02581       // op0: cc
02582       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02583       op0 &= (1<<3) - 1;
02584       op0 <<= 11;
02585       Value |= op0;
02586       // op1: rs2
02587       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02588       op1 &= (1<<5) - 1;
02589       Value |= op1;
02590       // op2: rd
02591       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02592       op2 &= (1<<5) - 1;
02593       op2 <<= 25;
02594       Value |= op2;
02595       break;
02596     }
02597     case V9::FMOVQVS: {
02598       DEBUG(std::cerr << "Emitting FMOVQVS\n");
02599       Value = 2175385696U;
02600 
02601       // op0: cc
02602       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02603       op0 &= (1<<3) - 1;
02604       op0 <<= 11;
02605       Value |= op0;
02606       // op1: rs2
02607       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02608       op1 &= (1<<5) - 1;
02609       Value |= op1;
02610       // op2: rd
02611       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02612       op2 &= (1<<5) - 1;
02613       op2 <<= 25;
02614       Value |= op2;
02615       break;
02616     }
02617     case V9::FMOVRDGEZ: {
02618       DEBUG(std::cerr << "Emitting FMOVRDGEZ\n");
02619       Value = 2175278272U;
02620 
02621       // op0: rs1
02622       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02623       op0 &= (1<<5) - 1;
02624       op0 <<= 14;
02625       Value |= op0;
02626       // op1: rs2
02627       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02628       op1 &= (1<<5) - 1;
02629       Value |= op1;
02630       // op2: rd
02631       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02632       op2 &= (1<<5) - 1;
02633       op2 <<= 25;
02634       Value |= op2;
02635       break;
02636     }
02637     case V9::FMOVRDGZ: {
02638       DEBUG(std::cerr << "Emitting FMOVRDGZ\n");
02639       Value = 2175277248U;
02640 
02641       // op0: rs1
02642       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02643       op0 &= (1<<5) - 1;
02644       op0 <<= 14;
02645       Value |= op0;
02646       // op1: rs2
02647       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02648       op1 &= (1<<5) - 1;
02649       Value |= op1;
02650       // op2: rd
02651       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02652       op2 &= (1<<5) - 1;
02653       op2 <<= 25;
02654       Value |= op2;
02655       break;
02656     }
02657     case V9::FMOVRDLEZ: {
02658       DEBUG(std::cerr << "Emitting FMOVRDLEZ\n");
02659       Value = 2175273152U;
02660 
02661       // op0: rs1
02662       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02663       op0 &= (1<<5) - 1;
02664       op0 <<= 14;
02665       Value |= op0;
02666       // op1: rs2
02667       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02668       op1 &= (1<<5) - 1;
02669       Value |= op1;
02670       // op2: rd
02671       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02672       op2 &= (1<<5) - 1;
02673       op2 <<= 25;
02674       Value |= op2;
02675       break;
02676     }
02677     case V9::FMOVRDLZ: {
02678       DEBUG(std::cerr << "Emitting FMOVRDLZ\n");
02679       Value = 2175274176U;
02680 
02681       // op0: rs1
02682       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02683       op0 &= (1<<5) - 1;
02684       op0 <<= 14;
02685       Value |= op0;
02686       // op1: rs2
02687       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02688       op1 &= (1<<5) - 1;
02689       Value |= op1;
02690       // op2: rd
02691       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02692       op2 &= (1<<5) - 1;
02693       op2 <<= 25;
02694       Value |= op2;
02695       break;
02696     }
02697     case V9::FMOVRDNZ: {
02698       DEBUG(std::cerr << "Emitting FMOVRDNZ\n");
02699       Value = 2175276224U;
02700 
02701       // op0: rs1
02702       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02703       op0 &= (1<<5) - 1;
02704       op0 <<= 14;
02705       Value |= op0;
02706       // op1: rs2
02707       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02708       op1 &= (1<<5) - 1;
02709       Value |= op1;
02710       // op2: rd
02711       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02712       op2 &= (1<<5) - 1;
02713       op2 <<= 25;
02714       Value |= op2;
02715       break;
02716     }
02717     case V9::FMOVRDZ: {
02718       DEBUG(std::cerr << "Emitting FMOVRDZ\n");
02719       Value = 2175272128U;
02720 
02721       // op0: rs1
02722       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02723       op0 &= (1<<5) - 1;
02724       op0 <<= 14;
02725       Value |= op0;
02726       // op1: rs2
02727       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02728       op1 &= (1<<5) - 1;
02729       Value |= op1;
02730       // op2: rd
02731       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02732       op2 &= (1<<5) - 1;
02733       op2 <<= 25;
02734       Value |= op2;
02735       break;
02736     }
02737     case V9::FMOVRQGEZ: {
02738       DEBUG(std::cerr << "Emitting FMOVRQGEZ\n");
02739       Value = 2175278304U;
02740 
02741       // op0: rs1
02742       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02743       op0 &= (1<<5) - 1;
02744       op0 <<= 14;
02745       Value |= op0;
02746       // op1: rs2
02747       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02748       op1 &= (1<<5) - 1;
02749       Value |= op1;
02750       // op2: rd
02751       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02752       op2 &= (1<<5) - 1;
02753       op2 <<= 25;
02754       Value |= op2;
02755       break;
02756     }
02757     case V9::FMOVRQGZ: {
02758       DEBUG(std::cerr << "Emitting FMOVRQGZ\n");
02759       Value = 2175277280U;
02760 
02761       // op0: rs1
02762       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02763       op0 &= (1<<5) - 1;
02764       op0 <<= 14;
02765       Value |= op0;
02766       // op1: rs2
02767       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02768       op1 &= (1<<5) - 1;
02769       Value |= op1;
02770       // op2: rd
02771       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02772       op2 &= (1<<5) - 1;
02773       op2 <<= 25;
02774       Value |= op2;
02775       break;
02776     }
02777     case V9::FMOVRQLEZ: {
02778       DEBUG(std::cerr << "Emitting FMOVRQLEZ\n");
02779       Value = 2175273184U;
02780 
02781       // op0: rs1
02782       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02783       op0 &= (1<<5) - 1;
02784       op0 <<= 14;
02785       Value |= op0;
02786       // op1: rs2
02787       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02788       op1 &= (1<<5) - 1;
02789       Value |= op1;
02790       // op2: rd
02791       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02792       op2 &= (1<<5) - 1;
02793       op2 <<= 25;
02794       Value |= op2;
02795       break;
02796     }
02797     case V9::FMOVRQLZ: {
02798       DEBUG(std::cerr << "Emitting FMOVRQLZ\n");
02799       Value = 2175274208U;
02800 
02801       // op0: rs1
02802       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02803       op0 &= (1<<5) - 1;
02804       op0 <<= 14;
02805       Value |= op0;
02806       // op1: rs2
02807       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02808       op1 &= (1<<5) - 1;
02809       Value |= op1;
02810       // op2: rd
02811       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02812       op2 &= (1<<5) - 1;
02813       op2 <<= 25;
02814       Value |= op2;
02815       break;
02816     }
02817     case V9::FMOVRQNZ: {
02818       DEBUG(std::cerr << "Emitting FMOVRQNZ\n");
02819       Value = 2175276256U;
02820 
02821       // op0: rs1
02822       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02823       op0 &= (1<<5) - 1;
02824       op0 <<= 14;
02825       Value |= op0;
02826       // op1: rs2
02827       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02828       op1 &= (1<<5) - 1;
02829       Value |= op1;
02830       // op2: rd
02831       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02832       op2 &= (1<<5) - 1;
02833       op2 <<= 25;
02834       Value |= op2;
02835       break;
02836     }
02837     case V9::FMOVRQZ: {
02838       DEBUG(std::cerr << "Emitting FMOVRQZ\n");
02839       Value = 2175272160U;
02840 
02841       // op0: rs1
02842       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02843       op0 &= (1<<5) - 1;
02844       op0 <<= 14;
02845       Value |= op0;
02846       // op1: rs2
02847       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02848       op1 &= (1<<5) - 1;
02849       Value |= op1;
02850       // op2: rd
02851       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02852       op2 &= (1<<5) - 1;
02853       op2 <<= 25;
02854       Value |= op2;
02855       break;
02856     }
02857     case V9::FMOVRSGEZ: {
02858       DEBUG(std::cerr << "Emitting FMOVRSGEZ\n");
02859       Value = 2175278240U;
02860 
02861       // op0: rs1
02862       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02863       op0 &= (1<<5) - 1;
02864       op0 <<= 14;
02865       Value |= op0;
02866       // op1: rs2
02867       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02868       op1 &= (1<<5) - 1;
02869       Value |= op1;
02870       // op2: rd
02871       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02872       op2 &= (1<<5) - 1;
02873       op2 <<= 25;
02874       Value |= op2;
02875       break;
02876     }
02877     case V9::FMOVRSGZ: {
02878       DEBUG(std::cerr << "Emitting FMOVRSGZ\n");
02879       Value = 2175277216U;
02880 
02881       // op0: rs1
02882       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02883       op0 &= (1<<5) - 1;
02884       op0 <<= 14;
02885       Value |= op0;
02886       // op1: rs2
02887       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02888       op1 &= (1<<5) - 1;
02889       Value |= op1;
02890       // op2: rd
02891       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02892       op2 &= (1<<5) - 1;
02893       op2 <<= 25;
02894       Value |= op2;
02895       break;
02896     }
02897     case V9::FMOVRSLEZ: {
02898       DEBUG(std::cerr << "Emitting FMOVRSLEZ\n");
02899       Value = 2175273120U;
02900 
02901       // op0: rs1
02902       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02903       op0 &= (1<<5) - 1;
02904       op0 <<= 14;
02905       Value |= op0;
02906       // op1: rs2
02907       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02908       op1 &= (1<<5) - 1;
02909       Value |= op1;
02910       // op2: rd
02911       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02912       op2 &= (1<<5) - 1;
02913       op2 <<= 25;
02914       Value |= op2;
02915       break;
02916     }
02917     case V9::FMOVRSLZ: {
02918       DEBUG(std::cerr << "Emitting FMOVRSLZ\n");
02919       Value = 2175274144U;
02920 
02921       // op0: rs1
02922       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02923       op0 &= (1<<5) - 1;
02924       op0 <<= 14;
02925       Value |= op0;
02926       // op1: rs2
02927       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02928       op1 &= (1<<5) - 1;
02929       Value |= op1;
02930       // op2: rd
02931       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02932       op2 &= (1<<5) - 1;
02933       op2 <<= 25;
02934       Value |= op2;
02935       break;
02936     }
02937     case V9::FMOVRSNZ: {
02938       DEBUG(std::cerr << "Emitting FMOVRSNZ\n");
02939       Value = 2175276192U;
02940 
02941       // op0: rs1
02942       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02943       op0 &= (1<<5) - 1;
02944       op0 <<= 14;
02945       Value |= op0;
02946       // op1: rs2
02947       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02948       op1 &= (1<<5) - 1;
02949       Value |= op1;
02950       // op2: rd
02951       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02952       op2 &= (1<<5) - 1;
02953       op2 <<= 25;
02954       Value |= op2;
02955       break;
02956     }
02957     case V9::FMOVRSZ: {
02958       DEBUG(std::cerr << "Emitting FMOVRSZ\n");
02959       Value = 2175272096U;
02960 
02961       // op0: rs1
02962       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02963       op0 &= (1<<5) - 1;
02964       op0 <<= 14;
02965       Value |= op0;
02966       // op1: rs2
02967       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02968       op1 &= (1<<5) - 1;
02969       Value |= op1;
02970       // op2: rd
02971       int op2 = getMachineOpValue(MI, MI.getOperand(2));
02972       op2 &= (1<<5) - 1;
02973       op2 <<= 25;
02974       Value |= op2;
02975       break;
02976     }
02977     case V9::FMOVS: {
02978       DEBUG(std::cerr << "Emitting FMOVS\n");
02979       Value = 2174746656U;
02980 
02981       // op0: rs2
02982       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02983       op0 &= (1<<5) - 1;
02984       Value |= op0;
02985       // op1: rd
02986       int op1 = getMachineOpValue(MI, MI.getOperand(1));
02987       op1 &= (1<<5) - 1;
02988       op1 <<= 25;
02989       Value |= op1;
02990       break;
02991     }
02992     case V9::FMOVSA: {
02993       DEBUG(std::cerr << "Emitting FMOVSA\n");
02994       Value = 2175402016U;
02995 
02996       // op0: cc
02997       int op0 = getMachineOpValue(MI, MI.getOperand(0));
02998       op0 &= (1<<3) - 1;
02999       op0 <<= 11;
03000       Value |= op0;
03001       // op1: rs2
03002       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03003       op1 &= (1<<5) - 1;
03004       Value |= op1;
03005       // op2: rd
03006       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03007       op2 &= (1<<5) - 1;
03008       op2 <<= 25;
03009       Value |= op2;
03010       break;
03011     }
03012     case V9::FMOVSCC: {
03013       DEBUG(std::cerr << "Emitting FMOVSCC\n");
03014       Value = 2175483936U;
03015 
03016       // op0: cc
03017       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03018       op0 &= (1<<3) - 1;
03019       op0 <<= 11;
03020       Value |= op0;
03021       // op1: rs2
03022       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03023       op1 &= (1<<5) - 1;
03024       Value |= op1;
03025       // op2: rd
03026       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03027       op2 &= (1<<5) - 1;
03028       op2 <<= 25;
03029       Value |= op2;
03030       break;
03031     }
03032     case V9::FMOVSCS: {
03033       DEBUG(std::cerr << "Emitting FMOVSCS\n");
03034       Value = 2175352864U;
03035 
03036       // op0: cc
03037       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03038       op0 &= (1<<3) - 1;
03039       op0 <<= 11;
03040       Value |= op0;
03041       // op1: rs2
03042       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03043       op1 &= (1<<5) - 1;
03044       Value |= op1;
03045       // op2: rd
03046       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03047       op2 &= (1<<5) - 1;
03048       op2 <<= 25;
03049       Value |= op2;
03050       break;
03051     }
03052     case V9::FMOVSE: {
03053       DEBUG(std::cerr << "Emitting FMOVSE\n");
03054       Value = 2175270944U;
03055 
03056       // op0: cc
03057       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03058       op0 &= (1<<3) - 1;
03059       op0 <<= 11;
03060       Value |= op0;
03061       // op1: rs2
03062       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03063       op1 &= (1<<5) - 1;
03064       Value |= op1;
03065       // op2: rd
03066       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03067       op2 &= (1<<5) - 1;
03068       op2 <<= 25;
03069       Value |= op2;
03070       break;
03071     }
03072     case V9::FMOVSFA: {
03073       DEBUG(std::cerr << "Emitting FMOVSFA\n");
03074       Value = 2175336480U;
03075 
03076       // op0: cc
03077       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03078       op0 &= (1<<3) - 1;
03079       op0 <<= 11;
03080       Value |= op0;
03081       // op1: rs2
03082       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03083       op1 &= (1<<5) - 1;
03084       Value |= op1;
03085       // op2: rd
03086       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03087       op2 &= (1<<5) - 1;
03088       op2 <<= 25;
03089       Value |= op2;
03090       break;
03091     }
03092     case V9::FMOVSFE: {
03093       DEBUG(std::cerr << "Emitting FMOVSFE\n");
03094       Value = 2175418400U;
03095 
03096       // op0: cc
03097       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03098       op0 &= (1<<3) - 1;
03099       op0 <<= 11;
03100       Value |= op0;
03101       // op1: rs2
03102       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03103       op1 &= (1<<5) - 1;
03104       Value |= op1;
03105       // op2: rd
03106       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03107       op2 &= (1<<5) - 1;
03108       op2 <<= 25;
03109       Value |= op2;
03110       break;
03111     }
03112     case V9::FMOVSFG: {
03113       DEBUG(std::cerr << "Emitting FMOVSFG\n");
03114       Value = 2175369248U;
03115 
03116       // op0: cc
03117       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03118       op0 &= (1<<3) - 1;
03119       op0 <<= 11;
03120       Value |= op0;
03121       // op1: rs2
03122       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03123       op1 &= (1<<5) - 1;
03124       Value |= op1;
03125       // op2: rd
03126       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03127       op2 &= (1<<5) - 1;
03128       op2 <<= 25;
03129       Value |= op2;
03130       break;
03131     }
03132     case V9::FMOVSFGE: {
03133       DEBUG(std::cerr << "Emitting FMOVSFGE\n");
03134       Value = 2175451168U;
03135 
03136       // op0: cc
03137       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03138       op0 &= (1<<3) - 1;
03139       op0 <<= 11;
03140       Value |= op0;
03141       // op1: rs2
03142       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03143       op1 &= (1<<5) - 1;
03144       Value |= op1;
03145       // op2: rd
03146       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03147       op2 &= (1<<5) - 1;
03148       op2 <<= 25;
03149       Value |= op2;
03150       break;
03151     }
03152     case V9::FMOVSFL: {
03153       DEBUG(std::cerr << "Emitting FMOVSFL\n");
03154       Value = 2175336480U;
03155 
03156       // op0: cc
03157       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03158       op0 &= (1<<3) - 1;
03159       op0 <<= 11;
03160       Value |= op0;
03161       // op1: rs2
03162       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03163       op1 &= (1<<5) - 1;
03164       Value |= op1;
03165       // op2: rd
03166       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03167       op2 &= (1<<5) - 1;
03168       op2 <<= 25;
03169       Value |= op2;
03170       break;
03171     }
03172     case V9::FMOVSFLE: {
03173       DEBUG(std::cerr << "Emitting FMOVSFLE\n");
03174       Value = 2175483936U;
03175 
03176       // op0: cc
03177       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03178       op0 &= (1<<3) - 1;
03179       op0 <<= 11;
03180       Value |= op0;
03181       // op1: rs2
03182       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03183       op1 &= (1<<5) - 1;
03184       Value |= op1;
03185       // op2: rd
03186       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03187       op2 &= (1<<5) - 1;
03188       op2 <<= 25;
03189       Value |= op2;
03190       break;
03191     }
03192     case V9::FMOVSFLG: {
03193       DEBUG(std::cerr << "Emitting FMOVSFLG\n");
03194       Value = 2175303712U;
03195 
03196       // op0: cc
03197       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03198       op0 &= (1<<3) - 1;
03199       op0 <<= 11;
03200       Value |= op0;
03201       // op1: rs2
03202       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03203       op1 &= (1<<5) - 1;
03204       Value |= op1;
03205       // op2: rd
03206       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03207       op2 &= (1<<5) - 1;
03208       op2 <<= 25;
03209       Value |= op2;
03210       break;
03211     }
03212     case V9::FMOVSFN: {
03213       DEBUG(std::cerr << "Emitting FMOVSFN\n");
03214       Value = 2175270944U;
03215 
03216       // op0: cc
03217       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03218       op0 &= (1<<3) - 1;
03219       op0 <<= 11;
03220       Value |= op0;
03221       // op1: rs2
03222       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03223       op1 &= (1<<5) - 1;
03224       Value |= op1;
03225       // op2: rd
03226       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03227       op2 &= (1<<5) - 1;
03228       op2 <<= 25;
03229       Value |= op2;
03230       break;
03231     }
03232     case V9::FMOVSFNE: {
03233       DEBUG(std::cerr << "Emitting FMOVSFNE\n");
03234       Value = 2175287328U;
03235 
03236       // op0: cc
03237       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03238       op0 &= (1<<3) - 1;
03239       op0 <<= 11;
03240       Value |= op0;
03241       // op1: rs2
03242       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03243       op1 &= (1<<5) - 1;
03244       Value |= op1;
03245       // op2: rd
03246       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03247       op2 &= (1<<5) - 1;
03248       op2 <<= 25;
03249       Value |= op2;
03250       break;
03251     }
03252     case V9::FMOVSFO: {
03253       DEBUG(std::cerr << "Emitting FMOVSFO\n");
03254       Value = 2175516704U;
03255 
03256       // op0: cc
03257       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03258       op0 &= (1<<3) - 1;
03259       op0 <<= 11;
03260       Value |= op0;
03261       // op1: rs2
03262       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03263       op1 &= (1<<5) - 1;
03264       Value |= op1;
03265       // op2: rd
03266       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03267       op2 &= (1<<5) - 1;
03268       op2 <<= 25;
03269       Value |= op2;
03270       break;
03271     }
03272     case V9::FMOVSFU: {
03273       DEBUG(std::cerr << "Emitting FMOVSFU\n");
03274       Value = 2175385632U;
03275 
03276       // op0: cc
03277       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03278       op0 &= (1<<3) - 1;
03279       op0 <<= 11;
03280       Value |= op0;
03281       // op1: rs2
03282       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03283       op1 &= (1<<5) - 1;
03284       Value |= op1;
03285       // op2: rd
03286       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03287       op2 &= (1<<5) - 1;
03288       op2 <<= 25;
03289       Value |= op2;
03290       break;
03291     }
03292     case V9::FMOVSFUE: {
03293       DEBUG(std::cerr << "Emitting FMOVSFUE\n");
03294       Value = 2175434784U;
03295 
03296       // op0: cc
03297       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03298       op0 &= (1<<3) - 1;
03299       op0 <<= 11;
03300       Value |= op0;
03301       // op1: rs2
03302       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03303       op1 &= (1<<5) - 1;
03304       Value |= op1;
03305       // op2: rd
03306       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03307       op2 &= (1<<5) - 1;
03308       op2 <<= 25;
03309       Value |= op2;
03310       break;
03311     }
03312     case V9::FMOVSFUG: {
03313       DEBUG(std::cerr << "Emitting FMOVSFUG\n");
03314       Value = 2175352864U;
03315 
03316       // op0: cc
03317       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03318       op0 &= (1<<3) - 1;
03319       op0 <<= 11;
03320       Value |= op0;
03321       // op1: rs2
03322       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03323       op1 &= (1<<5) - 1;
03324       Value |= op1;
03325       // op2: rd
03326       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03327       op2 &= (1<<5) - 1;
03328       op2 <<= 25;
03329       Value |= op2;
03330       break;
03331     }
03332     case V9::FMOVSFUGE: {
03333       DEBUG(std::cerr << "Emitting FMOVSFUGE\n");
03334       Value = 2175467552U;
03335 
03336       // op0: cc
03337       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03338       op0 &= (1<<3) - 1;
03339       op0 <<= 11;
03340       Value |= op0;
03341       // op1: rs2
03342       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03343       op1 &= (1<<5) - 1;
03344       Value |= op1;
03345       // op2: rd
03346       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03347       op2 &= (1<<5) - 1;
03348       op2 <<= 25;
03349       Value |= op2;
03350       break;
03351     }
03352     case V9::FMOVSFUL: {
03353       DEBUG(std::cerr << "Emitting FMOVSFUL\n");
03354       Value = 2175320096U;
03355 
03356       // op0: cc
03357       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03358       op0 &= (1<<3) - 1;
03359       op0 <<= 11;
03360       Value |= op0;
03361       // op1: rs2
03362       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03363       op1 &= (1<<5) - 1;
03364       Value |= op1;
03365       // op2: rd
03366       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03367       op2 &= (1<<5) - 1;
03368       op2 <<= 25;
03369       Value |= op2;
03370       break;
03371     }
03372     case V9::FMOVSFULE: {
03373       DEBUG(std::cerr << "Emitting FMOVSFULE\n");
03374       Value = 2175500320U;
03375 
03376       // op0: cc
03377       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03378       op0 &= (1<<3) - 1;
03379       op0 <<= 11;
03380       Value |= op0;
03381       // op1: rs2
03382       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03383       op1 &= (1<<5) - 1;
03384       Value |= op1;
03385       // op2: rd
03386       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03387       op2 &= (1<<5) - 1;
03388       op2 <<= 25;
03389       Value |= op2;
03390       break;
03391     }
03392     case V9::FMOVSG: {
03393       DEBUG(std::cerr << "Emitting FMOVSG\n");
03394       Value = 2175434784U;
03395 
03396       // op0: cc
03397       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03398       op0 &= (1<<3) - 1;
03399       op0 <<= 11;
03400       Value |= op0;
03401       // op1: rs2
03402       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03403       op1 &= (1<<5) - 1;
03404       Value |= op1;
03405       // op2: rd
03406       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03407       op2 &= (1<<5) - 1;
03408       op2 <<= 25;
03409       Value |= op2;
03410       break;
03411     }
03412     case V9::FMOVSGE: {
03413       DEBUG(std::cerr << "Emitting FMOVSGE\n");
03414       Value = 2175451168U;
03415 
03416       // op0: cc
03417       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03418       op0 &= (1<<3) - 1;
03419       op0 <<= 11;
03420       Value |= op0;
03421       // op1: rs2
03422       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03423       op1 &= (1<<5) - 1;
03424       Value |= op1;
03425       // op2: rd
03426       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03427       op2 &= (1<<5) - 1;
03428       op2 <<= 25;
03429       Value |= op2;
03430       break;
03431     }
03432     case V9::FMOVSGU: {
03433       DEBUG(std::cerr << "Emitting FMOVSGU\n");
03434       Value = 2175467552U;
03435 
03436       // op0: cc
03437       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03438       op0 &= (1<<3) - 1;
03439       op0 <<= 11;
03440       Value |= op0;
03441       // op1: rs2
03442       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03443       op1 &= (1<<5) - 1;
03444       Value |= op1;
03445       // op2: rd
03446       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03447       op2 &= (1<<5) - 1;
03448       op2 <<= 25;
03449       Value |= op2;
03450       break;
03451     }
03452     case V9::FMOVSL: {
03453       DEBUG(std::cerr << "Emitting FMOVSL\n");
03454       Value = 2175320096U;
03455 
03456       // op0: cc
03457       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03458       op0 &= (1<<3) - 1;
03459       op0 <<= 11;
03460       Value |= op0;
03461       // op1: rs2
03462       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03463       op1 &= (1<<5) - 1;
03464       Value |= op1;
03465       // op2: rd
03466       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03467       op2 &= (1<<5) - 1;
03468       op2 <<= 25;
03469       Value |= op2;
03470       break;
03471     }
03472     case V9::FMOVSLE: {
03473       DEBUG(std::cerr << "Emitting FMOVSLE\n");
03474       Value = 2175270944U;
03475 
03476       // op0: cc
03477       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03478       op0 &= (1<<3) - 1;
03479       op0 <<= 11;
03480       Value |= op0;
03481       // op1: rs2
03482       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03483       op1 &= (1<<5) - 1;
03484       Value |= op1;
03485       // op2: rd
03486       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03487       op2 &= (1<<5) - 1;
03488       op2 <<= 25;
03489       Value |= op2;
03490       break;
03491     }
03492     case V9::FMOVSLEU: {
03493       DEBUG(std::cerr << "Emitting FMOVSLEU\n");
03494       Value = 2175336480U;
03495 
03496       // op0: cc
03497       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03498       op0 &= (1<<3) - 1;
03499       op0 <<= 11;
03500       Value |= op0;
03501       // op1: rs2
03502       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03503       op1 &= (1<<5) - 1;
03504       Value |= op1;
03505       // op2: rd
03506       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03507       op2 &= (1<<5) - 1;
03508       op2 <<= 25;
03509       Value |= op2;
03510       break;
03511     }
03512     case V9::FMOVSN: {
03513       DEBUG(std::cerr << "Emitting FMOVSN\n");
03514       Value = 2175270944U;
03515 
03516       // op0: cc
03517       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03518       op0 &= (1<<3) - 1;
03519       op0 <<= 11;
03520       Value |= op0;
03521       // op1: rs2
03522       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03523       op1 &= (1<<5) - 1;
03524       Value |= op1;
03525       // op2: rd
03526       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03527       op2 &= (1<<5) - 1;
03528       op2 <<= 25;
03529       Value |= op2;
03530       break;
03531     }
03532     case V9::FMOVSNE: {
03533       DEBUG(std::cerr << "Emitting FMOVSNE\n");
03534       Value = 2175418400U;
03535 
03536       // op0: cc
03537       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03538       op0 &= (1<<3) - 1;
03539       op0 <<= 11;
03540       Value |= op0;
03541       // op1: rs2
03542       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03543       op1 &= (1<<5) - 1;
03544       Value |= op1;
03545       // op2: rd
03546       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03547       op2 &= (1<<5) - 1;
03548       op2 <<= 25;
03549       Value |= op2;
03550       break;
03551     }
03552     case V9::FMOVSNEG: {
03553       DEBUG(std::cerr << "Emitting FMOVSNEG\n");
03554       Value = 2175369248U;
03555 
03556       // op0: cc
03557       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03558       op0 &= (1<<3) - 1;
03559       op0 <<= 11;
03560       Value |= op0;
03561       // op1: rs2
03562       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03563       op1 &= (1<<5) - 1;
03564       Value |= op1;
03565       // op2: rd
03566       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03567       op2 &= (1<<5) - 1;
03568       op2 <<= 25;
03569       Value |= op2;
03570       break;
03571     }
03572     case V9::FMOVSPOS: {
03573       DEBUG(std::cerr << "Emitting FMOVSPOS\n");
03574       Value = 2175500320U;
03575 
03576       // op0: cc
03577       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03578       op0 &= (1<<3) - 1;
03579       op0 <<= 11;
03580       Value |= op0;
03581       // op1: rs2
03582       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03583       op1 &= (1<<5) - 1;
03584       Value |= op1;
03585       // op2: rd
03586       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03587       op2 &= (1<<5) - 1;
03588       op2 <<= 25;
03589       Value |= op2;
03590       break;
03591     }
03592     case V9::FMOVSVC: {
03593       DEBUG(std::cerr << "Emitting FMOVSVC\n");
03594       Value = 2175516704U;
03595 
03596       // op0: cc
03597       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03598       op0 &= (1<<3) - 1;
03599       op0 <<= 11;
03600       Value |= op0;
03601       // op1: rs2
03602       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03603       op1 &= (1<<5) - 1;
03604       Value |= op1;
03605       // op2: rd
03606       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03607       op2 &= (1<<5) - 1;
03608       op2 <<= 25;
03609       Value |= op2;
03610       break;
03611     }
03612     case V9::FMOVSVS: {
03613       DEBUG(std::cerr << "Emitting FMOVSVS\n");
03614       Value = 2175385632U;
03615 
03616       // op0: cc
03617       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03618       op0 &= (1<<3) - 1;
03619       op0 <<= 11;
03620       Value |= op0;
03621       // op1: rs2
03622       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03623       op1 &= (1<<5) - 1;
03624       Value |= op1;
03625       // op2: rd
03626       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03627       op2 &= (1<<5) - 1;
03628       op2 <<= 25;
03629       Value |= op2;
03630       break;
03631     }
03632     case V9::FMULD: {
03633       DEBUG(std::cerr << "Emitting FMULD\n");
03634       Value = 2174748992U;
03635 
03636       // op0: rs1
03637       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03638       op0 &= (1<<5) - 1;
03639       op0 <<= 14;
03640       Value |= op0;
03641       // op1: rs2
03642       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03643       op1 &= (1<<5) - 1;
03644       Value |= op1;
03645       // op2: rd
03646       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03647       op2 &= (1<<5) - 1;
03648       op2 <<= 25;
03649       Value |= op2;
03650       break;
03651     }
03652     case V9::FMULQ: {
03653       DEBUG(std::cerr << "Emitting FMULQ\n");
03654       Value = 2174749024U;
03655 
03656       // op0: rs1
03657       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03658       op0 &= (1<<5) - 1;
03659       op0 <<= 14;
03660       Value |= op0;
03661       // op1: rs2
03662       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03663       op1 &= (1<<5) - 1;
03664       Value |= op1;
03665       // op2: rd
03666       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03667       op2 &= (1<<5) - 1;
03668       op2 <<= 25;
03669       Value |= op2;
03670       break;
03671     }
03672     case V9::FMULS: {
03673       DEBUG(std::cerr << "Emitting FMULS\n");
03674       Value = 2174748960U;
03675 
03676       // op0: rs1
03677       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03678       op0 &= (1<<5) - 1;
03679       op0 <<= 14;
03680       Value |= op0;
03681       // op1: rs2
03682       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03683       op1 &= (1<<5) - 1;
03684       Value |= op1;
03685       // op2: rd
03686       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03687       op2 &= (1<<5) - 1;
03688       op2 <<= 25;
03689       Value |= op2;
03690       break;
03691     }
03692     case V9::FNEGD: {
03693       DEBUG(std::cerr << "Emitting FNEGD\n");
03694       Value = 2174746816U;
03695 
03696       // op0: rs2
03697       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03698       op0 &= (1<<5) - 1;
03699       Value |= op0;
03700       // op1: rd
03701       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03702       op1 &= (1<<5) - 1;
03703       op1 <<= 25;
03704       Value |= op1;
03705       break;
03706     }
03707     case V9::FNEGS: {
03708       DEBUG(std::cerr << "Emitting FNEGS\n");
03709       Value = 2174746784U;
03710 
03711       // op0: rs2
03712       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03713       op0 &= (1<<5) - 1;
03714       Value |= op0;
03715       // op1: rd
03716       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03717       op1 &= (1<<5) - 1;
03718       op1 <<= 25;
03719       Value |= op1;
03720       break;
03721     }
03722     case V9::FQTOD: {
03723       DEBUG(std::cerr << "Emitting FQTOD\n");
03724       Value = 2174753120U;
03725 
03726       // op0: rs2
03727       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03728       op0 &= (1<<5) - 1;
03729       Value |= op0;
03730       // op1: rd
03731       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03732       op1 &= (1<<5) - 1;
03733       op1 <<= 25;
03734       Value |= op1;
03735       break;
03736     }
03737     case V9::FQTOI: {
03738       DEBUG(std::cerr << "Emitting FQTOI\n");
03739       Value = 2174753376U;
03740 
03741       // op0: rs2
03742       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03743       op0 &= (1<<5) - 1;
03744       Value |= op0;
03745       // op1: rd
03746       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03747       op1 &= (1<<5) - 1;
03748       op1 <<= 25;
03749       Value |= op1;
03750       break;
03751     }
03752     case V9::FQTOS: {
03753       DEBUG(std::cerr << "Emitting FQTOS\n");
03754       Value = 2174752992U;
03755 
03756       // op0: rs2
03757       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03758       op0 &= (1<<5) - 1;
03759       Value |= op0;
03760       // op1: rd
03761       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03762       op1 &= (1<<5) - 1;
03763       op1 <<= 25;
03764       Value |= op1;
03765       break;
03766     }
03767     case V9::FQTOX: {
03768       DEBUG(std::cerr << "Emitting FQTOX\n");
03769       Value = 2174750816U;
03770 
03771       // op0: rs2
03772       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03773       op0 &= (1<<5) - 1;
03774       Value |= op0;
03775       // op1: rd
03776       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03777       op1 &= (1<<5) - 1;
03778       op1 <<= 25;
03779       Value |= op1;
03780       break;
03781     }
03782     case V9::FSMULD: {
03783       DEBUG(std::cerr << "Emitting FSMULD\n");
03784       Value = 2174749984U;
03785 
03786       // op0: rs1
03787       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03788       op0 &= (1<<5) - 1;
03789       op0 <<= 14;
03790       Value |= op0;
03791       // op1: rs2
03792       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03793       op1 &= (1<<5) - 1;
03794       Value |= op1;
03795       // op2: rd
03796       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03797       op2 &= (1<<5) - 1;
03798       op2 <<= 25;
03799       Value |= op2;
03800       break;
03801     }
03802     case V9::FSQRTD: {
03803       DEBUG(std::cerr << "Emitting FSQRTD\n");
03804       Value = 2174747968U;
03805 
03806       // op0: rs2
03807       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03808       op0 &= (1<<5) - 1;
03809       Value |= op0;
03810       // op1: rd
03811       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03812       op1 &= (1<<5) - 1;
03813       op1 <<= 25;
03814       Value |= op1;
03815       break;
03816     }
03817     case V9::FSQRTQ: {
03818       DEBUG(std::cerr << "Emitting FSQRTQ\n");
03819       Value = 2174748000U;
03820 
03821       // op0: rs2
03822       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03823       op0 &= (1<<5) - 1;
03824       Value |= op0;
03825       // op1: rd
03826       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03827       op1 &= (1<<5) - 1;
03828       op1 <<= 25;
03829       Value |= op1;
03830       break;
03831     }
03832     case V9::FSQRTS: {
03833       DEBUG(std::cerr << "Emitting FSQRTS\n");
03834       Value = 2174747936U;
03835 
03836       // op0: rs2
03837       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03838       op0 &= (1<<5) - 1;
03839       Value |= op0;
03840       // op1: rd
03841       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03842       op1 &= (1<<5) - 1;
03843       op1 <<= 25;
03844       Value |= op1;
03845       break;
03846     }
03847     case V9::FSTOD: {
03848       DEBUG(std::cerr << "Emitting FSTOD\n");
03849       Value = 2174753056U;
03850 
03851       // op0: rs2
03852       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03853       op0 &= (1<<5) - 1;
03854       Value |= op0;
03855       // op1: rd
03856       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03857       op1 &= (1<<5) - 1;
03858       op1 <<= 25;
03859       Value |= op1;
03860       break;
03861     }
03862     case V9::FSTOI: {
03863       DEBUG(std::cerr << "Emitting FSTOI\n");
03864       Value = 2174753312U;
03865 
03866       // op0: rs2
03867       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03868       op0 &= (1<<5) - 1;
03869       Value |= op0;
03870       // op1: rd
03871       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03872       op1 &= (1<<5) - 1;
03873       op1 <<= 25;
03874       Value |= op1;
03875       break;
03876     }
03877     case V9::FSTOQ: {
03878       DEBUG(std::cerr << "Emitting FSTOQ\n");
03879       Value = 2174753184U;
03880 
03881       // op0: rs2
03882       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03883       op0 &= (1<<5) - 1;
03884       Value |= op0;
03885       // op1: rd
03886       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03887       op1 &= (1<<5) - 1;
03888       op1 <<= 25;
03889       Value |= op1;
03890       break;
03891     }
03892     case V9::FSTOX: {
03893       DEBUG(std::cerr << "Emitting FSTOX\n");
03894       Value = 2174750752U;
03895 
03896       // op0: rs2
03897       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03898       op0 &= (1<<5) - 1;
03899       Value |= op0;
03900       // op1: rd
03901       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03902       op1 &= (1<<5) - 1;
03903       op1 <<= 25;
03904       Value |= op1;
03905       break;
03906     }
03907     case V9::FSUBD: {
03908       DEBUG(std::cerr << "Emitting FSUBD\n");
03909       Value = 2174748864U;
03910 
03911       // op0: rs1
03912       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03913       op0 &= (1<<5) - 1;
03914       op0 <<= 14;
03915       Value |= op0;
03916       // op1: rs2
03917       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03918       op1 &= (1<<5) - 1;
03919       Value |= op1;
03920       // op2: rd
03921       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03922       op2 &= (1<<5) - 1;
03923       op2 <<= 25;
03924       Value |= op2;
03925       break;
03926     }
03927     case V9::FSUBQ: {
03928       DEBUG(std::cerr << "Emitting FSUBQ\n");
03929       Value = 2174748896U;
03930 
03931       // op0: rs1
03932       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03933       op0 &= (1<<5) - 1;
03934       op0 <<= 14;
03935       Value |= op0;
03936       // op1: rs2
03937       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03938       op1 &= (1<<5) - 1;
03939       Value |= op1;
03940       // op2: rd
03941       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03942       op2 &= (1<<5) - 1;
03943       op2 <<= 25;
03944       Value |= op2;
03945       break;
03946     }
03947     case V9::FSUBS: {
03948       DEBUG(std::cerr << "Emitting FSUBS\n");
03949       Value = 2174748832U;
03950 
03951       // op0: rs1
03952       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03953       op0 &= (1<<5) - 1;
03954       op0 <<= 14;
03955       Value |= op0;
03956       // op1: rs2
03957       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03958       op1 &= (1<<5) - 1;
03959       Value |= op1;
03960       // op2: rd
03961       int op2 = getMachineOpValue(MI, MI.getOperand(2));
03962       op2 &= (1<<5) - 1;
03963       op2 <<= 25;
03964       Value |= op2;
03965       break;
03966     }
03967     case V9::FXTOD: {
03968       DEBUG(std::cerr << "Emitting FXTOD\n");
03969       Value = 2174750976U;
03970 
03971       // op0: rs2
03972       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03973       op0 &= (1<<5) - 1;
03974       Value |= op0;
03975       // op1: rd
03976       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03977       op1 &= (1<<5) - 1;
03978       op1 <<= 25;
03979       Value |= op1;
03980       break;
03981     }
03982     case V9::FXTOQ: {
03983       DEBUG(std::cerr << "Emitting FXTOQ\n");
03984       Value = 2174751104U;
03985 
03986       // op0: rs2
03987       int op0 = getMachineOpValue(MI, MI.getOperand(0));
03988       op0 &= (1<<5) - 1;
03989       Value |= op0;
03990       // op1: rd
03991       int op1 = getMachineOpValue(MI, MI.getOperand(1));
03992       op1 &= (1<<5) - 1;
03993       op1 <<= 25;
03994       Value |= op1;
03995       break;
03996     }
03997     case V9::FXTOS: {
03998       DEBUG(std::cerr << "Emitting FXTOS\n");
03999       Value = 2174750848U;
04000 
04001       // op0: rs2
04002       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04003       op0 &= (1<<5) - 1;
04004       Value |= op0;
04005       // op1: rd
04006       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04007       op1 &= (1<<5) - 1;
04008       op1 <<= 25;
04009       Value |= op1;
04010       break;
04011     }
04012     case V9::JMPLCALLi: {
04013       DEBUG(std::cerr << "Emitting JMPLCALLi\n");
04014       Value = 2176851968U;
04015 
04016       // op0: rs1
04017       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04018       op0 &= (1<<5) - 1;
04019       op0 <<= 14;
04020       Value |= op0;
04021       // op1: simm13
04022       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04023       op1 &= (1<<13) - 1;
04024       Value |= op1;
04025       // op2: rd
04026       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04027       op2 &= (1<<5) - 1;
04028       op2 <<= 25;
04029       Value |= op2;
04030       break;
04031     }
04032     case V9::JMPLCALLr: {
04033       DEBUG(std::cerr << "Emitting JMPLCALLr\n");
04034       Value = 2176843776U;
04035 
04036       // op0: rs1
04037       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04038       op0 &= (1<<5) - 1;
04039       op0 <<= 14;
04040       Value |= op0;
04041       // op1: rs2
04042       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04043       op1 &= (1<<5) - 1;
04044       Value |= op1;
04045       // op2: rd
04046       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04047       op2 &= (1<<5) - 1;
04048       op2 <<= 25;
04049       Value |= op2;
04050       break;
04051     }
04052     case V9::JMPLRETi: {
04053       DEBUG(std::cerr << "Emitting JMPLRETi\n");
04054       Value = 2176851968U;
04055 
04056       // op0: rs1
04057       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04058       op0 &= (1<<5) - 1;
04059       op0 <<= 14;
04060       Value |= op0;
04061       // op1: simm13
04062       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04063       op1 &= (1<<13) - 1;
04064       Value |= op1;
04065       // op2: rd
04066       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04067       op2 &= (1<<5) - 1;
04068       op2 <<= 25;
04069       Value |= op2;
04070       break;
04071     }
04072     case V9::JMPLRETr: {
04073       DEBUG(std::cerr << "Emitting JMPLRETr\n");
04074       Value = 2176843776U;
04075 
04076       // op0: rs1
04077       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04078       op0 &= (1<<5) - 1;
04079       op0 <<= 14;
04080       Value |= op0;
04081       // op1: rs2
04082       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04083       op1 &= (1<<5) - 1;
04084       Value |= op1;
04085       // op2: rd
04086       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04087       op2 &= (1<<5) - 1;
04088       op2 <<= 25;
04089       Value |= op2;
04090       break;
04091     }
04092     case V9::LDDFi: {
04093       DEBUG(std::cerr << "Emitting LDDFi\n");
04094       Value = 3239583744U;
04095 
04096       // op0: rs1
04097       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04098       op0 &= (1<<5) - 1;
04099       op0 <<= 14;
04100       Value |= op0;
04101       // op1: simm13
04102       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04103       op1 &= (1<<13) - 1;
04104       Value |= op1;
04105       // op2: rd
04106       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04107       op2 &= (1<<5) - 1;
04108       op2 <<= 25;
04109       Value |= op2;
04110       break;
04111     }
04112     case V9::LDDFr: {
04113       DEBUG(std::cerr << "Emitting LDDFr\n");
04114       Value = 3239575552U;
04115 
04116       // op0: rs1
04117       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04118       op0 &= (1<<5) - 1;
04119       op0 <<= 14;
04120       Value |= op0;
04121       // op1: rs2
04122       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04123       op1 &= (1<<5) - 1;
04124       Value |= op1;
04125       // op2: rd
04126       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04127       op2 &= (1<<5) - 1;
04128       op2 <<= 25;
04129       Value |= op2;
04130       break;
04131     }
04132     case V9::LDFSRi: {
04133       DEBUG(std::cerr << "Emitting LDFSRi\n");
04134       Value = 3238535168U;
04135 
04136       // op0: rs1
04137       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04138       op0 &= (1<<5) - 1;
04139       op0 <<= 14;
04140       Value |= op0;
04141       // op1: simm13
04142       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04143       op1 &= (1<<13) - 1;
04144       Value |= op1;
04145       break;
04146     }
04147     case V9::LDFSRr: {
04148       DEBUG(std::cerr << "Emitting LDFSRr\n");
04149       Value = 3238526976U;
04150 
04151       // op0: rs1
04152       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04153       op0 &= (1<<5) - 1;
04154       op0 <<= 14;
04155       Value |= op0;
04156       // op1: rs2
04157       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04158       op1 &= (1<<5) - 1;
04159       Value |= op1;
04160       break;
04161     }
04162     case V9::LDFi: {
04163       DEBUG(std::cerr << "Emitting LDFi\n");
04164       Value = 3238010880U;
04165 
04166       // op0: rs1
04167       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04168       op0 &= (1<<5) - 1;
04169       op0 <<= 14;
04170       Value |= op0;
04171       // op1: simm13
04172       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04173       op1 &= (1<<13) - 1;
04174       Value |= op1;
04175       // op2: rd
04176       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04177       op2 &= (1<<5) - 1;
04178       op2 <<= 25;
04179       Value |= op2;
04180       break;
04181     }
04182     case V9::LDFr: {
04183       DEBUG(std::cerr << "Emitting LDFr\n");
04184       Value = 3238002688U;
04185 
04186       // op0: rs1
04187       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04188       op0 &= (1<<5) - 1;
04189       op0 <<= 14;
04190       Value |= op0;
04191       // op1: rs2
04192       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04193       op1 &= (1<<5) - 1;
04194       Value |= op1;
04195       // op2: rd
04196       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04197       op2 &= (1<<5) - 1;
04198       op2 <<= 25;
04199       Value |= op2;
04200       break;
04201     }
04202     case V9::LDQFi: {
04203       DEBUG(std::cerr << "Emitting LDQFi\n");
04204       Value = 3239059456U;
04205 
04206       // op0: rs1
04207       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04208       op0 &= (1<<5) - 1;
04209       op0 <<= 14;
04210       Value |= op0;
04211       // op1: simm13
04212       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04213       op1 &= (1<<13) - 1;
04214       Value |= op1;
04215       // op2: rd
04216       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04217       op2 &= (1<<5) - 1;
04218       op2 <<= 25;
04219       Value |= op2;
04220       break;
04221     }
04222     case V9::LDQFr: {
04223       DEBUG(std::cerr << "Emitting LDQFr\n");
04224       Value = 3239051264U;
04225 
04226       // op0: rs1
04227       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04228       op0 &= (1<<5) - 1;
04229       op0 <<= 14;
04230       Value |= op0;
04231       // op1: rs2
04232       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04233       op1 &= (1<<5) - 1;
04234       Value |= op1;
04235       // op2: rd
04236       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04237       op2 &= (1<<5) - 1;
04238       op2 <<= 25;
04239       Value |= op2;
04240       break;
04241     }
04242     case V9::LDSBi: {
04243       DEBUG(std::cerr << "Emitting LDSBi\n");
04244       Value = 3225952256U;
04245 
04246       // op0: rs1
04247       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04248       op0 &= (1<<5) - 1;
04249       op0 <<= 14;
04250       Value |= op0;
04251       // op1: simm13
04252       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04253       op1 &= (1<<13) - 1;
04254       Value |= op1;
04255       // op2: rd
04256       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04257       op2 &= (1<<5) - 1;
04258       op2 <<= 25;
04259       Value |= op2;
04260       break;
04261     }
04262     case V9::LDSBr: {
04263       DEBUG(std::cerr << "Emitting LDSBr\n");
04264       Value = 3225944064U;
04265 
04266       // op0: rs1
04267       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04268       op0 &= (1<<5) - 1;
04269       op0 <<= 14;
04270       Value |= op0;
04271       // op1: rs2
04272       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04273       op1 &= (1<<5) - 1;
04274       Value |= op1;
04275       // op2: rd
04276       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04277       op2 &= (1<<5) - 1;
04278       op2 <<= 25;
04279       Value |= op2;
04280       break;
04281     }
04282     case V9::LDSHi: {
04283       DEBUG(std::cerr << "Emitting LDSHi\n");
04284       Value = 3226476544U;
04285 
04286       // op0: rs1
04287       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04288       op0 &= (1<<5) - 1;
04289       op0 <<= 14;
04290       Value |= op0;
04291       // op1: simm13
04292       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04293       op1 &= (1<<13) - 1;
04294       Value |= op1;
04295       // op2: rd
04296       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04297       op2 &= (1<<5) - 1;
04298       op2 <<= 25;
04299       Value |= op2;
04300       break;
04301     }
04302     case V9::LDSHr: {
04303       DEBUG(std::cerr << "Emitting LDSHr\n");
04304       Value = 3226468352U;
04305 
04306       // op0: rs1
04307       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04308       op0 &= (1<<5) - 1;
04309       op0 <<= 14;
04310       Value |= op0;
04311       // op1: rs2
04312       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04313       op1 &= (1<<5) - 1;
04314       Value |= op1;
04315       // op2: rd
04316       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04317       op2 &= (1<<5) - 1;
04318       op2 <<= 25;
04319       Value |= op2;
04320       break;
04321     }
04322     case V9::LDSWi: {
04323       DEBUG(std::cerr << "Emitting LDSWi\n");
04324       Value = 3225427968U;
04325 
04326       // op0: rs1
04327       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04328       op0 &= (1<<5) - 1;
04329       op0 <<= 14;
04330       Value |= op0;
04331       // op1: simm13
04332       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04333       op1 &= (1<<13) - 1;
04334       Value |= op1;
04335       // op2: rd
04336       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04337       op2 &= (1<<5) - 1;
04338       op2 <<= 25;
04339       Value |= op2;
04340       break;
04341     }
04342     case V9::LDSWr: {
04343       DEBUG(std::cerr << "Emitting LDSWr\n");
04344       Value = 3225419776U;
04345 
04346       // op0: rs1
04347       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04348       op0 &= (1<<5) - 1;
04349       op0 <<= 14;
04350       Value |= op0;
04351       // op1: rs2
04352       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04353       op1 &= (1<<5) - 1;
04354       Value |= op1;
04355       // op2: rd
04356       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04357       op2 &= (1<<5) - 1;
04358       op2 <<= 25;
04359       Value |= op2;
04360       break;
04361     }
04362     case V9::LDUBi: {
04363       DEBUG(std::cerr << "Emitting LDUBi\n");
04364       Value = 3221757952U;
04365 
04366       // op0: rs1
04367       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04368       op0 &= (1<<5) - 1;
04369       op0 <<= 14;
04370       Value |= op0;
04371       // op1: simm13
04372       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04373       op1 &= (1<<13) - 1;
04374       Value |= op1;
04375       // op2: rd
04376       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04377       op2 &= (1<<5) - 1;
04378       op2 <<= 25;
04379       Value |= op2;
04380       break;
04381     }
04382     case V9::LDUBr: {
04383       DEBUG(std::cerr << "Emitting LDUBr\n");
04384       Value = 3221749760U;
04385 
04386       // op0: rs1
04387       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04388       op0 &= (1<<5) - 1;
04389       op0 <<= 14;
04390       Value |= op0;
04391       // op1: rs2
04392       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04393       op1 &= (1<<5) - 1;
04394       Value |= op1;
04395       // op2: rd
04396       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04397       op2 &= (1<<5) - 1;
04398       op2 <<= 25;
04399       Value |= op2;
04400       break;
04401     }
04402     case V9::LDUHi: {
04403       DEBUG(std::cerr << "Emitting LDUHi\n");
04404       Value = 3222282240U;
04405 
04406       // op0: rs1
04407       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04408       op0 &= (1<<5) - 1;
04409       op0 <<= 14;
04410       Value |= op0;
04411       // op1: simm13
04412       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04413       op1 &= (1<<13) - 1;
04414       Value |= op1;
04415       // op2: rd
04416       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04417       op2 &= (1<<5) - 1;
04418       op2 <<= 25;
04419       Value |= op2;
04420       break;
04421     }
04422     case V9::LDUHr: {
04423       DEBUG(std::cerr << "Emitting LDUHr\n");
04424       Value = 3222274048U;
04425 
04426       // op0: rs1
04427       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04428       op0 &= (1<<5) - 1;
04429       op0 <<= 14;
04430       Value |= op0;
04431       // op1: rs2
04432       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04433       op1 &= (1<<5) - 1;
04434       Value |= op1;
04435       // op2: rd
04436       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04437       op2 &= (1<<5) - 1;
04438       op2 <<= 25;
04439       Value |= op2;
04440       break;
04441     }
04442     case V9::LDUWi: {
04443       DEBUG(std::cerr << "Emitting LDUWi\n");
04444       Value = 3221233664U;
04445 
04446       // op0: rs1
04447       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04448       op0 &= (1<<5) - 1;
04449       op0 <<= 14;
04450       Value |= op0;
04451       // op1: simm13
04452       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04453       op1 &= (1<<13) - 1;
04454       Value |= op1;
04455       // op2: rd
04456       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04457       op2 &= (1<<5) - 1;
04458       op2 <<= 25;
04459       Value |= op2;
04460       break;
04461     }
04462     case V9::LDUWr: {
04463       DEBUG(std::cerr << "Emitting LDUWr\n");
04464       Value = 3221225472U;
04465 
04466       // op0: rs1
04467       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04468       op0 &= (1<<5) - 1;
04469       op0 <<= 14;
04470       Value |= op0;
04471       // op1: rs2
04472       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04473       op1 &= (1<<5) - 1;
04474       Value |= op1;
04475       // op2: rd
04476       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04477       op2 &= (1<<5) - 1;
04478       op2 <<= 25;
04479       Value |= op2;
04480       break;
04481     }
04482     case V9::LDXFSRi: {
04483       DEBUG(std::cerr << "Emitting LDXFSRi\n");
04484       Value = 3272089600U;
04485 
04486       // op0: rs1
04487       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04488       op0 &= (1<<5) - 1;
04489       op0 <<= 14;
04490       Value |= op0;
04491       // op1: simm13
04492       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04493       op1 &= (1<<13) - 1;
04494       Value |= op1;
04495       break;
04496     }
04497     case V9::LDXFSRr: {
04498       DEBUG(std::cerr << "Emitting LDXFSRr\n");
04499       Value = 3272081408U;
04500 
04501       // op0: rs1
04502       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04503       op0 &= (1<<5) - 1;
04504       op0 <<= 14;
04505       Value |= op0;
04506       // op1: rs2
04507       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04508       op1 &= (1<<5) - 1;
04509       Value |= op1;
04510       break;
04511     }
04512     case V9::LDXi: {
04513       DEBUG(std::cerr << "Emitting LDXi\n");
04514       Value = 3227000832U;
04515 
04516       // op0: rs1
04517       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04518       op0 &= (1<<5) - 1;
04519       op0 <<= 14;
04520       Value |= op0;
04521       // op1: simm13
04522       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04523       op1 &= (1<<13) - 1;
04524       Value |= op1;
04525       // op2: rd
04526       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04527       op2 &= (1<<5) - 1;
04528       op2 <<= 25;
04529       Value |= op2;
04530       break;
04531     }
04532     case V9::LDXr: {
04533       DEBUG(std::cerr << "Emitting LDXr\n");
04534       Value = 3226992640U;
04535 
04536       // op0: rs1
04537       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04538       op0 &= (1<<5) - 1;
04539       op0 <<= 14;
04540       Value |= op0;
04541       // op1: rs2
04542       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04543       op1 &= (1<<5) - 1;
04544       Value |= op1;
04545       // op2: rd
04546       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04547       op2 &= (1<<5) - 1;
04548       op2 <<= 25;
04549       Value |= op2;
04550       break;
04551     }
04552     case V9::MOVAi: {
04553       DEBUG(std::cerr << "Emitting MOVAi\n");
04554       Value = 2170691584U;
04555 
04556       // op0: cc
04557       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04558       // op1: simm11
04559       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04560       op1 &= (1<<11) - 1;
04561       Value |= op1;
04562       // op2: rd
04563       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04564       op2 &= (1<<5) - 1;
04565       op2 <<= 25;
04566       Value |= op2;
04567       Value |= getValueBit(op0, 2) << 18;
04568       Value |= getValueBit(op0, 1) << 12;
04569       Value |= getValueBit(op0, 0) << 11;
04570       break;
04571     }
04572     case V9::MOVAr: {
04573       DEBUG(std::cerr << "Emitting MOVAr\n");
04574       Value = 2170683392U;
04575 
04576       // op0: cc
04577       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04578       // op1: rs2
04579       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04580       op1 &= (1<<5) - 1;
04581       Value |= op1;
04582       // op2: rd
04583       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04584       op2 &= (1<<5) - 1;
04585       op2 <<= 25;
04586       Value |= op2;
04587       Value |= getValueBit(op0, 2) << 18;
04588       Value |= getValueBit(op0, 1) << 12;
04589       Value |= getValueBit(op0, 0) << 11;
04590       break;
04591     }
04592     case V9::MOVCCi: {
04593       DEBUG(std::cerr << "Emitting MOVCCi\n");
04594       Value = 2170773504U;
04595 
04596       // op0: cc
04597       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04598       // op1: simm11
04599       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04600       op1 &= (1<<11) - 1;
04601       Value |= op1;
04602       // op2: rd
04603       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04604       op2 &= (1<<5) - 1;
04605       op2 <<= 25;
04606       Value |= op2;
04607       Value |= getValueBit(op0, 2) << 18;
04608       Value |= getValueBit(op0, 1) << 12;
04609       Value |= getValueBit(op0, 0) << 11;
04610       break;
04611     }
04612     case V9::MOVCCr: {
04613       DEBUG(std::cerr << "Emitting MOVCCr\n");
04614       Value = 2170765312U;
04615 
04616       // op0: cc
04617       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04618       // op1: rs2
04619       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04620       op1 &= (1<<5) - 1;
04621       Value |= op1;
04622       // op2: rd
04623       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04624       op2 &= (1<<5) - 1;
04625       op2 <<= 25;
04626       Value |= op2;
04627       Value |= getValueBit(op0, 2) << 18;
04628       Value |= getValueBit(op0, 1) << 12;
04629       Value |= getValueBit(op0, 0) << 11;
04630       break;
04631     }
04632     case V9::MOVCSi: {
04633       DEBUG(std::cerr << "Emitting MOVCSi\n");
04634       Value = 2170642432U;
04635 
04636       // op0: cc
04637       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04638       // op1: simm11
04639       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04640       op1 &= (1<<11) - 1;
04641       Value |= op1;
04642       // op2: rd
04643       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04644       op2 &= (1<<5) - 1;
04645       op2 <<= 25;
04646       Value |= op2;
04647       Value |= getValueBit(op0, 2) << 18;
04648       Value |= getValueBit(op0, 1) << 12;
04649       Value |= getValueBit(op0, 0) << 11;
04650       break;
04651     }
04652     case V9::MOVCSr: {
04653       DEBUG(std::cerr << "Emitting MOVCSr\n");
04654       Value = 2170634240U;
04655 
04656       // op0: cc
04657       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04658       // op1: rs2
04659       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04660       op1 &= (1<<5) - 1;
04661       Value |= op1;
04662       // op2: rd
04663       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04664       op2 &= (1<<5) - 1;
04665       op2 <<= 25;
04666       Value |= op2;
04667       Value |= getValueBit(op0, 2) << 18;
04668       Value |= getValueBit(op0, 1) << 12;
04669       Value |= getValueBit(op0, 0) << 11;
04670       break;
04671     }
04672     case V9::MOVEi: {
04673       DEBUG(std::cerr << "Emitting MOVEi\n");
04674       Value = 2170576896U;
04675 
04676       // op0: cc
04677       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04678       // op1: simm11
04679       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04680       op1 &= (1<<11) - 1;
04681       Value |= op1;
04682       // op2: rd
04683       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04684       op2 &= (1<<5) - 1;
04685       op2 <<= 25;
04686       Value |= op2;
04687       Value |= getValueBit(op0, 2) << 18;
04688       Value |= getValueBit(op0, 1) << 12;
04689       Value |= getValueBit(op0, 0) << 11;
04690       break;
04691     }
04692     case V9::MOVEr: {
04693       DEBUG(std::cerr << "Emitting MOVEr\n");
04694       Value = 2170568704U;
04695 
04696       // op0: cc
04697       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04698       // op1: rs2
04699       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04700       op1 &= (1<<5) - 1;
04701       Value |= op1;
04702       // op2: rd
04703       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04704       op2 &= (1<<5) - 1;
04705       op2 <<= 25;
04706       Value |= op2;
04707       Value |= getValueBit(op0, 2) << 18;
04708       Value |= getValueBit(op0, 1) << 12;
04709       Value |= getValueBit(op0, 0) << 11;
04710       break;
04711     }
04712     case V9::MOVFAi: {
04713       DEBUG(std::cerr << "Emitting MOVFAi\n");
04714       Value = 2170691584U;
04715 
04716       // op0: cc
04717       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04718       // op1: simm11
04719       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04720       op1 &= (1<<11) - 1;
04721       Value |= op1;
04722       // op2: rd
04723       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04724       op2 &= (1<<5) - 1;
04725       op2 <<= 25;
04726       Value |= op2;
04727       Value |= getValueBit(op0, 2) << 18;
04728       Value |= getValueBit(op0, 1) << 12;
04729       Value |= getValueBit(op0, 0) << 11;
04730       break;
04731     }
04732     case V9::MOVFAr: {
04733       DEBUG(std::cerr << "Emitting MOVFAr\n");
04734       Value = 2170683392U;
04735 
04736       // op0: cc
04737       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04738       // op1: rs2
04739       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04740       op1 &= (1<<5) - 1;
04741       Value |= op1;
04742       // op2: rd
04743       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04744       op2 &= (1<<5) - 1;
04745       op2 <<= 25;
04746       Value |= op2;
04747       Value |= getValueBit(op0, 2) << 18;
04748       Value |= getValueBit(op0, 1) << 12;
04749       Value |= getValueBit(op0, 0) << 11;
04750       break;
04751     }
04752     case V9::MOVFEi: {
04753       DEBUG(std::cerr << "Emitting MOVFEi\n");
04754       Value = 2170707968U;
04755 
04756       // op0: cc
04757       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04758       // op1: simm11
04759       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04760       op1 &= (1<<11) - 1;
04761       Value |= op1;
04762       // op2: rd
04763       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04764       op2 &= (1<<5) - 1;
04765       op2 <<= 25;
04766       Value |= op2;
04767       Value |= getValueBit(op0, 2) << 18;
04768       Value |= getValueBit(op0, 1) << 12;
04769       Value |= getValueBit(op0, 0) << 11;
04770       break;
04771     }
04772     case V9::MOVFEr: {
04773       DEBUG(std::cerr << "Emitting MOVFEr\n");
04774       Value = 2170699776U;
04775 
04776       // op0: cc
04777       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04778       // op1: rs2
04779       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04780       op1 &= (1<<5) - 1;
04781       Value |= op1;
04782       // op2: rd
04783       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04784       op2 &= (1<<5) - 1;
04785       op2 <<= 25;
04786       Value |= op2;
04787       Value |= getValueBit(op0, 2) << 18;
04788       Value |= getValueBit(op0, 1) << 12;
04789       Value |= getValueBit(op0, 0) << 11;
04790       break;
04791     }
04792     case V9::MOVFGEi: {
04793       DEBUG(std::cerr << "Emitting MOVFGEi\n");
04794       Value = 2170740736U;
04795 
04796       // op0: cc
04797       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04798       // op1: simm11
04799       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04800       op1 &= (1<<11) - 1;
04801       Value |= op1;
04802       // op2: rd
04803       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04804       op2 &= (1<<5) - 1;
04805       op2 <<= 25;
04806       Value |= op2;
04807       Value |= getValueBit(op0, 2) << 18;
04808       Value |= getValueBit(op0, 1) << 12;
04809       Value |= getValueBit(op0, 0) << 11;
04810       break;
04811     }
04812     case V9::MOVFGEr: {
04813       DEBUG(std::cerr << "Emitting MOVFGEr\n");
04814       Value = 2170732544U;
04815 
04816       // op0: cc
04817       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04818       // op1: rs2
04819       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04820       op1 &= (1<<5) - 1;
04821       Value |= op1;
04822       // op2: rd
04823       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04824       op2 &= (1<<5) - 1;
04825       op2 <<= 25;
04826       Value |= op2;
04827       Value |= getValueBit(op0, 2) << 18;
04828       Value |= getValueBit(op0, 1) << 12;
04829       Value |= getValueBit(op0, 0) << 11;
04830       break;
04831     }
04832     case V9::MOVFGi: {
04833       DEBUG(std::cerr << "Emitting MOVFGi\n");
04834       Value = 2170658816U;
04835 
04836       // op0: cc
04837       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04838       // op1: simm11
04839       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04840       op1 &= (1<<11) - 1;
04841       Value |= op1;
04842       // op2: rd
04843       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04844       op2 &= (1<<5) - 1;
04845       op2 <<= 25;
04846       Value |= op2;
04847       Value |= getValueBit(op0, 2) << 18;
04848       Value |= getValueBit(op0, 1) << 12;
04849       Value |= getValueBit(op0, 0) << 11;
04850       break;
04851     }
04852     case V9::MOVFGr: {
04853       DEBUG(std::cerr << "Emitting MOVFGr\n");
04854       Value = 2170650624U;
04855 
04856       // op0: cc
04857       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04858       // op1: rs2
04859       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04860       op1 &= (1<<5) - 1;
04861       Value |= op1;
04862       // op2: rd
04863       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04864       op2 &= (1<<5) - 1;
04865       op2 <<= 25;
04866       Value |= op2;
04867       Value |= getValueBit(op0, 2) << 18;
04868       Value |= getValueBit(op0, 1) << 12;
04869       Value |= getValueBit(op0, 0) << 11;
04870       break;
04871     }
04872     case V9::MOVFLEi: {
04873       DEBUG(std::cerr << "Emitting MOVFLEi\n");
04874       Value = 2170773504U;
04875 
04876       // op0: cc
04877       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04878       // op1: simm11
04879       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04880       op1 &= (1<<11) - 1;
04881       Value |= op1;
04882       // op2: rd
04883       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04884       op2 &= (1<<5) - 1;
04885       op2 <<= 25;
04886       Value |= op2;
04887       Value |= getValueBit(op0, 2) << 18;
04888       Value |= getValueBit(op0, 1) << 12;
04889       Value |= getValueBit(op0, 0) << 11;
04890       break;
04891     }
04892     case V9::MOVFLEr: {
04893       DEBUG(std::cerr << "Emitting MOVFLEr\n");
04894       Value = 2170765312U;
04895 
04896       // op0: cc
04897       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04898       // op1: rs2
04899       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04900       op1 &= (1<<5) - 1;
04901       Value |= op1;
04902       // op2: rd
04903       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04904       op2 &= (1<<5) - 1;
04905       op2 <<= 25;
04906       Value |= op2;
04907       Value |= getValueBit(op0, 2) << 18;
04908       Value |= getValueBit(op0, 1) << 12;
04909       Value |= getValueBit(op0, 0) << 11;
04910       break;
04911     }
04912     case V9::MOVFLGi: {
04913       DEBUG(std::cerr << "Emitting MOVFLGi\n");
04914       Value = 2170593280U;
04915 
04916       // op0: cc
04917       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04918       // op1: simm11
04919       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04920       op1 &= (1<<11) - 1;
04921       Value |= op1;
04922       // op2: rd
04923       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04924       op2 &= (1<<5) - 1;
04925       op2 <<= 25;
04926       Value |= op2;
04927       Value |= getValueBit(op0, 2) << 18;
04928       Value |= getValueBit(op0, 1) << 12;
04929       Value |= getValueBit(op0, 0) << 11;
04930       break;
04931     }
04932     case V9::MOVFLGr: {
04933       DEBUG(std::cerr << "Emitting MOVFLGr\n");
04934       Value = 2170585088U;
04935 
04936       // op0: cc
04937       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04938       // op1: rs2
04939       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04940       op1 &= (1<<5) - 1;
04941       Value |= op1;
04942       // op2: rd
04943       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04944       op2 &= (1<<5) - 1;
04945       op2 <<= 25;
04946       Value |= op2;
04947       Value |= getValueBit(op0, 2) << 18;
04948       Value |= getValueBit(op0, 1) << 12;
04949       Value |= getValueBit(op0, 0) << 11;
04950       break;
04951     }
04952     case V9::MOVFLi: {
04953       DEBUG(std::cerr << "Emitting MOVFLi\n");
04954       Value = 2170626048U;
04955 
04956       // op0: cc
04957       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04958       // op1: simm11
04959       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04960       op1 &= (1<<11) - 1;
04961       Value |= op1;
04962       // op2: rd
04963       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04964       op2 &= (1<<5) - 1;
04965       op2 <<= 25;
04966       Value |= op2;
04967       Value |= getValueBit(op0, 2) << 18;
04968       Value |= getValueBit(op0, 1) << 12;
04969       Value |= getValueBit(op0, 0) << 11;
04970       break;
04971     }
04972     case V9::MOVFLr: {
04973       DEBUG(std::cerr << "Emitting MOVFLr\n");
04974       Value = 2170617856U;
04975 
04976       // op0: cc
04977       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04978       // op1: rs2
04979       int op1 = getMachineOpValue(MI, MI.getOperand(1));
04980       op1 &= (1<<5) - 1;
04981       Value |= op1;
04982       // op2: rd
04983       int op2 = getMachineOpValue(MI, MI.getOperand(2));
04984       op2 &= (1<<5) - 1;
04985       op2 <<= 25;
04986       Value |= op2;
04987       Value |= getValueBit(op0, 2) << 18;
04988       Value |= getValueBit(op0, 1) << 12;
04989       Value |= getValueBit(op0, 0) << 11;
04990       break;
04991     }
04992     case V9::MOVFNEi: {
04993       DEBUG(std::cerr << "Emitting MOVFNEi\n");
04994       Value = 2170576896U;
04995 
04996       // op0: cc
04997       int op0 = getMachineOpValue(MI, MI.getOperand(0));
04998       // op1: simm11
04999       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05000       op1 &= (1<<11) - 1;
05001       Value |= op1;
05002       // op2: rd
05003       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05004       op2 &= (1<<5) - 1;
05005       op2 <<= 25;
05006       Value |= op2;
05007       Value |= getValueBit(op0, 2) << 18;
05008       Value |= getValueBit(op0, 1) << 12;
05009       Value |= getValueBit(op0, 0) << 11;
05010       break;
05011     }
05012     case V9::MOVFNEr: {
05013       DEBUG(std::cerr << "Emitting MOVFNEr\n");
05014       Value = 2170568704U;
05015 
05016       // op0: cc
05017       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05018       // op1: rs2
05019       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05020       op1 &= (1<<5) - 1;
05021       Value |= op1;
05022       // op2: rd
05023       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05024       op2 &= (1<<5) - 1;
05025       op2 <<= 25;
05026       Value |= op2;
05027       Value |= getValueBit(op0, 2) << 18;
05028       Value |= getValueBit(op0, 1) << 12;
05029       Value |= getValueBit(op0, 0) << 11;
05030       break;
05031     }
05032     case V9::MOVFNi: {
05033       DEBUG(std::cerr << "Emitting MOVFNi\n");
05034       Value = 2170560512U;
05035 
05036       // op0: cc
05037       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05038       // op1: simm11
05039       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05040       op1 &= (1<<11) - 1;
05041       Value |= op1;
05042       // op2: rd
05043       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05044       op2 &= (1<<5) - 1;
05045       op2 <<= 25;
05046       Value |= op2;
05047       Value |= getValueBit(op0, 2) << 18;
05048       Value |= getValueBit(op0, 1) << 12;
05049       Value |= getValueBit(op0, 0) << 11;
05050       break;
05051     }
05052     case V9::MOVFNr: {
05053       DEBUG(std::cerr << "Emitting MOVFNr\n");
05054       Value = 2170552320U;
05055 
05056       // op0: cc
05057       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05058       // op1: rs2
05059       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05060       op1 &= (1<<5) - 1;
05061       Value |= op1;
05062       // op2: rd
05063       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05064       op2 &= (1<<5) - 1;
05065       op2 <<= 25;
05066       Value |= op2;
05067       Value |= getValueBit(op0, 2) << 18;
05068       Value |= getValueBit(op0, 1) << 12;
05069       Value |= getValueBit(op0, 0) << 11;
05070       break;
05071     }
05072     case V9::MOVFOi: {
05073       DEBUG(std::cerr << "Emitting MOVFOi\n");
05074       Value = 2170806272U;
05075 
05076       // op0: cc
05077       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05078       // op1: simm11
05079       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05080       op1 &= (1<<11) - 1;
05081       Value |= op1;
05082       // op2: rd
05083       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05084       op2 &= (1<<5) - 1;
05085       op2 <<= 25;
05086       Value |= op2;
05087       Value |= getValueBit(op0, 2) << 18;
05088       Value |= getValueBit(op0, 1) << 12;
05089       Value |= getValueBit(op0, 0) << 11;
05090       break;
05091     }
05092     case V9::MOVFOr: {
05093       DEBUG(std::cerr << "Emitting MOVFOr\n");
05094       Value = 2170798080U;
05095 
05096       // op0: cc
05097       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05098       // op1: rs2
05099       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05100       op1 &= (1<<5) - 1;
05101       Value |= op1;
05102       // op2: rd
05103       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05104       op2 &= (1<<5) - 1;
05105       op2 <<= 25;
05106       Value |= op2;
05107       Value |= getValueBit(op0, 2) << 18;
05108       Value |= getValueBit(op0, 1) << 12;
05109       Value |= getValueBit(op0, 0) << 11;
05110       break;
05111     }
05112     case V9::MOVFUEi: {
05113       DEBUG(std::cerr << "Emitting MOVFUEi\n");
05114       Value = 2170724352U;
05115 
05116       // op0: cc
05117       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05118       // op1: simm11
05119       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05120       op1 &= (1<<11) - 1;
05121       Value |= op1;
05122       // op2: rd
05123       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05124       op2 &= (1<<5) - 1;
05125       op2 <<= 25;
05126       Value |= op2;
05127       Value |= getValueBit(op0, 2) << 18;
05128       Value |= getValueBit(op0, 1) << 12;
05129       Value |= getValueBit(op0, 0) << 11;
05130       break;
05131     }
05132     case V9::MOVFUEr: {
05133       DEBUG(std::cerr << "Emitting MOVFUEr\n");
05134       Value = 2170716160U;
05135 
05136       // op0: cc
05137       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05138       // op1: rs2
05139       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05140       op1 &= (1<<5) - 1;
05141       Value |= op1;
05142       // op2: rd
05143       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05144       op2 &= (1<<5) - 1;
05145       op2 <<= 25;
05146       Value |= op2;
05147       Value |= getValueBit(op0, 2) << 18;
05148       Value |= getValueBit(op0, 1) << 12;
05149       Value |= getValueBit(op0, 0) << 11;
05150       break;
05151     }
05152     case V9::MOVFUGEi: {
05153       DEBUG(std::cerr << "Emitting MOVFUGEi\n");
05154       Value = 2170757120U;
05155 
05156       // op0: cc
05157       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05158       // op1: simm11
05159       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05160       op1 &= (1<<11) - 1;
05161       Value |= op1;
05162       // op2: rd
05163       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05164       op2 &= (1<<5) - 1;
05165       op2 <<= 25;
05166       Value |= op2;
05167       Value |= getValueBit(op0, 2) << 18;
05168       Value |= getValueBit(op0, 1) << 12;
05169       Value |= getValueBit(op0, 0) << 11;
05170       break;
05171     }
05172     case V9::MOVFUGEr: {
05173       DEBUG(std::cerr << "Emitting MOVFUGEr\n");
05174       Value = 2170748928U;
05175 
05176       // op0: cc
05177       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05178       // op1: rs2
05179       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05180       op1 &= (1<<5) - 1;
05181       Value |= op1;
05182       // op2: rd
05183       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05184       op2 &= (1<<5) - 1;
05185       op2 <<= 25;
05186       Value |= op2;
05187       Value |= getValueBit(op0, 2) << 18;
05188       Value |= getValueBit(op0, 1) << 12;
05189       Value |= getValueBit(op0, 0) << 11;
05190       break;
05191     }
05192     case V9::MOVFUGi: {
05193       DEBUG(std::cerr << "Emitting MOVFUGi\n");
05194       Value = 2170642432U;
05195 
05196       // op0: cc
05197       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05198       // op1: simm11
05199       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05200       op1 &= (1<<11) - 1;
05201       Value |= op1;
05202       // op2: rd
05203       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05204       op2 &= (1<<5) - 1;
05205       op2 <<= 25;
05206       Value |= op2;
05207       Value |= getValueBit(op0, 2) << 18;
05208       Value |= getValueBit(op0, 1) << 12;
05209       Value |= getValueBit(op0, 0) << 11;
05210       break;
05211     }
05212     case V9::MOVFUGr: {
05213       DEBUG(std::cerr << "Emitting MOVFUGr\n");
05214       Value = 2170634240U;
05215 
05216       // op0: cc
05217       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05218       // op1: rs2
05219       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05220       op1 &= (1<<5) - 1;
05221       Value |= op1;
05222       // op2: rd
05223       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05224       op2 &= (1<<5) - 1;
05225       op2 <<= 25;
05226       Value |= op2;
05227       Value |= getValueBit(op0, 2) << 18;
05228       Value |= getValueBit(op0, 1) << 12;
05229       Value |= getValueBit(op0, 0) << 11;
05230       break;
05231     }
05232     case V9::MOVFULEi: {
05233       DEBUG(std::cerr << "Emitting MOVFULEi\n");
05234       Value = 2170789888U;
05235 
05236       // op0: cc
05237       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05238       // op1: simm11
05239       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05240       op1 &= (1<<11) - 1;
05241       Value |= op1;
05242       // op2: rd
05243       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05244       op2 &= (1<<5) - 1;
05245       op2 <<= 25;
05246       Value |= op2;
05247       Value |= getValueBit(op0, 2) << 18;
05248       Value |= getValueBit(op0, 1) << 12;
05249       Value |= getValueBit(op0, 0) << 11;
05250       break;
05251     }
05252     case V9::MOVFULEr: {
05253       DEBUG(std::cerr << "Emitting MOVFULEr\n");
05254       Value = 2170781696U;
05255 
05256       // op0: cc
05257       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05258       // op1: rs2
05259       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05260       op1 &= (1<<5) - 1;
05261       Value |= op1;
05262       // op2: rd
05263       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05264       op2 &= (1<<5) - 1;
05265       op2 <<= 25;
05266       Value |= op2;
05267       Value |= getValueBit(op0, 2) << 18;
05268       Value |= getValueBit(op0, 1) << 12;
05269       Value |= getValueBit(op0, 0) << 11;
05270       break;
05271     }
05272     case V9::MOVFULi: {
05273       DEBUG(std::cerr << "Emitting MOVFULi\n");
05274       Value = 2170609664U;
05275 
05276       // op0: cc
05277       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05278       // op1: simm11
05279       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05280       op1 &= (1<<11) - 1;
05281       Value |= op1;
05282       // op2: rd
05283       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05284       op2 &= (1<<5) - 1;
05285       op2 <<= 25;
05286       Value |= op2;
05287       Value |= getValueBit(op0, 2) << 18;
05288       Value |= getValueBit(op0, 1) << 12;
05289       Value |= getValueBit(op0, 0) << 11;
05290       break;
05291     }
05292     case V9::MOVFULr: {
05293       DEBUG(std::cerr << "Emitting MOVFULr\n");
05294       Value = 2170601472U;
05295 
05296       // op0: cc
05297       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05298       // op1: rs2
05299       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05300       op1 &= (1<<5) - 1;
05301       Value |= op1;
05302       // op2: rd
05303       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05304       op2 &= (1<<5) - 1;
05305       op2 <<= 25;
05306       Value |= op2;
05307       Value |= getValueBit(op0, 2) << 18;
05308       Value |= getValueBit(op0, 1) << 12;
05309       Value |= getValueBit(op0, 0) << 11;
05310       break;
05311     }
05312     case V9::MOVFUi: {
05313       DEBUG(std::cerr << "Emitting MOVFUi\n");
05314       Value = 2170675200U;
05315 
05316       // op0: cc
05317       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05318       // op1: simm11
05319       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05320       op1 &= (1<<11) - 1;
05321       Value |= op1;
05322       // op2: rd
05323       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05324       op2 &= (1<<5) - 1;
05325       op2 <<= 25;
05326       Value |= op2;
05327       Value |= getValueBit(op0, 2) << 18;
05328       Value |= getValueBit(op0, 1) << 12;
05329       Value |= getValueBit(op0, 0) << 11;
05330       break;
05331     }
05332     case V9::MOVFUr: {
05333       DEBUG(std::cerr << "Emitting MOVFUr\n");
05334       Value = 2170667008U;
05335 
05336       // op0: cc
05337       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05338       // op1: rs2
05339       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05340       op1 &= (1<<5) - 1;
05341       Value |= op1;
05342       // op2: rd
05343       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05344       op2 &= (1<<5) - 1;
05345       op2 <<= 25;
05346       Value |= op2;
05347       Value |= getValueBit(op0, 2) << 18;
05348       Value |= getValueBit(op0, 1) << 12;
05349       Value |= getValueBit(op0, 0) << 11;
05350       break;
05351     }
05352     case V9::MOVGEi: {
05353       DEBUG(std::cerr << "Emitting MOVGEi\n");
05354       Value = 2170740736U;
05355 
05356       // op0: cc
05357       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05358       // op1: simm11
05359       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05360       op1 &= (1<<11) - 1;
05361       Value |= op1;
05362       // op2: rd
05363       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05364       op2 &= (1<<5) - 1;
05365       op2 <<= 25;
05366       Value |= op2;
05367       Value |= getValueBit(op0, 2) << 18;
05368       Value |= getValueBit(op0, 1) << 12;
05369       Value |= getValueBit(op0, 0) << 11;
05370       break;
05371     }
05372     case V9::MOVGEr: {
05373       DEBUG(std::cerr << "Emitting MOVGEr\n");
05374       Value = 2170732544U;
05375 
05376       // op0: cc
05377       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05378       // op1: rs2
05379       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05380       op1 &= (1<<5) - 1;
05381       Value |= op1;
05382       // op2: rd
05383       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05384       op2 &= (1<<5) - 1;
05385       op2 <<= 25;
05386       Value |= op2;
05387       Value |= getValueBit(op0, 2) << 18;
05388       Value |= getValueBit(op0, 1) << 12;
05389       Value |= getValueBit(op0, 0) << 11;
05390       break;
05391     }
05392     case V9::MOVGUi: {
05393       DEBUG(std::cerr << "Emitting MOVGUi\n");
05394       Value = 2170757120U;
05395 
05396       // op0: cc
05397       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05398       // op1: simm11
05399       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05400       op1 &= (1<<11) - 1;
05401       Value |= op1;
05402       // op2: rd
05403       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05404       op2 &= (1<<5) - 1;
05405       op2 <<= 25;
05406       Value |= op2;
05407       Value |= getValueBit(op0, 2) << 18;
05408       Value |= getValueBit(op0, 1) << 12;
05409       Value |= getValueBit(op0, 0) << 11;
05410       break;
05411     }
05412     case V9::MOVGUr: {
05413       DEBUG(std::cerr << "Emitting MOVGUr\n");
05414       Value = 2170748928U;
05415 
05416       // op0: cc
05417       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05418       // op1: rs2
05419       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05420       op1 &= (1<<5) - 1;
05421       Value |= op1;
05422       // op2: rd
05423       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05424       op2 &= (1<<5) - 1;
05425       op2 <<= 25;
05426       Value |= op2;
05427       Value |= getValueBit(op0, 2) << 18;
05428       Value |= getValueBit(op0, 1) << 12;
05429       Value |= getValueBit(op0, 0) << 11;
05430       break;
05431     }
05432     case V9::MOVGi: {
05433       DEBUG(std::cerr << "Emitting MOVGi\n");
05434       Value = 2170724352U;
05435 
05436       // op0: cc
05437       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05438       // op1: simm11
05439       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05440       op1 &= (1<<11) - 1;
05441       Value |= op1;
05442       // op2: rd
05443       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05444       op2 &= (1<<5) - 1;
05445       op2 <<= 25;
05446       Value |= op2;
05447       Value |= getValueBit(op0, 2) << 18;
05448       Value |= getValueBit(op0, 1) << 12;
05449       Value |= getValueBit(op0, 0) << 11;
05450       break;
05451     }
05452     case V9::MOVGr: {
05453       DEBUG(std::cerr << "Emitting MOVGr\n");
05454       Value = 2170716160U;
05455 
05456       // op0: cc
05457       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05458       // op1: rs2
05459       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05460       op1 &= (1<<5) - 1;
05461       Value |= op1;
05462       // op2: rd
05463       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05464       op2 &= (1<<5) - 1;
05465       op2 <<= 25;
05466       Value |= op2;
05467       Value |= getValueBit(op0, 2) << 18;
05468       Value |= getValueBit(op0, 1) << 12;
05469       Value |= getValueBit(op0, 0) << 11;
05470       break;
05471     }
05472     case V9::MOVLEUi: {
05473       DEBUG(std::cerr << "Emitting MOVLEUi\n");
05474       Value = 2170626048U;
05475 
05476       // op0: cc
05477       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05478       // op1: simm11
05479       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05480       op1 &= (1<<11) - 1;
05481       Value |= op1;
05482       // op2: rd
05483       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05484       op2 &= (1<<5) - 1;
05485       op2 <<= 25;
05486       Value |= op2;
05487       Value |= getValueBit(op0, 2) << 18;
05488       Value |= getValueBit(op0, 1) << 12;
05489       Value |= getValueBit(op0, 0) << 11;
05490       break;
05491     }
05492     case V9::MOVLEUr: {
05493       DEBUG(std::cerr << "Emitting MOVLEUr\n");
05494       Value = 2170617856U;
05495 
05496       // op0: cc
05497       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05498       // op1: rs2
05499       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05500       op1 &= (1<<5) - 1;
05501       Value |= op1;
05502       // op2: rd
05503       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05504       op2 &= (1<<5) - 1;
05505       op2 <<= 25;
05506       Value |= op2;
05507       Value |= getValueBit(op0, 2) << 18;
05508       Value |= getValueBit(op0, 1) << 12;
05509       Value |= getValueBit(op0, 0) << 11;
05510       break;
05511     }
05512     case V9::MOVLEi: {
05513       DEBUG(std::cerr << "Emitting MOVLEi\n");
05514       Value = 2170593280U;
05515 
05516       // op0: cc
05517       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05518       // op1: simm11
05519       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05520       op1 &= (1<<11) - 1;
05521       Value |= op1;
05522       // op2: rd
05523       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05524       op2 &= (1<<5) - 1;
05525       op2 <<= 25;
05526       Value |= op2;
05527       Value |= getValueBit(op0, 2) << 18;
05528       Value |= getValueBit(op0, 1) << 12;
05529       Value |= getValueBit(op0, 0) << 11;
05530       break;
05531     }
05532     case V9::MOVLEr: {
05533       DEBUG(std::cerr << "Emitting MOVLEr\n");
05534       Value = 2170585088U;
05535 
05536       // op0: cc
05537       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05538       // op1: rs2
05539       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05540       op1 &= (1<<5) - 1;
05541       Value |= op1;
05542       // op2: rd
05543       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05544       op2 &= (1<<5) - 1;
05545       op2 <<= 25;
05546       Value |= op2;
05547       Value |= getValueBit(op0, 2) << 18;
05548       Value |= getValueBit(op0, 1) << 12;
05549       Value |= getValueBit(op0, 0) << 11;
05550       break;
05551     }
05552     case V9::MOVLi: {
05553       DEBUG(std::cerr << "Emitting MOVLi\n");
05554       Value = 2170609664U;
05555 
05556       // op0: cc
05557       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05558       // op1: simm11
05559       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05560       op1 &= (1<<11) - 1;
05561       Value |= op1;
05562       // op2: rd
05563       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05564       op2 &= (1<<5) - 1;
05565       op2 <<= 25;
05566       Value |= op2;
05567       Value |= getValueBit(op0, 2) << 18;
05568       Value |= getValueBit(op0, 1) << 12;
05569       Value |= getValueBit(op0, 0) << 11;
05570       break;
05571     }
05572     case V9::MOVLr: {
05573       DEBUG(std::cerr << "Emitting MOVLr\n");
05574       Value = 2170601472U;
05575 
05576       // op0: cc
05577       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05578       // op1: rs2
05579       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05580       op1 &= (1<<5) - 1;
05581       Value |= op1;
05582       // op2: rd
05583       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05584       op2 &= (1<<5) - 1;
05585       op2 <<= 25;
05586       Value |= op2;
05587       Value |= getValueBit(op0, 2) << 18;
05588       Value |= getValueBit(op0, 1) << 12;
05589       Value |= getValueBit(op0, 0) << 11;
05590       break;
05591     }
05592     case V9::MOVNEGi: {
05593       DEBUG(std::cerr << "Emitting MOVNEGi\n");
05594       Value = 2170658816U;
05595 
05596       // op0: cc
05597       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05598       // op1: simm11
05599       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05600       op1 &= (1<<11) - 1;
05601       Value |= op1;
05602       // op2: rd
05603       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05604       op2 &= (1<<5) - 1;
05605       op2 <<= 25;
05606       Value |= op2;
05607       Value |= getValueBit(op0, 2) << 18;
05608       Value |= getValueBit(op0, 1) << 12;
05609       Value |= getValueBit(op0, 0) << 11;
05610       break;
05611     }
05612     case V9::MOVNEGr: {
05613       DEBUG(std::cerr << "Emitting MOVNEGr\n");
05614       Value = 2170650624U;
05615 
05616       // op0: cc
05617       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05618       // op1: rs2
05619       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05620       op1 &= (1<<5) - 1;
05621       Value |= op1;
05622       // op2: rd
05623       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05624       op2 &= (1<<5) - 1;
05625       op2 <<= 25;
05626       Value |= op2;
05627       Value |= getValueBit(op0, 2) << 18;
05628       Value |= getValueBit(op0, 1) << 12;
05629       Value |= getValueBit(op0, 0) << 11;
05630       break;
05631     }
05632     case V9::MOVNEi: {
05633       DEBUG(std::cerr << "Emitting MOVNEi\n");
05634       Value = 2170707968U;
05635 
05636       // op0: cc
05637       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05638       // op1: simm11
05639       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05640       op1 &= (1<<11) - 1;
05641       Value |= op1;
05642       // op2: rd
05643       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05644       op2 &= (1<<5) - 1;
05645       op2 <<= 25;
05646       Value |= op2;
05647       Value |= getValueBit(op0, 2) << 18;
05648       Value |= getValueBit(op0, 1) << 12;
05649       Value |= getValueBit(op0, 0) << 11;
05650       break;
05651     }
05652     case V9::MOVNEr: {
05653       DEBUG(std::cerr << "Emitting MOVNEr\n");
05654       Value = 2170699776U;
05655 
05656       // op0: cc
05657       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05658       // op1: rs2
05659       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05660       op1 &= (1<<5) - 1;
05661       Value |= op1;
05662       // op2: rd
05663       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05664       op2 &= (1<<5) - 1;
05665       op2 <<= 25;
05666       Value |= op2;
05667       Value |= getValueBit(op0, 2) << 18;
05668       Value |= getValueBit(op0, 1) << 12;
05669       Value |= getValueBit(op0, 0) << 11;
05670       break;
05671     }
05672     case V9::MOVNi: {
05673       DEBUG(std::cerr << "Emitting MOVNi\n");
05674       Value = 2170560512U;
05675 
05676       // op0: cc
05677       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05678       // op1: simm11
05679       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05680       op1 &= (1<<11) - 1;
05681       Value |= op1;
05682       // op2: rd
05683       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05684       op2 &= (1<<5) - 1;
05685       op2 <<= 25;
05686       Value |= op2;
05687       Value |= getValueBit(op0, 2) << 18;
05688       Value |= getValueBit(op0, 1) << 12;
05689       Value |= getValueBit(op0, 0) << 11;
05690       break;
05691     }
05692     case V9::MOVNr: {
05693       DEBUG(std::cerr << "Emitting MOVNr\n");
05694       Value = 2170552320U;
05695 
05696       // op0: cc
05697       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05698       // op1: rs2
05699       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05700       op1 &= (1<<5) - 1;
05701       Value |= op1;
05702       // op2: rd
05703       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05704       op2 &= (1<<5) - 1;
05705       op2 <<= 25;
05706       Value |= op2;
05707       Value |= getValueBit(op0, 2) << 18;
05708       Value |= getValueBit(op0, 1) << 12;
05709       Value |= getValueBit(op0, 0) << 11;
05710       break;
05711     }
05712     case V9::MOVPOSi: {
05713       DEBUG(std::cerr << "Emitting MOVPOSi\n");
05714       Value = 2170789888U;
05715 
05716       // op0: cc
05717       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05718       // op1: simm11
05719       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05720       op1 &= (1<<11) - 1;
05721       Value |= op1;
05722       // op2: rd
05723       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05724       op2 &= (1<<5) - 1;
05725       op2 <<= 25;
05726       Value |= op2;
05727       Value |= getValueBit(op0, 2) << 18;
05728       Value |= getValueBit(op0, 1) << 12;
05729       Value |= getValueBit(op0, 0) << 11;
05730       break;
05731     }
05732     case V9::MOVPOSr: {
05733       DEBUG(std::cerr << "Emitting MOVPOSr\n");
05734       Value = 2170781696U;
05735 
05736       // op0: cc
05737       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05738       // op1: rs2
05739       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05740       op1 &= (1<<5) - 1;
05741       Value |= op1;
05742       // op2: rd
05743       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05744       op2 &= (1<<5) - 1;
05745       op2 <<= 25;
05746       Value |= op2;
05747       Value |= getValueBit(op0, 2) << 18;
05748       Value |= getValueBit(op0, 1) << 12;
05749       Value |= getValueBit(op0, 0) << 11;
05750       break;
05751     }
05752     case V9::MOVRGEZi: {
05753       DEBUG(std::cerr << "Emitting MOVRGEZi\n");
05754       Value = 2172140544U;
05755 
05756       // op0: rs1
05757       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05758       op0 &= (1<<5) - 1;
05759       op0 <<= 14;
05760       Value |= op0;
05761       // op1: simm10
05762       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05763       op1 &= (1<<10) - 1;
05764       Value |= op1;
05765       // op2: rd
05766       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05767       op2 &= (1<<5) - 1;
05768       op2 <<= 25;
05769       Value |= op2;
05770       break;
05771     }
05772     case V9::MOVRGEZr: {
05773       DEBUG(std::cerr << "Emitting MOVRGEZr\n");
05774       Value = 2172132352U;
05775 
05776       // op0: rs1
05777       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05778       op0 &= (1<<5) - 1;
05779       op0 <<= 14;
05780       Value |= op0;
05781       // op1: rs2
05782       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05783       op1 &= (1<<5) - 1;
05784       Value |= op1;
05785       // op2: rd
05786       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05787       op2 &= (1<<5) - 1;
05788       op2 <<= 25;
05789       Value |= op2;
05790       break;
05791     }
05792     case V9::MOVRGZi: {
05793       DEBUG(std::cerr << "Emitting MOVRGZi\n");
05794       Value = 2172139520U;
05795 
05796       // op0: rs1
05797       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05798       op0 &= (1<<5) - 1;
05799       op0 <<= 14;
05800       Value |= op0;
05801       // op1: simm10
05802       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05803       op1 &= (1<<10) - 1;
05804       Value |= op1;
05805       // op2: rd
05806       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05807       op2 &= (1<<5) - 1;
05808       op2 <<= 25;
05809       Value |= op2;
05810       break;
05811     }
05812     case V9::MOVRGZr: {
05813       DEBUG(std::cerr << "Emitting MOVRGZr\n");
05814       Value = 2172131328U;
05815 
05816       // op0: rs1
05817       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05818       op0 &= (1<<5) - 1;
05819       op0 <<= 14;
05820       Value |= op0;
05821       // op1: rs2
05822       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05823       op1 &= (1<<5) - 1;
05824       Value |= op1;
05825       // op2: rd
05826       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05827       op2 &= (1<<5) - 1;
05828       op2 <<= 25;
05829       Value |= op2;
05830       break;
05831     }
05832     case V9::MOVRLEZi: {
05833       DEBUG(std::cerr << "Emitting MOVRLEZi\n");
05834       Value = 2172135424U;
05835 
05836       // op0: rs1
05837       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05838       op0 &= (1<<5) - 1;
05839       op0 <<= 14;
05840       Value |= op0;
05841       // op1: simm10
05842       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05843       op1 &= (1<<10) - 1;
05844       Value |= op1;
05845       // op2: rd
05846       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05847       op2 &= (1<<5) - 1;
05848       op2 <<= 25;
05849       Value |= op2;
05850       break;
05851     }
05852     case V9::MOVRLEZr: {
05853       DEBUG(std::cerr << "Emitting MOVRLEZr\n");
05854       Value = 2172127232U;
05855 
05856       // op0: rs1
05857       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05858       op0 &= (1<<5) - 1;
05859       op0 <<= 14;
05860       Value |= op0;
05861       // op1: rs2
05862       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05863       op1 &= (1<<5) - 1;
05864       Value |= op1;
05865       // op2: rd
05866       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05867       op2 &= (1<<5) - 1;
05868       op2 <<= 25;
05869       Value |= op2;
05870       break;
05871     }
05872     case V9::MOVRLZi: {
05873       DEBUG(std::cerr << "Emitting MOVRLZi\n");
05874       Value = 2172136448U;
05875 
05876       // op0: rs1
05877       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05878       op0 &= (1<<5) - 1;
05879       op0 <<= 14;
05880       Value |= op0;
05881       // op1: simm10
05882       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05883       op1 &= (1<<10) - 1;
05884       Value |= op1;
05885       // op2: rd
05886       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05887       op2 &= (1<<5) - 1;
05888       op2 <<= 25;
05889       Value |= op2;
05890       break;
05891     }
05892     case V9::MOVRLZr: {
05893       DEBUG(std::cerr << "Emitting MOVRLZr\n");
05894       Value = 2172128256U;
05895 
05896       // op0: rs1
05897       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05898       op0 &= (1<<5) - 1;
05899       op0 <<= 14;
05900       Value |= op0;
05901       // op1: rs2
05902       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05903       op1 &= (1<<5) - 1;
05904       Value |= op1;
05905       // op2: rd
05906       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05907       op2 &= (1<<5) - 1;
05908       op2 <<= 25;
05909       Value |= op2;
05910       break;
05911     }
05912     case V9::MOVRNZi: {
05913       DEBUG(std::cerr << "Emitting MOVRNZi\n");
05914       Value = 2172138496U;
05915 
05916       // op0: rs1
05917       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05918       op0 &= (1<<5) - 1;
05919       op0 <<= 14;
05920       Value |= op0;
05921       // op1: simm10
05922       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05923       op1 &= (1<<10) - 1;
05924       Value |= op1;
05925       // op2: rd
05926       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05927       op2 &= (1<<5) - 1;
05928       op2 <<= 25;
05929       Value |= op2;
05930       break;
05931     }
05932     case V9::MOVRNZr: {
05933       DEBUG(std::cerr << "Emitting MOVRNZr\n");
05934       Value = 2172130304U;
05935 
05936       // op0: rs1
05937       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05938       op0 &= (1<<5) - 1;
05939       op0 <<= 14;
05940       Value |= op0;
05941       // op1: rs2
05942       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05943       op1 &= (1<<5) - 1;
05944       Value |= op1;
05945       // op2: rd
05946       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05947       op2 &= (1<<5) - 1;
05948       op2 <<= 25;
05949       Value |= op2;
05950       break;
05951     }
05952     case V9::MOVRZi: {
05953       DEBUG(std::cerr << "Emitting MOVRZi\n");
05954       Value = 2172134400U;
05955 
05956       // op0: rs1
05957       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05958       op0 &= (1<<5) - 1;
05959       op0 <<= 14;
05960       Value |= op0;
05961       // op1: simm10
05962       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05963       op1 &= (1<<10) - 1;
05964       Value |= op1;
05965       // op2: rd
05966       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05967       op2 &= (1<<5) - 1;
05968       op2 <<= 25;
05969       Value |= op2;
05970       break;
05971     }
05972     case V9::MOVRZr: {
05973       DEBUG(std::cerr << "Emitting MOVRZr\n");
05974       Value = 2172126208U;
05975 
05976       // op0: rs1
05977       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05978       op0 &= (1<<5) - 1;
05979       op0 <<= 14;
05980       Value |= op0;
05981       // op1: rs2
05982       int op1 = getMachineOpValue(MI, MI.getOperand(1));
05983       op1 &= (1<<5) - 1;
05984       Value |= op1;
05985       // op2: rd
05986       int op2 = getMachineOpValue(MI, MI.getOperand(2));
05987       op2 &= (1<<5) - 1;
05988       op2 <<= 25;
05989       Value |= op2;
05990       break;
05991     }
05992     case V9::MOVVCi: {
05993       DEBUG(std::cerr << "Emitting MOVVCi\n");
05994       Value = 2170806272U;
05995 
05996       // op0: cc
05997       int op0 = getMachineOpValue(MI, MI.getOperand(0));
05998       // op1: simm11
05999       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06000       op1 &= (1<<11) - 1;
06001       Value |= op1;
06002       // op2: rd
06003       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06004       op2 &= (1<<5) - 1;
06005       op2 <<= 25;
06006       Value |= op2;
06007       Value |= getValueBit(op0, 2) << 18;
06008       Value |= getValueBit(op0, 1) << 12;
06009       Value |= getValueBit(op0, 0) << 11;
06010       break;
06011     }
06012     case V9::MOVVCr: {
06013       DEBUG(std::cerr << "Emitting MOVVCr\n");
06014       Value = 2170798080U;
06015 
06016       // op0: cc
06017       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06018       // op1: rs2
06019       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06020       op1 &= (1<<5) - 1;
06021       Value |= op1;
06022       // op2: rd
06023       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06024       op2 &= (1<<5) - 1;
06025       op2 <<= 25;
06026       Value |= op2;
06027       Value |= getValueBit(op0, 2) << 18;
06028       Value |= getValueBit(op0, 1) << 12;
06029       Value |= getValueBit(op0, 0) << 11;
06030       break;
06031     }
06032     case V9::MOVVSi: {
06033       DEBUG(std::cerr << "Emitting MOVVSi\n");
06034       Value = 2170675200U;
06035 
06036       // op0: cc
06037       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06038       // op1: simm11
06039       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06040       op1 &= (1<<11) - 1;
06041       Value |= op1;
06042       // op2: rd
06043       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06044       op2 &= (1<<5) - 1;
06045       op2 <<= 25;
06046       Value |= op2;
06047       Value |= getValueBit(op0, 2) << 18;
06048       Value |= getValueBit(op0, 1) << 12;
06049       Value |= getValueBit(op0, 0) << 11;
06050       break;
06051     }
06052     case V9::MOVVSr: {
06053       DEBUG(std::cerr << "Emitting MOVVSr\n");
06054       Value = 2170667008U;
06055 
06056       // op0: cc
06057       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06058       // op1: rs2
06059       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06060       op1 &= (1<<5) - 1;
06061       Value |= op1;
06062       // op2: rd
06063       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06064       op2 &= (1<<5) - 1;
06065       op2 <<= 25;
06066       Value |= op2;
06067       Value |= getValueBit(op0, 2) << 18;
06068       Value |= getValueBit(op0, 1) << 12;
06069       Value |= getValueBit(op0, 0) << 11;
06070       break;
06071     }
06072     case V9::MULXi: {
06073       DEBUG(std::cerr << "Emitting MULXi\n");
06074       Value = 2152210432U;
06075 
06076       // op0: rs1
06077       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06078       op0 &= (1<<5) - 1;
06079       op0 <<= 14;
06080       Value |= op0;
06081       // op1: simm13
06082       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06083       op1 &= (1<<13) - 1;
06084       Value |= op1;
06085       // op2: rd
06086       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06087       op2 &= (1<<5) - 1;
06088       op2 <<= 25;
06089       Value |= op2;
06090       break;
06091     }
06092     case V9::MULXr: {
06093       DEBUG(std::cerr << "Emitting MULXr\n");
06094       Value = 2152202240U;
06095 
06096       // op0: rs1
06097       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06098       op0 &= (1<<5) - 1;
06099       op0 <<= 14;
06100       Value |= op0;
06101       // op1: rs2
06102       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06103       op1 &= (1<<5) - 1;
06104       Value |= op1;
06105       // op2: rd
06106       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06107       op2 &= (1<<5) - 1;
06108       op2 <<= 25;
06109       Value |= op2;
06110       break;
06111     }
06112     case V9::NOP: {
06113       DEBUG(std::cerr << "Emitting NOP\n");
06114       Value = 16777216U;
06115 
06116       break;
06117     }
06118     case V9::ORNcci: {
06119       DEBUG(std::cerr << "Emitting ORNcci\n");
06120       Value = 2159026176U;
06121 
06122       // op0: rs1
06123       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06124       op0 &= (1<<5) - 1;
06125       op0 <<= 14;
06126       Value |= op0;
06127       // op1: simm13
06128       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06129       op1 &= (1<<13) - 1;
06130       Value |= op1;
06131       // op2: rd
06132       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06133       op2 &= (1<<5) - 1;
06134       op2 <<= 25;
06135       Value |= op2;
06136       break;
06137     }
06138     case V9::ORNccr: {
06139       DEBUG(std::cerr << "Emitting ORNccr\n");
06140       Value = 2159017984U;
06141 
06142       // op0: rs1
06143       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06144       op0 &= (1<<5) - 1;
06145       op0 <<= 14;
06146       Value |= op0;
06147       // op1: rs2
06148       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06149       op1 &= (1<<5) - 1;
06150       Value |= op1;
06151       // op2: rd
06152       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06153       op2 &= (1<<5) - 1;
06154       op2 <<= 25;
06155       Value |= op2;
06156       break;
06157     }
06158     case V9::ORNi: {
06159       DEBUG(std::cerr << "Emitting ORNi\n");
06160       Value = 2150637568U;
06161 
06162       // op0: rs1
06163       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06164       op0 &= (1<<5) - 1;
06165       op0 <<= 14;
06166       Value |= op0;
06167       // op1: simm13
06168       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06169       op1 &= (1<<13) - 1;
06170       Value |= op1;
06171       // op2: rd
06172       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06173       op2 &= (1<<5) - 1;
06174       op2 <<= 25;
06175       Value |= op2;
06176       break;
06177     }
06178     case V9::ORNr: {
06179       DEBUG(std::cerr << "Emitting ORNr\n");
06180       Value = 2150629376U;
06181 
06182       // op0: rs1
06183       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06184       op0 &= (1<<5) - 1;
06185       op0 <<= 14;
06186       Value |= op0;
06187       // op1: rs2
06188       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06189       op1 &= (1<<5) - 1;
06190       Value |= op1;
06191       // op2: rd
06192       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06193       op2 &= (1<<5) - 1;
06194       op2 <<= 25;
06195       Value |= op2;
06196       break;
06197     }
06198     case V9::ORcci: {
06199       DEBUG(std::cerr << "Emitting ORcci\n");
06200       Value = 2156929024U;
06201 
06202       // op0: rs1
06203       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06204       op0 &= (1<<5) - 1;
06205       op0 <<= 14;
06206       Value |= op0;
06207       // op1: simm13
06208       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06209       op1 &= (1<<13) - 1;
06210       Value |= op1;
06211       // op2: rd
06212       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06213       op2 &= (1<<5) - 1;
06214       op2 <<= 25;
06215       Value |= op2;
06216       break;
06217     }
06218     case V9::ORccr: {
06219       DEBUG(std::cerr << "Emitting ORccr\n");
06220       Value = 2156920832U;
06221 
06222       // op0: rs1
06223       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06224       op0 &= (1<<5) - 1;
06225       op0 <<= 14;
06226       Value |= op0;
06227       // op1: rs2
06228       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06229       op1 &= (1<<5) - 1;
06230       Value |= op1;
06231       // op2: rd
06232       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06233       op2 &= (1<<5) - 1;
06234       op2 <<= 25;
06235       Value |= op2;
06236       break;
06237     }
06238     case V9::ORi: {
06239       DEBUG(std::cerr << "Emitting ORi\n");
06240       Value = 2148540416U;
06241 
06242       // op0: rs1
06243       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06244       op0 &= (1<<5) - 1;
06245       op0 <<= 14;
06246       Value |= op0;
06247       // op1: simm13
06248       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06249       op1 &= (1<<13) - 1;
06250       Value |= op1;
06251       // op2: rd
06252       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06253       op2 &= (1<<5) - 1;
06254       op2 <<= 25;
06255       Value |= op2;
06256       break;
06257     }
06258     case V9::ORr: {
06259       DEBUG(std::cerr << "Emitting ORr\n");
06260       Value = 2148532224U;
06261 
06262       // op0: rs1
06263       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06264       op0 &= (1<<5) - 1;
06265       op0 <<= 14;
06266       Value |= op0;
06267       // op1: rs2
06268       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06269       op1 &= (1<<5) - 1;
06270       Value |= op1;
06271       // op2: rd
06272       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06273       op2 &= (1<<5) - 1;
06274       op2 <<= 25;
06275       Value |= op2;
06276       break;
06277     }
06278     case V9::RDCCR: {
06279       DEBUG(std::cerr << "Emitting RDCCR\n");
06280       Value = 2168487936U;
06281 
06282       // op0: rd
06283       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06284       op0 &= (1<<5) - 1;
06285       op0 <<= 25;
06286       Value |= op0;
06287       break;
06288     }
06289     case V9::RESTOREi: {
06290       DEBUG(std::cerr << "Emitting RESTOREi\n");
06291       Value = 2179473408U;
06292 
06293       // op0: rs1
06294       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06295       op0 &= (1<<5) - 1;
06296       op0 <<= 14;
06297       Value |= op0;
06298       // op1: simm13
06299       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06300       op1 &= (1<<13) - 1;
06301       Value |= op1;
06302       // op2: rd
06303       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06304       op2 &= (1<<5) - 1;
06305       op2 <<= 25;
06306       Value |= op2;
06307       break;
06308     }
06309     case V9::RESTOREr: {
06310       DEBUG(std::cerr << "Emitting RESTOREr\n");
06311       Value = 2179465216U;
06312 
06313       // op0: rs1
06314       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06315       op0 &= (1<<5) - 1;
06316       op0 <<= 14;
06317       Value |= op0;
06318       // op1: rs2
06319       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06320       op1 &= (1<<5) - 1;
06321       Value |= op1;
06322       // op2: rd
06323       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06324       op2 &= (1<<5) - 1;
06325       op2 <<= 25;
06326       Value |= op2;
06327       break;
06328     }
06329     case V9::SAVEi: {
06330       DEBUG(std::cerr << "Emitting SAVEi\n");
06331       Value = 2178949120U;
06332 
06333       // op0: rs1
06334       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06335       op0 &= (1<<5) - 1;
06336       op0 <<= 14;
06337       Value |= op0;
06338       // op1: simm13
06339       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06340       op1 &= (1<<13) - 1;
06341       Value |= op1;
06342       // op2: rd
06343       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06344       op2 &= (1<<5) - 1;
06345       op2 <<= 25;
06346       Value |= op2;
06347       break;
06348     }
06349     case V9::SAVEr: {
06350       DEBUG(std::cerr << "Emitting SAVEr\n");
06351       Value = 2178940928U;
06352 
06353       // op0: rs1
06354       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06355       op0 &= (1<<5) - 1;
06356       op0 <<= 14;
06357       Value |= op0;
06358       // op1: rs2
06359       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06360       op1 &= (1<<5) - 1;
06361       Value |= op1;
06362       // op2: rd
06363       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06364       op2 &= (1<<5) - 1;
06365       op2 <<= 25;
06366       Value |= op2;
06367       break;
06368     }
06369     case V9::SDIVXi: {
06370       DEBUG(std::cerr << "Emitting SDIVXi\n");
06371       Value = 2171084800U;
06372 
06373       // op0: rs1
06374       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06375       op0 &= (1<<5) - 1;
06376       op0 <<= 14;
06377       Value |= op0;
06378       // op1: simm13
06379       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06380       op1 &= (1<<13) - 1;
06381       Value |= op1;
06382       // op2: rd
06383       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06384       op2 &= (1<<5) - 1;
06385       op2 <<= 25;
06386       Value |= op2;
06387       break;
06388     }
06389     case V9::SDIVXr: {
06390       DEBUG(std::cerr << "Emitting SDIVXr\n");
06391       Value = 2171076608U;
06392 
06393       // op0: rs1
06394       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06395       op0 &= (1<<5) - 1;
06396       op0 <<= 14;
06397       Value |= op0;
06398       // op1: rs2
06399       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06400       op1 &= (1<<5) - 1;
06401       Value |= op1;
06402       // op2: rd
06403       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06404       op2 &= (1<<5) - 1;
06405       op2 <<= 25;
06406       Value |= op2;
06407       break;
06408     }
06409     case V9::SETHI: {
06410       DEBUG(std::cerr << "Emitting SETHI\n");
06411       Value = 16777216U;
06412 
06413       // op0: imm
06414       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06415       op0 &= (1<<22) - 1;
06416       Value |= op0;
06417       // op1: rd
06418       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06419       op1 &= (1<<5) - 1;
06420       op1 <<= 25;
06421       Value |= op1;
06422       break;
06423     }
06424     case V9::SLLXi6: {
06425       DEBUG(std::cerr << "Emitting SLLXi6\n");
06426       Value = 2166894592U;
06427 
06428       // op0: rs1
06429       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06430       op0 &= (1<<5) - 1;
06431       op0 <<= 14;
06432       Value |= op0;
06433       // op1: shcnt
06434       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06435       op1 &= (1<<6) - 1;
06436       Value |= op1;
06437       // op2: rd
06438       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06439       op2 &= (1<<5) - 1;
06440       op2 <<= 25;
06441       Value |= op2;
06442       break;
06443     }
06444     case V9::SLLXr6: {
06445       DEBUG(std::cerr << "Emitting SLLXr6\n");
06446       Value = 2166886400U;
06447 
06448       // op0: rs1
06449       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06450       op0 &= (1<<5) - 1;
06451       op0 <<= 14;
06452       Value |= op0;
06453       // op1: rs2
06454       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06455       op1 &= (1<<5) - 1;
06456       Value |= op1;
06457       // op2: rd
06458       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06459       op2 &= (1<<5) - 1;
06460       op2 <<= 25;
06461       Value |= op2;
06462       break;
06463     }
06464     case V9::SLLi5: {
06465       DEBUG(std::cerr << "Emitting SLLi5\n");
06466       Value = 2166890496U;
06467 
06468       // op0: rs1
06469       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06470       op0 &= (1<<5) - 1;
06471       op0 <<= 14;
06472       Value |= op0;
06473       // op1: shcnt
06474       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06475       op1 &= (1<<5) - 1;
06476       Value |= op1;
06477       // op2: rd
06478       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06479       op2 &= (1<<5) - 1;
06480       op2 <<= 25;
06481       Value |= op2;
06482       break;
06483     }
06484     case V9::SLLr5: {
06485       DEBUG(std::cerr << "Emitting SLLr5\n");
06486       Value = 2166882304U;
06487 
06488       // op0: rs1
06489       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06490       op0 &= (1<<5) - 1;
06491       op0 <<= 14;
06492       Value |= op0;
06493       // op1: rs2
06494       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06495       op1 &= (1<<5) - 1;
06496       Value |= op1;
06497       // op2: rd
06498       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06499       op2 &= (1<<5) - 1;
06500       op2 <<= 25;
06501       Value |= op2;
06502       break;
06503     }
06504     case V9::SRAXi6: {
06505       DEBUG(std::cerr << "Emitting SRAXi6\n");
06506       Value = 2167943168U;
06507 
06508       // op0: rs1
06509       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06510       op0 &= (1<<5) - 1;
06511       op0 <<= 14;
06512       Value |= op0;
06513       // op1: shcnt
06514       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06515       op1 &= (1<<6) - 1;
06516       Value |= op1;
06517       // op2: rd
06518       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06519       op2 &= (1<<5) - 1;
06520       op2 <<= 25;
06521       Value |= op2;
06522       break;
06523     }
06524     case V9::SRAXr6: {
06525       DEBUG(std::cerr << "Emitting SRAXr6\n");
06526       Value = 2167934976U;
06527 
06528       // op0: rs1
06529       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06530       op0 &= (1<<5) - 1;
06531       op0 <<= 14;
06532       Value |= op0;
06533       // op1: rs2
06534       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06535       op1 &= (1<<5) - 1;
06536       Value |= op1;
06537       // op2: rd
06538       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06539       op2 &= (1<<5) - 1;
06540       op2 <<= 25;
06541       Value |= op2;
06542       break;
06543     }
06544     case V9::SRAi5: {
06545       DEBUG(std::cerr << "Emitting SRAi5\n");
06546       Value = 2167939072U;
06547 
06548       // op0: rs1
06549       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06550       op0 &= (1<<5) - 1;
06551       op0 <<= 14;
06552       Value |= op0;
06553       // op1: shcnt
06554       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06555       op1 &= (1<<5) - 1;
06556       Value |= op1;
06557       // op2: rd
06558       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06559       op2 &= (1<<5) - 1;
06560       op2 <<= 25;
06561       Value |= op2;
06562       break;
06563     }
06564     case V9::SRAr5: {
06565       DEBUG(std::cerr << "Emitting SRAr5\n");
06566       Value = 2167930880U;
06567 
06568       // op0: rs1
06569       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06570       op0 &= (1<<5) - 1;
06571       op0 <<= 14;
06572       Value |= op0;
06573       // op1: rs2
06574       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06575       op1 &= (1<<5) - 1;
06576       Value |= op1;
06577       // op2: rd
06578       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06579       op2 &= (1<<5) - 1;
06580       op2 <<= 25;
06581       Value |= op2;
06582       break;
06583     }
06584     case V9::SRLXi6: {
06585       DEBUG(std::cerr << "Emitting SRLXi6\n");
06586       Value = 2167418880U;
06587 
06588       // op0: rs1
06589       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06590       op0 &= (1<<5) - 1;
06591       op0 <<= 14;
06592       Value |= op0;
06593       // op1: shcnt
06594       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06595       op1 &= (1<<6) - 1;
06596       Value |= op1;
06597       // op2: rd
06598       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06599       op2 &= (1<<5) - 1;
06600       op2 <<= 25;
06601       Value |= op2;
06602       break;
06603     }
06604     case V9::SRLXr6: {
06605       DEBUG(std::cerr << "Emitting SRLXr6\n");
06606       Value = 2167410688U;
06607 
06608       // op0: rs1
06609       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06610       op0 &= (1<<5) - 1;
06611       op0 <<= 14;
06612       Value |= op0;
06613       // op1: rs2
06614       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06615       op1 &= (1<<5) - 1;
06616       Value |= op1;
06617       // op2: rd
06618       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06619       op2 &= (1<<5) - 1;
06620       op2 <<= 25;
06621       Value |= op2;
06622       break;
06623     }
06624     case V9::SRLi5: {
06625       DEBUG(std::cerr << "Emitting SRLi5\n");
06626       Value = 2167414784U;
06627 
06628       // op0: rs1
06629       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06630       op0 &= (1<<5) - 1;
06631       op0 <<= 14;
06632       Value |= op0;
06633       // op1: shcnt
06634       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06635       op1 &= (1<<5) - 1;
06636       Value |= op1;
06637       // op2: rd
06638       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06639       op2 &= (1<<5) - 1;
06640       op2 <<= 25;
06641       Value |= op2;
06642       break;
06643     }
06644     case V9::SRLr5: {
06645       DEBUG(std::cerr << "Emitting SRLr5\n");
06646       Value = 2167406592U;
06647 
06648       // op0: rs1
06649       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06650       op0 &= (1<<5) - 1;
06651       op0 <<= 14;
06652       Value |= op0;
06653       // op1: rs2
06654       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06655       op1 &= (1<<5) - 1;
06656       Value |= op1;
06657       // op2: rd
06658       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06659       op2 &= (1<<5) - 1;
06660       op2 <<= 25;
06661       Value |= op2;
06662       break;
06663     }
06664     case V9::STBi: {
06665       DEBUG(std::cerr << "Emitting STBi\n");
06666       Value = 3223855104U;
06667 
06668       // op0: rd
06669       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06670       op0 &= (1<<5) - 1;
06671       op0 <<= 25;
06672       Value |= op0;
06673       // op1: rs1
06674       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06675       op1 &= (1<<5) - 1;
06676       op1 <<= 14;
06677       Value |= op1;
06678       // op2: simm13
06679       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06680       op2 &= (1<<13) - 1;
06681       Value |= op2;
06682       break;
06683     }
06684     case V9::STBr: {
06685       DEBUG(std::cerr << "Emitting STBr\n");
06686       Value = 3223846912U;
06687 
06688       // op0: rd
06689       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06690       op0 &= (1<<5) - 1;
06691       op0 <<= 25;
06692       Value |= op0;
06693       // op1: rs1
06694       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06695       op1 &= (1<<5) - 1;
06696       op1 <<= 14;
06697       Value |= op1;
06698       // op2: rs2
06699       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06700       op2 &= (1<<5) - 1;
06701       Value |= op2;
06702       break;
06703     }
06704     case V9::STDFi: {
06705       DEBUG(std::cerr << "Emitting STDFi\n");
06706       Value = 3241680896U;
06707 
06708       // op0: rd
06709       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06710       op0 &= (1<<5) - 1;
06711       op0 <<= 25;
06712       Value |= op0;
06713       // op1: rs1
06714       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06715       op1 &= (1<<5) - 1;
06716       op1 <<= 14;
06717       Value |= op1;
06718       // op2: simm13
06719       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06720       op2 &= (1<<13) - 1;
06721       Value |= op2;
06722       break;
06723     }
06724     case V9::STDFr: {
06725       DEBUG(std::cerr << "Emitting STDFr\n");
06726       Value = 3241672704U;
06727 
06728       // op0: rd
06729       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06730       op0 &= (1<<5) - 1;
06731       op0 <<= 25;
06732       Value |= op0;
06733       // op1: rs1
06734       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06735       op1 &= (1<<5) - 1;
06736       op1 <<= 14;
06737       Value |= op1;
06738       // op2: rs2
06739       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06740       op2 &= (1<<5) - 1;
06741       Value |= op2;
06742       break;
06743     }
06744     case V9::STFi: {
06745       DEBUG(std::cerr << "Emitting STFi\n");
06746       Value = 3240108032U;
06747 
06748       // op0: rd
06749       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06750       op0 &= (1<<5) - 1;
06751       op0 <<= 25;
06752       Value |= op0;
06753       // op1: rs1
06754       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06755       op1 &= (1<<5) - 1;
06756       op1 <<= 14;
06757       Value |= op1;
06758       // op2: simm13
06759       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06760       op2 &= (1<<13) - 1;
06761       Value |= op2;
06762       break;
06763     }
06764     case V9::STFr: {
06765       DEBUG(std::cerr << "Emitting STFr\n");
06766       Value = 3240099840U;
06767 
06768       // op0: rd
06769       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06770       op0 &= (1<<5) - 1;
06771       op0 <<= 25;
06772       Value |= op0;
06773       // op1: rs1
06774       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06775       op1 &= (1<<5) - 1;
06776       op1 <<= 14;
06777       Value |= op1;
06778       // op2: rs2
06779       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06780       op2 &= (1<<5) - 1;
06781       Value |= op2;
06782       break;
06783     }
06784     case V9::STHi: {
06785       DEBUG(std::cerr << "Emitting STHi\n");
06786       Value = 3224379392U;
06787 
06788       // op0: rd
06789       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06790       op0 &= (1<<5) - 1;
06791       op0 <<= 25;
06792       Value |= op0;
06793       // op1: rs1
06794       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06795       op1 &= (1<<5) - 1;
06796       op1 <<= 14;
06797       Value |= op1;
06798       // op2: simm13
06799       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06800       op2 &= (1<<13) - 1;
06801       Value |= op2;
06802       break;
06803     }
06804     case V9::STHr: {
06805       DEBUG(std::cerr << "Emitting STHr\n");
06806       Value = 3224371200U;
06807 
06808       // op0: rd
06809       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06810       op0 &= (1<<5) - 1;
06811       op0 <<= 25;
06812       Value |= op0;
06813       // op1: rs1
06814       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06815       op1 &= (1<<5) - 1;
06816       op1 <<= 14;
06817       Value |= op1;
06818       // op2: rs2
06819       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06820       op2 &= (1<<5) - 1;
06821       Value |= op2;
06822       break;
06823     }
06824     case V9::STWi: {
06825       DEBUG(std::cerr << "Emitting STWi\n");
06826       Value = 3223330816U;
06827 
06828       // op0: rd
06829       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06830       op0 &= (1<<5) - 1;
06831       op0 <<= 25;
06832       Value |= op0;
06833       // op1: rs1
06834       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06835       op1 &= (1<<5) - 1;
06836       op1 <<= 14;
06837       Value |= op1;
06838       // op2: simm13
06839       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06840       op2 &= (1<<13) - 1;
06841       Value |= op2;
06842       break;
06843     }
06844     case V9::STWr: {
06845       DEBUG(std::cerr << "Emitting STWr\n");
06846       Value = 3223322624U;
06847 
06848       // op0: rd
06849       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06850       op0 &= (1<<5) - 1;
06851       op0 <<= 25;
06852       Value |= op0;
06853       // op1: rs1
06854       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06855       op1 &= (1<<5) - 1;
06856       op1 <<= 14;
06857       Value |= op1;
06858       // op2: rs2
06859       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06860       op2 &= (1<<5) - 1;
06861       Value |= op2;
06862       break;
06863     }
06864     case V9::STXFSRi: {
06865       DEBUG(std::cerr << "Emitting STXFSRi\n");
06866       Value = 3240632320U;
06867 
06868       // op0: rd
06869       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06870       op0 &= (1<<5) - 1;
06871       op0 <<= 25;
06872       Value |= op0;
06873       // op1: rs1
06874       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06875       op1 &= (1<<5) - 1;
06876       op1 <<= 14;
06877       Value |= op1;
06878       // op2: simm13
06879       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06880       op2 &= (1<<13) - 1;
06881       Value |= op2;
06882       break;
06883     }
06884     case V9::STXFSRr: {
06885       DEBUG(std::cerr << "Emitting STXFSRr\n");
06886       Value = 3240624128U;
06887 
06888       // op0: rd
06889       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06890       op0 &= (1<<5) - 1;
06891       op0 <<= 25;
06892       Value |= op0;
06893       // op1: rs1
06894       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06895       op1 &= (1<<5) - 1;
06896       op1 <<= 14;
06897       Value |= op1;
06898       // op2: rs2
06899       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06900       op2 &= (1<<5) - 1;
06901       Value |= op2;
06902       break;
06903     }
06904     case V9::STXi: {
06905       DEBUG(std::cerr << "Emitting STXi\n");
06906       Value = 3228573696U;
06907 
06908       // op0: rd
06909       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06910       op0 &= (1<<5) - 1;
06911       op0 <<= 25;
06912       Value |= op0;
06913       // op1: rs1
06914       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06915       op1 &= (1<<5) - 1;
06916       op1 <<= 14;
06917       Value |= op1;
06918       // op2: simm13
06919       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06920       op2 &= (1<<13) - 1;
06921       Value |= op2;
06922       break;
06923     }
06924     case V9::STXr: {
06925       DEBUG(std::cerr << "Emitting STXr\n");
06926       Value = 3228565504U;
06927 
06928       // op0: rd
06929       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06930       op0 &= (1<<5) - 1;
06931       op0 <<= 25;
06932       Value |= op0;
06933       // op1: rs1
06934       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06935       op1 &= (1<<5) - 1;
06936       op1 <<= 14;
06937       Value |= op1;
06938       // op2: rs2
06939       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06940       op2 &= (1<<5) - 1;
06941       Value |= op2;
06942       break;
06943     }
06944     case V9::SUBCcci: {
06945       DEBUG(std::cerr << "Emitting SUBCcci\n");
06946       Value = 2162171904U;
06947 
06948       // op0: rs1
06949       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06950       op0 &= (1<<5) - 1;
06951       op0 <<= 14;
06952       Value |= op0;
06953       // op1: simm13
06954       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06955       op1 &= (1<<13) - 1;
06956       Value |= op1;
06957       // op2: rd
06958       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06959       op2 &= (1<<5) - 1;
06960       op2 <<= 25;
06961       Value |= op2;
06962       break;
06963     }
06964     case V9::SUBCccr: {
06965       DEBUG(std::cerr << "Emitting SUBCccr\n");
06966       Value = 2162163712U;
06967 
06968       // op0: rs1
06969       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06970       op0 &= (1<<5) - 1;
06971       op0 <<= 14;
06972       Value |= op0;
06973       // op1: rs2
06974       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06975       op1 &= (1<<5) - 1;
06976       Value |= op1;
06977       // op2: rd
06978       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06979       op2 &= (1<<5) - 1;
06980       op2 <<= 25;
06981       Value |= op2;
06982       break;
06983     }
06984     case V9::SUBCi: {
06985       DEBUG(std::cerr << "Emitting SUBCi\n");
06986       Value = 2153783296U;
06987 
06988       // op0: rs1
06989       int op0 = getMachineOpValue(MI, MI.getOperand(0));
06990       op0 &= (1<<5) - 1;
06991       op0 <<= 14;
06992       Value |= op0;
06993       // op1: simm13
06994       int op1 = getMachineOpValue(MI, MI.getOperand(1));
06995       op1 &= (1<<13) - 1;
06996       Value |= op1;
06997       // op2: rd
06998       int op2 = getMachineOpValue(MI, MI.getOperand(2));
06999       op2 &= (1<<5) - 1;
07000       op2 <<= 25;
07001       Value |= op2;
07002       break;
07003     }
07004     case V9::SUBCr: {
07005       DEBUG(std::cerr << "Emitting SUBCr\n");
07006       Value = 2153775104U;
07007 
07008       // op0: rs1
07009       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07010       op0 &= (1<<5) - 1;
07011       op0 <<= 14;
07012       Value |= op0;
07013       // op1: rs2
07014       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07015       op1 &= (1<<5) - 1;
07016       Value |= op1;
07017       // op2: rd
07018       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07019       op2 &= (1<<5) - 1;
07020       op2 <<= 25;
07021       Value |= op2;
07022       break;
07023     }
07024     case V9::SUBcci: {
07025       DEBUG(std::cerr << "Emitting SUBcci\n");
07026       Value = 2157977600U;
07027 
07028       // op0: rs1
07029       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07030       op0 &= (1<<5) - 1;
07031       op0 <<= 14;
07032       Value |= op0;
07033       // op1: simm13
07034       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07035       op1 &= (1<<13) - 1;
07036       Value |= op1;
07037       // op2: rd
07038       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07039       op2 &= (1<<5) - 1;
07040       op2 <<= 25;
07041       Value |= op2;
07042       break;
07043     }
07044     case V9::SUBccr: {
07045       DEBUG(std::cerr << "Emitting SUBccr\n");
07046       Value = 2157969408U;
07047 
07048       // op0: rs1
07049       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07050       op0 &= (1<<5) - 1;
07051       op0 <<= 14;
07052       Value |= op0;
07053       // op1: rs2
07054       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07055       op1 &= (1<<5) - 1;
07056       Value |= op1;
07057       // op2: rd
07058       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07059       op2 &= (1<<5) - 1;
07060       op2 <<= 25;
07061       Value |= op2;
07062       break;
07063     }
07064     case V9::SUBi: {
07065       DEBUG(std::cerr << "Emitting SUBi\n");
07066       Value = 2149588992U;
07067 
07068       // op0: rs1
07069       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07070       op0 &= (1<<5) - 1;
07071       op0 <<= 14;
07072       Value |= op0;
07073       // op1: simm13
07074       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07075       op1 &= (1<<13) - 1;
07076       Value |= op1;
07077       // op2: rd
07078       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07079       op2 &= (1<<5) - 1;
07080       op2 <<= 25;
07081       Value |= op2;
07082       break;
07083     }
07084     case V9::SUBr: {
07085       DEBUG(std::cerr << "Emitting SUBr\n");
07086       Value = 2149580800U;
07087 
07088       // op0: rs1
07089       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07090       op0 &= (1<<5) - 1;
07091       op0 <<= 14;
07092       Value |= op0;
07093       // op1: rs2
07094       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07095       op1 &= (1<<5) - 1;
07096       Value |= op1;
07097       // op2: rd
07098       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07099       op2 &= (1<<5) - 1;
07100       op2 <<= 25;
07101       Value |= op2;
07102       break;
07103     }
07104     case V9::UDIVXi: {
07105       DEBUG(std::cerr << "Emitting UDIVXi\n");
07106       Value = 2154307584U;
07107 
07108       // op0: rs1
07109       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07110       op0 &= (1<<5) - 1;
07111       op0 <<= 14;
07112       Value |= op0;
07113       // op1: simm13
07114       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07115       op1 &= (1<<13) - 1;
07116       Value |= op1;
07117       // op2: rd
07118       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07119       op2 &= (1<<5) - 1;
07120       op2 <<= 25;
07121       Value |= op2;
07122       break;
07123     }
07124     case V9::UDIVXr: {
07125       DEBUG(std::cerr << "Emitting UDIVXr\n");
07126       Value = 2154299392U;
07127 
07128       // op0: rs1
07129       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07130       op0 &= (1<<5) - 1;
07131       op0 <<= 14;
07132       Value |= op0;
07133       // op1: rs2
07134       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07135       op1 &= (1<<5) - 1;
07136       Value |= op1;
07137       // op2: rd
07138       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07139       op2 &= (1<<5) - 1;
07140       op2 <<= 25;
07141       Value |= op2;
07142       break;
07143     }
07144     case V9::WRCCRi: {
07145       DEBUG(std::cerr << "Emitting WRCCRi\n");
07146       Value = 2239766528U;
07147 
07148       // op0: rs1
07149       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07150       op0 &= (1<<5) - 1;
07151       op0 <<= 14;
07152       Value |= op0;
07153       // op1: simm13
07154       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07155       op1 &= (1<<13) - 1;
07156       Value |= op1;
07157       break;
07158     }
07159     case V9::WRCCRr: {
07160       DEBUG(std::cerr << "Emitting WRCCRr\n");
07161       Value = 2239758336U;
07162 
07163       // op0: rs1
07164       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07165       op0 &= (1<<5) - 1;
07166       op0 <<= 14;
07167       Value |= op0;
07168       // op1: rs2
07169       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07170       op1 &= (1<<5) - 1;
07171       Value |= op1;
07172       break;
07173     }
07174     case V9::XNORcci: {
07175       DEBUG(std::cerr << "Emitting XNORcci\n");
07176       Value = 2159550464U;
07177 
07178       // op0: rs1
07179       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07180       op0 &= (1<<5) - 1;
07181       op0 <<= 14;
07182       Value |= op0;
07183       // op1: simm13
07184       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07185       op1 &= (1<<13) - 1;
07186       Value |= op1;
07187       // op2: rd
07188       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07189       op2 &= (1<<5) - 1;
07190       op2 <<= 25;
07191       Value |= op2;
07192       break;
07193     }
07194     case V9::XNORccr: {
07195       DEBUG(std::cerr << "Emitting XNORccr\n");
07196       Value = 2159542272U;
07197 
07198       // op0: rs1
07199       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07200       op0 &= (1<<5) - 1;
07201       op0 <<= 14;
07202       Value |= op0;
07203       // op1: rs2
07204       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07205       op1 &= (1<<5) - 1;
07206       Value |= op1;
07207       // op2: rd
07208       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07209       op2 &= (1<<5) - 1;
07210       op2 <<= 25;
07211       Value |= op2;
07212       break;
07213     }
07214     case V9::XNORi: {
07215       DEBUG(std::cerr << "Emitting XNORi\n");
07216       Value = 2151161856U;
07217 
07218       // op0: rs1
07219       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07220       op0 &= (1<<5) - 1;
07221       op0 <<= 14;
07222       Value |= op0;
07223       // op1: simm13
07224       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07225       op1 &= (1<<13) - 1;
07226       Value |= op1;
07227       // op2: rd
07228       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07229       op2 &= (1<<5) - 1;
07230       op2 <<= 25;
07231       Value |= op2;
07232       break;
07233     }
07234     case V9::XNORr: {
07235       DEBUG(std::cerr << "Emitting XNORr\n");
07236       Value = 2151153664U;
07237 
07238       // op0: rs1
07239       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07240       op0 &= (1<<5) - 1;
07241       op0 <<= 14;
07242       Value |= op0;
07243       // op1: rs2
07244       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07245       op1 &= (1<<5) - 1;
07246       Value |= op1;
07247       // op2: rd
07248       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07249       op2 &= (1<<5) - 1;
07250       op2 <<= 25;
07251       Value |= op2;
07252       break;
07253     }
07254     case V9::XORcci: {
07255       DEBUG(std::cerr << "Emitting XORcci\n");
07256       Value = 2157453312U;
07257 
07258       // op0: rs1
07259       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07260       op0 &= (1<<5) - 1;
07261       op0 <<= 14;
07262       Value |= op0;
07263       // op1: simm13
07264       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07265       op1 &= (1<<13) - 1;
07266       Value |= op1;
07267       // op2: rd
07268       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07269       op2 &= (1<<5) - 1;
07270       op2 <<= 25;
07271       Value |= op2;
07272       break;
07273     }
07274     case V9::XORccr: {
07275       DEBUG(std::cerr << "Emitting XORccr\n");
07276       Value = 2157445120U;
07277 
07278       // op0: rs1
07279       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07280       op0 &= (1<<5) - 1;
07281       op0 <<= 14;
07282       Value |= op0;
07283       // op1: rs2
07284       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07285       op1 &= (1<<5) - 1;
07286       Value |= op1;
07287       // op2: rd
07288       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07289       op2 &= (1<<5) - 1;
07290       op2 <<= 25;
07291       Value |= op2;
07292       break;
07293     }
07294     case V9::XORi: {
07295       DEBUG(std::cerr << "Emitting XORi\n");
07296       Value = 2149064704U;
07297 
07298       // op0: rs1
07299       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07300       op0 &= (1<<5) - 1;
07301       op0 <<= 14;
07302       Value |= op0;
07303       // op1: simm13
07304       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07305       op1 &= (1<<13) - 1;
07306       Value |= op1;
07307       // op2: rd
07308       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07309       op2 &= (1<<5) - 1;
07310       op2 <<= 25;
07311       Value |= op2;
07312       break;
07313     }
07314     case V9::XORr: {
07315       DEBUG(std::cerr << "Emitting XORr\n");
07316       Value = 2149056512U;
07317 
07318       // op0: rs1
07319       int op0 = getMachineOpValue(MI, MI.getOperand(0));
07320       op0 &= (1<<5) - 1;
07321       op0 <<= 14;
07322       Value |= op0;
07323       // op1: rs2
07324       int op1 = getMachineOpValue(MI, MI.getOperand(1));
07325       op1 &= (1<<5) - 1;
07326       Value |= op1;
07327       // op2: rd
07328       int op2 = getMachineOpValue(MI, MI.getOperand(2));
07329       op2 &= (1<<5) - 1;
07330       op2 <<= 25;
07331       Value |= op2;
07332       break;
07333     }
07334   default:
07335     std::cerr << "Not supported instr: " << MI << "\n";
07336     abort();
07337   }
07338   return Value;
07339 }
07340