LLVM API Documentation
Enumerations | |
enum | NodeType { FIRST_NUMBER = ISD::BUILTIN_OP_END+PPC::INSTRUCTION_LIST_END, FSEL, FCFID, FCTIDZ, FCTIWZ, STFIWX, VMADDFP, VNMSUBFP, VPERM, Hi, Lo, GlobalBaseReg, SRL, SRA, SHL, EXTSW_32, STD_32, CALL, RET_FLAG, MFCR, VCMP, VCMPo } |
FIRST_NUMBER | |
FSEL | FSEL - Traditional three-operand fsel node. |
FCFID | FCFID - The FCFID instruction, taking an f64 operand and producing and f64 value containing the FP representation of the integer that was temporarily in the f64 operand. |
FCTIDZ | FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 operand, producing an f64 value containing the integer representation of that FP value. |
FCTIWZ | |
STFIWX | STFIWX - The STFIWX instruction. The first operand is an input token chain, then an f64 value to store, then an address to store it to, then a SRCVALUE for the address. |
VMADDFP | |
VNMSUBFP | |
VPERM | VPERM - The PPC VPERM Instruction. |
Hi | Hi/Lo - These represent the high and low 16-bit parts of a global address respectively. These nodes have two operands, the first of which must be a TargetGlobalAddress, and the second of which must be a Constant. Selected naively, these turn into 'lis G+C' and 'li G+C', though these are usually folded into other nodes. |
Lo | |
GlobalBaseReg | GlobalBaseReg - On Darwin, this node represents the result of the mflr at function entry, used for PIC code. |
SRL | These nodes represent the 32-bit PPC shifts that operate on 6-bit shift amounts. These nodes are generated by the multi-precision shift code. |
SRA | |
SHL | |
EXTSW_32 | EXTSW_32 - This is the EXTSW instruction for use with "32-bit" registers. |
STD_32 | STD_32 - This is the STD instruction for use with "32-bit" registers. |
CALL | CALL - A function call. |
RET_FLAG | Return with a flag operand, matched by 'blr'. |
MFCR | R32 = MFCR(CRREG, INFLAG) - Represents the MFCR/MFOCRF instructions. This copies the bits corresponding to the specified CRREG into the resultant GPR. Bits corresponding to other CR regs are undefined. |
VCMP | RESVEC = VCMP(LHS, RHS, OPC) - Represents one of the altivec VCMP* instructions. For lack of better number, we use the opcode number encoding for the OPC field to identify the compare. For example, 838 is VCMPGTSH. |
VCMPo | RESVEC, OUTFLAG = VCMPo(LHS, RHS, OPC) - Represents one of the altivec VCMP*o instructions. For lack of better number, we use the opcode number encoding for the OPC field to identify the compare. For example, 838 is VCMPGTSH. |
Definition at line 24 of file PPCISelLowering.h.