LLVM API Documentation

llvm::X86ISD Namespace Reference


Enumerations

enum  NodeType {
  FIRST_NUMBER = ISD::BUILTIN_OP_END+X86::INSTRUCTION_LIST_END, SHLD, SHRD, FAND,
  FXOR, FILD, FILD_FLAG, FP_TO_INT16_IN_MEM,
  FP_TO_INT32_IN_MEM, FP_TO_INT64_IN_MEM, FLD, FST,
  FP_GET_RESULT, FP_SET_RESULT, CALL, TAILCALL,
  RDTSC_DAG, CMP, TEST, COMI,
  UCOMI, SETCC, CMOV, BRCOND,
  RET_FLAG, REP_STOS, REP_MOVS, LOAD_PACK,
  GlobalBaseReg, Wrapper, S2VEC, ZEXT_S2VEC,
  PEXTRW, PINSRW
}
enum  CondCode {
  COND_A = 0, COND_AE = 1, COND_B = 2, COND_BE = 3,
  COND_E = 4, COND_G = 5, COND_GE = 6, COND_L = 7,
  COND_LE = 8, COND_NE = 9, COND_NO = 10, COND_NP = 11,
  COND_NS = 12, COND_O = 13, COND_P = 14, COND_S = 15,
  COND_INVALID
}


Enumeration Type Documentation

enum llvm::X86ISD::NodeType

Enumerator:
FIRST_NUMBER 
SHLD  SHLD, SHRD - Double shift instructions. These correspond to X86::SHLDxx and X86::SHRDxx instructions.
SHRD 
FAND  FAND - Bitwise logical AND of floating point values. This corresponds to X86::ANDPS or X86::ANDPD.
FXOR  FXOR - Bitwise logical XOR of floating point values. This corresponds to X86::XORPS or X86::XORPD.
FILD  FILD, FILD_FLAG - This instruction implements SINT_TO_FP with the integer source in memory and FP reg result. This corresponds to the X86::FILD*m instructions. It has three inputs (token chain, address, and source type) and two outputs (FP value and token chain). FILD_FLAG also produces a flag).
FILD_FLAG 
FP_TO_INT16_IN_MEM  FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the integer destination in memory and a FP reg source. This corresponds to the X86::FIST*m instructions and the rounding mode change stuff. It has two inputs (token chain and address) and two outputs (int value and token chain).
FP_TO_INT32_IN_MEM 
FP_TO_INT64_IN_MEM 
FLD  FLD - This instruction implements an extending load to FP stack slots. This corresponds to the X86::FLD32m / X86::FLD64m. It takes a chain operand, ptr to load from, and a ValueType node indicating the type to load to.
FST  FST - This instruction implements a truncating store to FP stack slots. This corresponds to the X86::FST32m / X86::FST64m. It takes a chain operand, value to store, address, and a ValueType to store it as.
FP_GET_RESULT  FP_SET_RESULT - This corresponds to FpGETRESULT pseudo instrcuction which copies from ST(0) to the destination. It takes a chain and writes a RFP result and a chain.
FP_SET_RESULT  FP_SET_RESULT - This corresponds to FpSETRESULT pseudo instrcuction which copies the source operand to ST(0). It takes a chain and writes a chain and a flag.
CALL  CALL/TAILCALL - These operations represent an abstract X86 call instruction, which includes a bunch of information. In particular the operands of these node are:

#0 - The incoming token chain #1 - The callee #2 - The number of arg bytes the caller pushes on the stack. #3 - The number of arg bytes the callee pops off the stack. #4 - The value to pass in AL/AX/EAX (optional) #5 - The value to pass in DL/DX/EDX (optional)

The result values of these nodes are:

#0 - The outgoing token chain #1 - The first register result value (optional) #2 - The second register result value (optional)

The CALL vs TAILCALL distinction boils down to whether the callee is known not to modify the caller's stack frame, as is standard with LLVM.

TAILCALL 
RDTSC_DAG  RDTSC_DAG - This operation implements the lowering for readcyclecounter
CMP  X86 compare and logical compare instructions.
TEST 
COMI 
UCOMI 
SETCC  X86 SetCC. Operand 1 is condition code, and operand 2 is the flag operand produced by a CMP instruction.
CMOV  X86 conditional moves. Operand 1 and operand 2 are the two values to select from (operand 1 is a R/W operand). Operand 3 is the condition code, and operand 4 is the flag operand produced by a CMP or TEST instruction. It also writes a flag result.
BRCOND  X86 conditional branches. Operand 1 is the chain operand, operand 2 is the block to branch if condition is true, operand 3 is the condition code, and operand 4 is the flag operand produced by a CMP or TEST instruction.
RET_FLAG  Return with a flag operand. Operand 1 is the chain operand, operand 2 is the number of bytes of stack to pop.
REP_STOS  REP_STOS - Repeat fill, corresponds to X86::REP_STOSx.
REP_MOVS  REP_MOVS - Repeat move, corresponds to X86::REP_MOVSx.
LOAD_PACK  LOAD_PACK Load a 128-bit packed float / double value. It has the same operands as a normal load.
GlobalBaseReg  GlobalBaseReg - On Darwin, this node represents the result of the popl at function entry, used for PIC code.
Wrapper  TCPWrapper - A wrapper node for TargetConstantPool, TargetExternalSymbol, and TargetGlobalAddress.
S2VEC  S2VEC - X86 version of SCALAR_TO_VECTOR. The destination base does not have to match the operand type.
ZEXT_S2VEC  ZEXT_S2VEC - SCALAR_TO_VECTOR with zero extension. The destination base does not have to match the operand type.
PEXTRW  PEXTRW - Extract a 16-bit value from a vector and zero extend it to i32, corresponds to X86::PEXTRW.
PINSRW  PINSRW - Insert the lower 16-bits of a 32-bit value to a vector, corresponds to X86::PINSRW.

Definition at line 25 of file X86ISelLowering.h.

enum llvm::X86ISD::CondCode

Enumerator:
COND_A 
COND_AE 
COND_B 
COND_BE 
COND_E 
COND_G 
COND_GE 
COND_L 
COND_LE 
COND_NE 
COND_NO 
COND_NP 
COND_NS 
COND_O 
COND_P 
COND_S 
COND_INVALID 

Definition at line 168 of file X86ISelLowering.h.