LLVM API Documentation

MachineInstrBuilder.h

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00001 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file exposes a function named BuildMI, which is useful for dramatically
00011 // simplifying how MachineInstr's are created.  Instead of using code like this:
00012 //
00013 //   M = new MachineInstr(X86::ADDrr8);
00014 //   M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
00015 //   M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
00016 //
00017 // we can now use code like this:
00018 //
00019 //   M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
00020 //
00021 //===----------------------------------------------------------------------===//
00022 
00023 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
00024 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
00025 
00026 #include "llvm/CodeGen/MachineBasicBlock.h"
00027 
00028 namespace llvm {
00029 
00030 class MachineInstrBuilder {
00031   MachineInstr *MI;
00032 public:
00033   MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
00034 
00035   /// Allow automatic conversion to the machine instruction we are working on.
00036   ///
00037   operator MachineInstr*() const { return MI; }
00038   operator MachineBasicBlock::iterator() const { return MI; }
00039 
00040   /// addReg - Add a new virtual register operand...
00041   ///
00042   const MachineInstrBuilder &addReg(
00043     int RegNo,
00044     MachineOperand::UseType Ty = MachineOperand::Use) const {
00045     MI->addRegOperand(RegNo, Ty);
00046     return *this;
00047   }
00048 
00049   /// addReg - Add an LLVM value that is to be used as a register...
00050   ///
00051   const MachineInstrBuilder &addReg(
00052     Value *V,
00053     MachineOperand::UseType Ty = MachineOperand::Use) const {
00054     MI->addRegOperand(V, Ty);
00055     return *this;
00056   }
00057 
00058   /// addReg - Add an LLVM value that is to be used as a register...
00059   ///
00060   const MachineInstrBuilder &addCCReg(
00061     Value *V,
00062     MachineOperand::UseType Ty = MachineOperand::Use) const {
00063     MI->addCCRegOperand(V, Ty);
00064     return *this;
00065   }
00066 
00067   /// addRegDef - Add an LLVM value that is to be defined as a register... this
00068   /// is the same as addReg(V, MachineOperand::Def).
00069   ///
00070   const MachineInstrBuilder &addRegDef(Value *V) const {
00071     return addReg(V, MachineOperand::Def);
00072   }
00073 
00074   /// addPCDisp - Add an LLVM value to be treated as a PC relative
00075   /// displacement...
00076   ///
00077   const MachineInstrBuilder &addPCDisp(Value *V) const {
00078     MI->addPCDispOperand(V);
00079     return *this;
00080   }
00081 
00082   /// addMReg - Add a machine register operand...
00083   ///
00084   const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
00085                                         = MachineOperand::Use) const {
00086     MI->addMachineRegOperand(Reg, Ty);
00087     return *this;
00088   }
00089 
00090   /// addImm - Add a new immediate operand.
00091   ///
00092   const MachineInstrBuilder &addImm(int Val) const {
00093     MI->addZeroExtImmOperand(Val);
00094     return *this;
00095   }
00096 
00097   /// addSImm - Add a new sign extended immediate operand...
00098   ///
00099   const MachineInstrBuilder &addSImm(int val) const {
00100     MI->addSignExtImmOperand(val);
00101     return *this;
00102   }
00103 
00104   /// addZImm - Add a new zero extended immediate operand...
00105   ///
00106   const MachineInstrBuilder &addZImm(unsigned Val) const {
00107     MI->addZeroExtImmOperand(Val);
00108     return *this;
00109   }
00110 
00111   /// addImm64 - Add a new 64-bit immediate operand...
00112   ///
00113   const MachineInstrBuilder &addImm64(uint64_t Val) const {
00114     MI->addZeroExtImm64Operand(Val);
00115     return *this;
00116   }
00117 
00118   const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
00119     MI->addMachineBasicBlockOperand(MBB);
00120     return *this;
00121   }
00122 
00123   const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
00124     MI->addFrameIndexOperand(Idx);
00125     return *this;
00126   }
00127 
00128   const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
00129                                                   int Offset = 0) const {
00130     MI->addConstantPoolIndexOperand(Idx, Offset);
00131     return *this;
00132   }
00133 
00134   const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
00135                                               bool isPCRelative = false,
00136                                               int Offset = 0) const {
00137     MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
00138     return *this;
00139   }
00140 
00141   const MachineInstrBuilder &addExternalSymbol(const char *FnName,
00142                                                bool isPCRelative = false) const{
00143     MI->addExternalSymbolOperand(FnName, isPCRelative);
00144     return *this;
00145   }
00146 };
00147 
00148 /// BuildMI - Builder interface.  Specify how to create the initial instruction
00149 /// itself.  NumOperands is the number of operands to the machine instruction to
00150 /// allow for memory efficient representation of machine instructions.
00151 ///
00152 inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
00153   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
00154 }
00155 
00156 /// BuildMI - This version of the builder sets up the first operand as a
00157 /// destination virtual register.  NumOperands is the number of additional add*
00158 /// calls that are expected, not including the destination register.
00159 ///
00160 inline MachineInstrBuilder BuildMI(
00161   int Opcode, unsigned NumOperands,
00162   unsigned DestReg,
00163   MachineOperand::UseType useType = MachineOperand::Def) {
00164   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
00165                                    true, true)).addReg(DestReg, useType);
00166 }
00167 
00168 /// BuildMI - This version of the builder inserts the newly-built
00169 /// instruction before the given position in the given MachineBasicBlock, and
00170 /// sets up the first operand as a destination virtual register.
00171 /// NumOperands is the number of additional add* calls that are expected,
00172 /// not including the destination register.
00173 ///
00174 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
00175                                    MachineBasicBlock::iterator I,
00176                                    int Opcode, unsigned NumOperands,
00177                                    unsigned DestReg) {
00178   MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
00179   BB.insert(I, MI);
00180   return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
00181 }
00182 
00183 /// BuildMI - This version of the builder inserts the newly-built
00184 /// instruction before the given position in the given MachineBasicBlock, and
00185 /// does NOT take a destination register.
00186 ///
00187 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
00188                                    MachineBasicBlock::iterator I,
00189                                    int Opcode, unsigned NumOperands) {
00190   MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
00191   BB.insert(I, MI);
00192   return MachineInstrBuilder(MI);
00193 }
00194 
00195 /// BuildMI - This version of the builder inserts the newly-built
00196 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
00197 /// destination register.
00198 ///
00199 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
00200                                    unsigned NumOperands) {
00201   return BuildMI(*BB, BB->end(), Opcode, NumOperands);
00202 }
00203 
00204 /// BuildMI - This version of the builder inserts the newly-built
00205 /// instruction at the end of the given MachineBasicBlock, and sets up the first
00206 /// operand as a destination virtual register. NumOperands is the number of
00207 /// additional add* calls that are expected, not including the destination
00208 /// register.
00209 ///
00210 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
00211                                    unsigned NumOperands, unsigned DestReg) {
00212   return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
00213 }
00214 
00215 } // End llvm namespace
00216 
00217 #endif