LLVM API Documentation
00001 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file defines the X86 specific subclass of TargetMachine. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #include "X86TargetMachine.h" 00015 #include "X86.h" 00016 #include "llvm/Module.h" 00017 #include "llvm/PassManager.h" 00018 #include "llvm/CodeGen/MachineFunction.h" 00019 #include "llvm/CodeGen/Passes.h" 00020 #include "llvm/Target/TargetOptions.h" 00021 #include "llvm/Target/TargetMachineRegistry.h" 00022 #include "llvm/Transforms/Scalar.h" 00023 #include "llvm/Support/CommandLine.h" 00024 #include "llvm/ADT/Statistic.h" 00025 #include <iostream> 00026 using namespace llvm; 00027 00028 /// X86TargetMachineModule - Note that this is used on hosts that cannot link 00029 /// in a library unless there are references into the library. In particular, 00030 /// it seems that it is not possible to get things to work on Win32 without 00031 /// this. Though it is unused, do not remove it. 00032 extern "C" int X86TargetMachineModule; 00033 int X86TargetMachineModule = 0; 00034 00035 namespace { 00036 cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden, 00037 cl::desc("Disable the X86 asm printer, for use " 00038 "when profiling the code generator.")); 00039 // Register the target. 00040 RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)"); 00041 } 00042 00043 unsigned X86TargetMachine::getJITMatchQuality() { 00044 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86) 00045 return 10; 00046 #else 00047 return 0; 00048 #endif 00049 } 00050 00051 unsigned X86TargetMachine::getModuleMatchQuality(const Module &M) { 00052 // We strongly match "i[3-9]86-*". 00053 std::string TT = M.getTargetTriple(); 00054 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' && 00055 TT[4] == '-' && TT[1] - '3' < 6) 00056 return 20; 00057 00058 if (M.getEndianness() == Module::LittleEndian && 00059 M.getPointerSize() == Module::Pointer32) 00060 return 10; // Weak match 00061 else if (M.getEndianness() != Module::AnyEndianness || 00062 M.getPointerSize() != Module::AnyPointerSize) 00063 return 0; // Match for some other target 00064 00065 return getJITMatchQuality()/2; 00066 } 00067 00068 /// X86TargetMachine ctor - Create an ILP32 architecture model 00069 /// 00070 X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS) 00071 : TargetMachine("X86", true, 4, 4, 4, 4, 4), 00072 Subtarget(M, FS), 00073 FrameInfo(TargetFrameInfo::StackGrowsDown, 00074 Subtarget.getStackAlignment(), -4), 00075 JITInfo(*this), TLInfo(*this) { 00076 if (getRelocationModel() == Reloc::Default) 00077 if (Subtarget.isTargetDarwin()) 00078 setRelocationModel(Reloc::DynamicNoPIC); 00079 else 00080 setRelocationModel(Reloc::PIC); 00081 } 00082 00083 00084 // addPassesToEmitFile - We currently use all of the same passes as the JIT 00085 // does to emit statically compiled machine code. 00086 bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out, 00087 CodeGenFileType FileType, 00088 bool Fast) { 00089 if (FileType != TargetMachine::AssemblyFile && 00090 FileType != TargetMachine::ObjectFile) return true; 00091 00092 // Run loop strength reduction before anything else. 00093 PM.add(createLoopStrengthReducePass(&TLInfo)); 00094 00095 // FIXME: Implement efficient support for garbage collection intrinsics. 00096 PM.add(createLowerGCPass()); 00097 00098 // FIXME: Implement the invoke/unwind instructions! 00099 PM.add(createLowerInvokePass()); 00100 00101 // Make sure that no unreachable blocks are instruction selected. 00102 PM.add(createUnreachableBlockEliminationPass()); 00103 00104 // Install an instruction selector. 00105 PM.add(createX86ISelDag(*this)); 00106 00107 // Print the instruction selected machine code... 00108 if (PrintMachineCode) 00109 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00110 00111 // Perform register allocation to convert to a concrete x86 representation 00112 PM.add(createRegisterAllocator()); 00113 00114 if (PrintMachineCode) 00115 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00116 00117 PM.add(createX86FloatingPointStackifierPass()); 00118 00119 if (PrintMachineCode) 00120 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00121 00122 // Insert prolog/epilog code. Eliminate abstract frame index references... 00123 PM.add(createPrologEpilogCodeInserter()); 00124 00125 if (PrintMachineCode) // Print the register-allocated code 00126 PM.add(createX86CodePrinterPass(std::cerr, *this)); 00127 00128 if (!DisableOutput) 00129 switch (FileType) { 00130 default: 00131 assert(0 && "Unexpected filetype here!"); 00132 case TargetMachine::AssemblyFile: 00133 PM.add(createX86CodePrinterPass(Out, *this)); 00134 break; 00135 case TargetMachine::ObjectFile: 00136 // FIXME: We only support emission of ELF files for now, this should check 00137 // the target triple and decide on the format to write (e.g. COFF on 00138 // win32). 00139 addX86ELFObjectWriterPass(PM, Out, *this); 00140 break; 00141 } 00142 00143 // Delete machine code for this function 00144 PM.add(createMachineCodeDeleter()); 00145 00146 return false; // success! 00147 } 00148 00149 /// addPassesToJITCompile - Add passes to the specified pass manager to 00150 /// implement a fast dynamic compiler for this target. Return true if this is 00151 /// not supported for this target. 00152 /// 00153 void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 00154 // The JIT should use static relocation model. 00155 TM.setRelocationModel(Reloc::Static); 00156 00157 // Run loop strength reduction before anything else. 00158 PM.add(createLoopStrengthReducePass(TM.getTargetLowering())); 00159 00160 // FIXME: Implement efficient support for garbage collection intrinsics. 00161 PM.add(createLowerGCPass()); 00162 00163 // FIXME: Implement the invoke/unwind instructions! 00164 PM.add(createLowerInvokePass()); 00165 00166 // Make sure that no unreachable blocks are instruction selected. 00167 PM.add(createUnreachableBlockEliminationPass()); 00168 00169 // Install an instruction selector. 00170 PM.add(createX86ISelDag(TM)); 00171 00172 // Print the instruction selected machine code... 00173 if (PrintMachineCode) 00174 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00175 00176 // Perform register allocation to convert to a concrete x86 representation 00177 PM.add(createRegisterAllocator()); 00178 00179 if (PrintMachineCode) 00180 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00181 00182 PM.add(createX86FloatingPointStackifierPass()); 00183 00184 if (PrintMachineCode) 00185 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 00186 00187 // Insert prolog/epilog code. Eliminate abstract frame index references... 00188 PM.add(createPrologEpilogCodeInserter()); 00189 00190 if (PrintMachineCode) // Print the register-allocated code 00191 PM.add(createX86CodePrinterPass(std::cerr, TM)); 00192 } 00193 00194 bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, 00195 MachineCodeEmitter &MCE) { 00196 PM.add(createX86CodeEmitterPass(MCE)); 00197 // Delete machine code for this function 00198 PM.add(createMachineCodeDeleter()); 00199 return false; 00200 }