LLVM API Documentation

IA64GenRegisterInfo.inc

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00001 //===- TableGen'erated file -------------------------------------*- C++ -*-===//
00002 //
00003 // Register Information Source Fragment
00004 //
00005 // Automatically generated file, do not edit!
00006 //
00007 //===----------------------------------------------------------------------===//
00008 
00009 namespace llvm {
00010 
00011 namespace {     // Register classes...
00012   // FP Register Class...
00013   const unsigned FP[] = {
00014     IA64::F6, IA64::F7, IA64::F8, IA64::F9, IA64::F10, IA64::F11, IA64::F12, IA64::F13, IA64::F14, IA64::F15, IA64::F32, IA64::F33, IA64::F34, IA64::F35, IA64::F36, IA64::F37, IA64::F38, IA64::F39, IA64::F40, IA64::F41, IA64::F42, IA64::F43, IA64::F44, IA64::F45, IA64::F46, IA64::F47, IA64::F48, IA64::F49, IA64::F50, IA64::F51, IA64::F52, IA64::F53, IA64::F54, IA64::F55, IA64::F56, IA64::F57, IA64::F58, IA64::F59, IA64::F60, IA64::F61, IA64::F62, IA64::F63, IA64::F64, IA64::F65, IA64::F66, IA64::F67, IA64::F68, IA64::F69, IA64::F70, IA64::F71, IA64::F72, IA64::F73, IA64::F74, IA64::F75, IA64::F76, IA64::F77, IA64::F78, IA64::F79, IA64::F80, IA64::F81, IA64::F82, IA64::F83, IA64::F84, IA64::F85, IA64::F86, IA64::F87, IA64::F88, IA64::F89, IA64::F90, IA64::F91, IA64::F92, IA64::F93, IA64::F94, IA64::F95, IA64::F96, IA64::F97, IA64::F98, IA64::F99, IA64::F100, IA64::F101, IA64::F102, IA64::F103, IA64::F104, IA64::F105, IA64::F106, IA64::F107, IA64::F108, IA64::F109, IA64::F110, IA64::F111, IA64::F112, IA64::F113, IA64::F114, IA64::F115, IA64::F116, IA64::F117, IA64::F118, IA64::F119, IA64::F120, IA64::F121, IA64::F122, IA64::F123, IA64::F124, IA64::F125, IA64::F126, IA64::F127, IA64::F0, IA64::F1, 
00015   };
00016 
00017   // GR Register Class...
00018   const unsigned GR[] = {
00019     IA64::out7, IA64::out6, IA64::out5, IA64::out4, IA64::out3, IA64::out2, IA64::out1, IA64::out0, IA64::r3, IA64::r8, IA64::r9, IA64::r10, IA64::r11, IA64::r14, IA64::r15, IA64::r16, IA64::r17, IA64::r18, IA64::r19, IA64::r20, IA64::r21, IA64::r23, IA64::r24, IA64::r25, IA64::r26, IA64::r27, IA64::r28, IA64::r29, IA64::r30, IA64::r31, IA64::r32, IA64::r33, IA64::r34, IA64::r35, IA64::r36, IA64::r37, IA64::r38, IA64::r39, IA64::r40, IA64::r41, IA64::r42, IA64::r43, IA64::r44, IA64::r45, IA64::r46, IA64::r47, IA64::r48, IA64::r49, IA64::r50, IA64::r51, IA64::r52, IA64::r53, IA64::r54, IA64::r55, IA64::r56, IA64::r57, IA64::r58, IA64::r59, IA64::r60, IA64::r61, IA64::r62, IA64::r63, IA64::r64, IA64::r65, IA64::r66, IA64::r67, IA64::r68, IA64::r69, IA64::r70, IA64::r71, IA64::r72, IA64::r73, IA64::r74, IA64::r75, IA64::r76, IA64::r77, IA64::r78, IA64::r79, IA64::r80, IA64::r81, IA64::r82, IA64::r83, IA64::r84, IA64::r85, IA64::r86, IA64::r87, IA64::r88, IA64::r89, IA64::r90, IA64::r91, IA64::r92, IA64::r93, IA64::r94, IA64::r95, IA64::r96, IA64::r97, IA64::r98, IA64::r99, IA64::r100, IA64::r101, IA64::r102, IA64::r103, IA64::r104, IA64::r105, IA64::r106, IA64::r107, IA64::r108, IA64::r109, IA64::r110, IA64::r111, IA64::r112, IA64::r113, IA64::r114, IA64::r115, IA64::r116, IA64::r117, IA64::r118, IA64::r119, IA64::r120, IA64::r121, IA64::r122, IA64::r123, IA64::r124, IA64::r125, IA64::r126, IA64::r127, IA64::r0, IA64::r1, IA64::r2, IA64::r5, IA64::r12, IA64::r13, IA64::r22, IA64::rp, 
00020   };
00021 
00022   // PR Register Class...
00023   const unsigned PR[] = {
00024     IA64::p6, IA64::p7, IA64::p8, IA64::p9, IA64::p10, IA64::p11, IA64::p12, IA64::p13, IA64::p14, IA64::p15, 
00025   };
00026 
00027   // FPVTs Register Class Value Types...
00028   const MVT::ValueType FPVTs[] = {
00029     MVT::f64, MVT::Other
00030   };
00031 
00032   // GRVTs Register Class Value Types...
00033   const MVT::ValueType GRVTs[] = {
00034     MVT::i64, MVT::Other
00035   };
00036 
00037   // PRVTs Register Class Value Types...
00038   const MVT::ValueType PRVTs[] = {
00039     MVT::i1, MVT::Other
00040   };
00041 
00042 }  // end anonymous namespace
00043 
00044 namespace IA64 {   // Register class instances
00045   FPClass FPRegClass;
00046   GRClass GRRegClass;
00047   PRClass PRRegClass;
00048 
00049     FPClass::iterator
00050     FPClass::allocation_order_begin(MachineFunction &MF) const {
00051   return begin(); // we don't hide any FP regs from the start
00052       }
00053 
00054       FPClass::iterator
00055       FPClass::allocation_order_end(MachineFunction &MF) const {
00056   return end()-2; // we hide regs F0, F1 from the end 
00057       }
00058   
00059 FPClass::FPClass()  : TargetRegisterClass(FPVTs, 16, 16, FP, FP + 108) {}
00060 
00061     GRClass::iterator
00062     GRClass::allocation_order_begin(MachineFunction &MF) const {
00063   // hide the 8 out? registers appropriately:
00064   return begin()+(8-(MF.getInfo<IA64FunctionInfo>()->outRegsUsed));
00065       }
00066 
00067       GRClass::iterator
00068       GRClass::allocation_order_end(MachineFunction &MF) const {
00069   int numReservedRegs=8; // the 8 special registers r0,r1,r2,r5,r12,r13 etc
00070 
00071   // we also can't allocate registers for use as locals if they're
00072   // already required as 'out' registers
00073   numReservedRegs+=MF.getInfo<IA64FunctionInfo>()->outRegsUsed;
00074   
00075   return end()-numReservedRegs; // hide registers appropriately
00076       }
00077   
00078 GRClass::GRClass()  : TargetRegisterClass(GRVTs, 8, 8, GR, GR + 134) {}
00079 
00080 PRClass::PRClass()  : TargetRegisterClass(PRVTs, 8, 8, PR, PR + 10) {}
00081 }
00082 
00083 namespace {
00084   const TargetRegisterClass* const RegisterClasses[] = {
00085     &IA64::FPRegClass,
00086     &IA64::GRRegClass,
00087     &IA64::PRRegClass,
00088   };
00089   const unsigned Empty_AliasSet[] = { 0 };
00090 
00091   const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors
00092     { "NOREG",  0 },
00093     { "ar.pfs", Empty_AliasSet },
00094     { "b6", Empty_AliasSet },
00095     { "f0", Empty_AliasSet },
00096     { "f1", Empty_AliasSet },
00097     { "f10",  Empty_AliasSet },
00098     { "f100", Empty_AliasSet },
00099     { "f101", Empty_AliasSet },
00100     { "f102", Empty_AliasSet },
00101     { "f103", Empty_AliasSet },
00102     { "f104", Empty_AliasSet },
00103     { "f105", Empty_AliasSet },
00104     { "f106", Empty_AliasSet },
00105     { "f107", Empty_AliasSet },
00106     { "f108", Empty_AliasSet },
00107     { "f109", Empty_AliasSet },
00108     { "f11",  Empty_AliasSet },
00109     { "f110", Empty_AliasSet },
00110     { "f111", Empty_AliasSet },
00111     { "f112", Empty_AliasSet },
00112     { "f113", Empty_AliasSet },
00113     { "f114", Empty_AliasSet },
00114     { "f115", Empty_AliasSet },
00115     { "f116", Empty_AliasSet },
00116     { "f117", Empty_AliasSet },
00117     { "f118", Empty_AliasSet },
00118     { "f119", Empty_AliasSet },
00119     { "f12",  Empty_AliasSet },
00120     { "f120", Empty_AliasSet },
00121     { "f121", Empty_AliasSet },
00122     { "f122", Empty_AliasSet },
00123     { "f123", Empty_AliasSet },
00124     { "f124", Empty_AliasSet },
00125     { "f125", Empty_AliasSet },
00126     { "f126", Empty_AliasSet },
00127     { "f127", Empty_AliasSet },
00128     { "f13",  Empty_AliasSet },
00129     { "f14",  Empty_AliasSet },
00130     { "f15",  Empty_AliasSet },
00131     { "f16",  Empty_AliasSet },
00132     { "f17",  Empty_AliasSet },
00133     { "f18",  Empty_AliasSet },
00134     { "f19",  Empty_AliasSet },
00135     { "f2", Empty_AliasSet },
00136     { "f20",  Empty_AliasSet },
00137     { "f21",  Empty_AliasSet },
00138     { "f22",  Empty_AliasSet },
00139     { "f23",  Empty_AliasSet },
00140     { "f24",  Empty_AliasSet },
00141     { "f25",  Empty_AliasSet },
00142     { "f26",  Empty_AliasSet },
00143     { "f27",  Empty_AliasSet },
00144     { "f28",  Empty_AliasSet },
00145     { "f29",  Empty_AliasSet },
00146     { "f3", Empty_AliasSet },
00147     { "f30",  Empty_AliasSet },
00148     { "f31",  Empty_AliasSet },
00149     { "f32",  Empty_AliasSet },
00150     { "f33",  Empty_AliasSet },
00151     { "f34",  Empty_AliasSet },
00152     { "f35",  Empty_AliasSet },
00153     { "f36",  Empty_AliasSet },
00154     { "f37",  Empty_AliasSet },
00155     { "f38",  Empty_AliasSet },
00156     { "f39",  Empty_AliasSet },
00157     { "f4", Empty_AliasSet },
00158     { "f40",  Empty_AliasSet },
00159     { "f41",  Empty_AliasSet },
00160     { "f42",  Empty_AliasSet },
00161     { "f43",  Empty_AliasSet },
00162     { "f44",  Empty_AliasSet },
00163     { "f45",  Empty_AliasSet },
00164     { "f46",  Empty_AliasSet },
00165     { "f47",  Empty_AliasSet },
00166     { "f48",  Empty_AliasSet },
00167     { "f49",  Empty_AliasSet },
00168     { "f5", Empty_AliasSet },
00169     { "f50",  Empty_AliasSet },
00170     { "f51",  Empty_AliasSet },
00171     { "f52",  Empty_AliasSet },
00172     { "f53",  Empty_AliasSet },
00173     { "f54",  Empty_AliasSet },
00174     { "f55",  Empty_AliasSet },
00175     { "f56",  Empty_AliasSet },
00176     { "f57",  Empty_AliasSet },
00177     { "f58",  Empty_AliasSet },
00178     { "f59",  Empty_AliasSet },
00179     { "f6", Empty_AliasSet },
00180     { "f60",  Empty_AliasSet },
00181     { "f61",  Empty_AliasSet },
00182     { "f62",  Empty_AliasSet },
00183     { "f63",  Empty_AliasSet },
00184     { "f64",  Empty_AliasSet },
00185     { "f65",  Empty_AliasSet },
00186     { "f66",  Empty_AliasSet },
00187     { "f67",  Empty_AliasSet },
00188     { "f68",  Empty_AliasSet },
00189     { "f69",  Empty_AliasSet },
00190     { "f7", Empty_AliasSet },
00191     { "f70",  Empty_AliasSet },
00192     { "f71",  Empty_AliasSet },
00193     { "f72",  Empty_AliasSet },
00194     { "f73",  Empty_AliasSet },
00195     { "f74",  Empty_AliasSet },
00196     { "f75",  Empty_AliasSet },
00197     { "f76",  Empty_AliasSet },
00198     { "f77",  Empty_AliasSet },
00199     { "f78",  Empty_AliasSet },
00200     { "f79",  Empty_AliasSet },
00201     { "f8", Empty_AliasSet },
00202     { "f80",  Empty_AliasSet },
00203     { "f81",  Empty_AliasSet },
00204     { "f82",  Empty_AliasSet },
00205     { "f83",  Empty_AliasSet },
00206     { "f84",  Empty_AliasSet },
00207     { "f85",  Empty_AliasSet },
00208     { "f86",  Empty_AliasSet },
00209     { "f87",  Empty_AliasSet },
00210     { "f88",  Empty_AliasSet },
00211     { "f89",  Empty_AliasSet },
00212     { "f9", Empty_AliasSet },
00213     { "f90",  Empty_AliasSet },
00214     { "f91",  Empty_AliasSet },
00215     { "f92",  Empty_AliasSet },
00216     { "f93",  Empty_AliasSet },
00217     { "f94",  Empty_AliasSet },
00218     { "f95",  Empty_AliasSet },
00219     { "f96",  Empty_AliasSet },
00220     { "f97",  Empty_AliasSet },
00221     { "f98",  Empty_AliasSet },
00222     { "f99",  Empty_AliasSet },
00223     { "out0", Empty_AliasSet },
00224     { "out1", Empty_AliasSet },
00225     { "out2", Empty_AliasSet },
00226     { "out3", Empty_AliasSet },
00227     { "out4", Empty_AliasSet },
00228     { "out5", Empty_AliasSet },
00229     { "out6", Empty_AliasSet },
00230     { "out7", Empty_AliasSet },
00231     { "p0", Empty_AliasSet },
00232     { "p1", Empty_AliasSet },
00233     { "p10",  Empty_AliasSet },
00234     { "p11",  Empty_AliasSet },
00235     { "p12",  Empty_AliasSet },
00236     { "p13",  Empty_AliasSet },
00237     { "p14",  Empty_AliasSet },
00238     { "p15",  Empty_AliasSet },
00239     { "p16",  Empty_AliasSet },
00240     { "p17",  Empty_AliasSet },
00241     { "p18",  Empty_AliasSet },
00242     { "p19",  Empty_AliasSet },
00243     { "p2", Empty_AliasSet },
00244     { "p20",  Empty_AliasSet },
00245     { "p21",  Empty_AliasSet },
00246     { "p22",  Empty_AliasSet },
00247     { "p23",  Empty_AliasSet },
00248     { "p24",  Empty_AliasSet },
00249     { "p25",  Empty_AliasSet },
00250     { "p26",  Empty_AliasSet },
00251     { "p27",  Empty_AliasSet },
00252     { "p28",  Empty_AliasSet },
00253     { "p29",  Empty_AliasSet },
00254     { "p3", Empty_AliasSet },
00255     { "p30",  Empty_AliasSet },
00256     { "p31",  Empty_AliasSet },
00257     { "p32",  Empty_AliasSet },
00258     { "p33",  Empty_AliasSet },
00259     { "p34",  Empty_AliasSet },
00260     { "p35",  Empty_AliasSet },
00261     { "p36",  Empty_AliasSet },
00262     { "p37",  Empty_AliasSet },
00263     { "p38",  Empty_AliasSet },
00264     { "p39",  Empty_AliasSet },
00265     { "p4", Empty_AliasSet },
00266     { "p40",  Empty_AliasSet },
00267     { "p41",  Empty_AliasSet },
00268     { "p42",  Empty_AliasSet },
00269     { "p43",  Empty_AliasSet },
00270     { "p44",  Empty_AliasSet },
00271     { "p45",  Empty_AliasSet },
00272     { "p46",  Empty_AliasSet },
00273     { "p47",  Empty_AliasSet },
00274     { "p48",  Empty_AliasSet },
00275     { "p49",  Empty_AliasSet },
00276     { "p5", Empty_AliasSet },
00277     { "p50",  Empty_AliasSet },
00278     { "p51",  Empty_AliasSet },
00279     { "p52",  Empty_AliasSet },
00280     { "p53",  Empty_AliasSet },
00281     { "p54",  Empty_AliasSet },
00282     { "p55",  Empty_AliasSet },
00283     { "p56",  Empty_AliasSet },
00284     { "p57",  Empty_AliasSet },
00285     { "p58",  Empty_AliasSet },
00286     { "p59",  Empty_AliasSet },
00287     { "p6", Empty_AliasSet },
00288     { "p60",  Empty_AliasSet },
00289     { "p61",  Empty_AliasSet },
00290     { "p62",  Empty_AliasSet },
00291     { "p63",  Empty_AliasSet },
00292     { "p7", Empty_AliasSet },
00293     { "p8", Empty_AliasSet },
00294     { "p9", Empty_AliasSet },
00295     { "r0", Empty_AliasSet },
00296     { "r1", Empty_AliasSet },
00297     { "r10",  Empty_AliasSet },
00298     { "r100", Empty_AliasSet },
00299     { "r101", Empty_AliasSet },
00300     { "r102", Empty_AliasSet },
00301     { "r103", Empty_AliasSet },
00302     { "r104", Empty_AliasSet },
00303     { "r105", Empty_AliasSet },
00304     { "r106", Empty_AliasSet },
00305     { "r107", Empty_AliasSet },
00306     { "r108", Empty_AliasSet },
00307     { "r109", Empty_AliasSet },
00308     { "r11",  Empty_AliasSet },
00309     { "r110", Empty_AliasSet },
00310     { "r111", Empty_AliasSet },
00311     { "r112", Empty_AliasSet },
00312     { "r113", Empty_AliasSet },
00313     { "r114", Empty_AliasSet },
00314     { "r115", Empty_AliasSet },
00315     { "r116", Empty_AliasSet },
00316     { "r117", Empty_AliasSet },
00317     { "r118", Empty_AliasSet },
00318     { "r119", Empty_AliasSet },
00319     { "r12",  Empty_AliasSet },
00320     { "r120", Empty_AliasSet },
00321     { "r121", Empty_AliasSet },
00322     { "r122", Empty_AliasSet },
00323     { "r123", Empty_AliasSet },
00324     { "r124", Empty_AliasSet },
00325     { "r125", Empty_AliasSet },
00326     { "r126", Empty_AliasSet },
00327     { "r127", Empty_AliasSet },
00328     { "r13",  Empty_AliasSet },
00329     { "r14",  Empty_AliasSet },
00330     { "r15",  Empty_AliasSet },
00331     { "r16",  Empty_AliasSet },
00332     { "r17",  Empty_AliasSet },
00333     { "r18",  Empty_AliasSet },
00334     { "r19",  Empty_AliasSet },
00335     { "r2", Empty_AliasSet },
00336     { "r20",  Empty_AliasSet },
00337     { "r21",  Empty_AliasSet },
00338     { "r22",  Empty_AliasSet },
00339     { "r23",  Empty_AliasSet },
00340     { "r24",  Empty_AliasSet },
00341     { "r25",  Empty_AliasSet },
00342     { "r26",  Empty_AliasSet },
00343     { "r27",  Empty_AliasSet },
00344     { "r28",  Empty_AliasSet },
00345     { "r29",  Empty_AliasSet },
00346     { "r3", Empty_AliasSet },
00347     { "r30",  Empty_AliasSet },
00348     { "r31",  Empty_AliasSet },
00349     { "r32",  Empty_AliasSet },
00350     { "r33",  Empty_AliasSet },
00351     { "r34",  Empty_AliasSet },
00352     { "r35",  Empty_AliasSet },
00353     { "r36",  Empty_AliasSet },
00354     { "r37",  Empty_AliasSet },
00355     { "r38",  Empty_AliasSet },
00356     { "r39",  Empty_AliasSet },
00357     { "r4", Empty_AliasSet },
00358     { "r40",  Empty_AliasSet },
00359     { "r41",  Empty_AliasSet },
00360     { "r42",  Empty_AliasSet },
00361     { "r43",  Empty_AliasSet },
00362     { "r44",  Empty_AliasSet },
00363     { "r45",  Empty_AliasSet },
00364     { "r46",  Empty_AliasSet },
00365     { "r47",  Empty_AliasSet },
00366     { "r48",  Empty_AliasSet },
00367     { "r49",  Empty_AliasSet },
00368     { "r5", Empty_AliasSet },
00369     { "r50",  Empty_AliasSet },
00370     { "r51",  Empty_AliasSet },
00371     { "r52",  Empty_AliasSet },
00372     { "r53",  Empty_AliasSet },
00373     { "r54",  Empty_AliasSet },
00374     { "r55",  Empty_AliasSet },
00375     { "r56",  Empty_AliasSet },
00376     { "r57",  Empty_AliasSet },
00377     { "r58",  Empty_AliasSet },
00378     { "r59",  Empty_AliasSet },
00379     { "r6", Empty_AliasSet },
00380     { "r60",  Empty_AliasSet },
00381     { "r61",  Empty_AliasSet },
00382     { "r62",  Empty_AliasSet },
00383     { "r63",  Empty_AliasSet },
00384     { "r64",  Empty_AliasSet },
00385     { "r65",  Empty_AliasSet },
00386     { "r66",  Empty_AliasSet },
00387     { "r67",  Empty_AliasSet },
00388     { "r68",  Empty_AliasSet },
00389     { "r69",  Empty_AliasSet },
00390     { "r7", Empty_AliasSet },
00391     { "r70",  Empty_AliasSet },
00392     { "r71",  Empty_AliasSet },
00393     { "r72",  Empty_AliasSet },
00394     { "r73",  Empty_AliasSet },
00395     { "r74",  Empty_AliasSet },
00396     { "r75",  Empty_AliasSet },
00397     { "r76",  Empty_AliasSet },
00398     { "r77",  Empty_AliasSet },
00399     { "r78",  Empty_AliasSet },
00400     { "r79",  Empty_AliasSet },
00401     { "r8", Empty_AliasSet },
00402     { "r80",  Empty_AliasSet },
00403     { "r81",  Empty_AliasSet },
00404     { "r82",  Empty_AliasSet },
00405     { "r83",  Empty_AliasSet },
00406     { "r84",  Empty_AliasSet },
00407     { "r85",  Empty_AliasSet },
00408     { "r86",  Empty_AliasSet },
00409     { "r87",  Empty_AliasSet },
00410     { "r88",  Empty_AliasSet },
00411     { "r89",  Empty_AliasSet },
00412     { "r9", Empty_AliasSet },
00413     { "r90",  Empty_AliasSet },
00414     { "r91",  Empty_AliasSet },
00415     { "r92",  Empty_AliasSet },
00416     { "r93",  Empty_AliasSet },
00417     { "r94",  Empty_AliasSet },
00418     { "r95",  Empty_AliasSet },
00419     { "r96",  Empty_AliasSet },
00420     { "r97",  Empty_AliasSet },
00421     { "r98",  Empty_AliasSet },
00422     { "r99",  Empty_AliasSet },
00423     { "rp", Empty_AliasSet },
00424   };
00425 }
00426 
00427 IA64GenRegisterInfo::IA64GenRegisterInfo(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)
00428   : MRegisterInfo(RegisterDescriptors, 332, RegisterClasses, RegisterClasses+3,
00429                   CallFrameSetupOpcode, CallFrameDestroyOpcode) {}
00430 
00431 const unsigned* IA64GenRegisterInfo::getCalleeSaveRegs() const {
00432   static const unsigned CalleeSaveRegs[] = {
00433     IA64::r5,  0
00434   };
00435   return CalleeSaveRegs;
00436 }
00437 
00438 const TargetRegisterClass* const*
00439 IA64GenRegisterInfo::getCalleeSaveRegClasses() const {
00440   static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
00441     &IA64::GRRegClass,  0
00442   };
00443   return CalleeSaveRegClasses;
00444 }
00445 
00446 int IA64GenRegisterInfo::getDwarfRegNum(unsigned RegNum) const {
00447   static const int DwarfRegNums[] = { -1, // NoRegister
00448     331, 326, 128, 129, 138, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 139, 
00449     238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 140, 248, 249, 250, 251, 252, 
00450     253, 254, 255, 141, 142, 143, 144, 145, 146, 147, 130, 148, 149, 150, 151, 152, 
00451     153, 154, 155, 156, 157, 131, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 
00452     132, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 133, 178, 179, 180, 181, 
00453     182, 183, 184, 185, 186, 187, 134, 188, 189, 190, 191, 192, 193, 194, 195, 196, 
00454     197, 135, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 136, 208, 209, 210, 
00455     211, 212, 213, 214, 215, 216, 217, 137, 218, 219, 220, 221, 222, 223, 224, 225, 
00456     226, 227, 120, 121, 122, 123, 124, 125, 126, 127, 256, 257, 266, 267, 268, 269, 
00457     270, 271, 272, 273, 274, 275, 258, 276, 277, 278, 279, 280, 281, 282, 283, 284, 
00458     285, 259, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 260, 296, 297, 298, 
00459     299, 300, 301, 302, 303, 304, 305, 261, 306, 307, 308, 309, 310, 311, 312, 313, 
00460     314, 315, 262, 316, 317, 318, 319, 263, 264, 265, 0, 1, 10, 100, 101, 102, 
00461     103, 104, 105, 106, 107, 108, 109, 11, 110, 111, 112, 113, 114, 115, 116, 117, 
00462     118, 119, 12, 120, 121, 122, 123, 124, 125, 126, 127, 13, 14, 15, 16, 17, 
00463     18, 19, 2, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 3, 30, 31, 
00464     32, 33, 34, 35, 36, 37, 38, 39, 4, 40, 41, 42, 43, 44, 45, 46, 
00465     47, 48, 49, 5, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 6, 60, 
00466     61, 62, 63, 64, 65, 66, 67, 68, 69, 7, 70, 71, 72, 73, 74, 75, 
00467     76, 77, 78, 79, 8, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 9, 
00468     90, 91, 92, 93, 94, 95, 96, 97, 98, 99, -1
00469   };
00470   assert(RegNum < (sizeof(DwarfRegNums)/sizeof(int)) &&
00471          "RegNum exceeds number of registers");
00472   return DwarfRegNums[RegNum];
00473 }
00474 
00475 } // End llvm namespace