LLVM API Documentation
00001 //===-- PPC32CodeEmitter.cpp - JIT Code Emitter for PowerPC32 -----*- C++ -*-=// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to 00011 // JIT-compile bytecode to native PowerPC. 00012 // 00013 //===----------------------------------------------------------------------===// 00014 00015 #include "PPC32TargetMachine.h" 00016 #include "PPC32Relocations.h" 00017 #include "PowerPC.h" 00018 #include "llvm/Module.h" 00019 #include "llvm/CodeGen/MachineCodeEmitter.h" 00020 #include "llvm/CodeGen/MachineFunctionPass.h" 00021 #include "llvm/CodeGen/MachineInstrBuilder.h" 00022 #include "llvm/CodeGen/Passes.h" 00023 #include "llvm/Support/Debug.h" 00024 using namespace llvm; 00025 00026 namespace { 00027 class PPC32CodeEmitter : public MachineFunctionPass { 00028 TargetMachine &TM; 00029 MachineCodeEmitter &MCE; 00030 00031 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record 00032 /// its address in the function into this pointer. 00033 void *MovePCtoLROffset; 00034 00035 // Tracks which instruction references which BasicBlock 00036 std::vector<std::pair<MachineBasicBlock*, unsigned*> > BBRefs; 00037 // Tracks where each BasicBlock starts 00038 std::map<MachineBasicBlock*, long> BBLocations; 00039 00040 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr 00041 /// 00042 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO); 00043 00044 public: 00045 PPC32CodeEmitter(TargetMachine &T, MachineCodeEmitter &M) 00046 : TM(T), MCE(M) {} 00047 00048 const char *getPassName() const { return "PowerPC Machine Code Emitter"; } 00049 00050 /// runOnMachineFunction - emits the given MachineFunction to memory 00051 /// 00052 bool runOnMachineFunction(MachineFunction &MF); 00053 00054 /// emitBasicBlock - emits the given MachineBasicBlock to memory 00055 /// 00056 void emitBasicBlock(MachineBasicBlock &MBB); 00057 00058 /// emitWord - write a 32-bit word to memory at the current PC 00059 /// 00060 void emitWord(unsigned w) { MCE.emitWord(w); } 00061 00062 /// getValueBit - return the particular bit of Val 00063 /// 00064 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; } 00065 00066 /// getBinaryCodeForInstr - This function, generated by the 00067 /// CodeEmitterGenerator using TableGen, produces the binary encoding for 00068 /// machine instructions. 00069 /// 00070 unsigned getBinaryCodeForInstr(MachineInstr &MI); 00071 }; 00072 } 00073 00074 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get 00075 /// machine code emitted. This uses a MachineCodeEmitter object to handle 00076 /// actually outputting the machine code and resolving things like the address 00077 /// of functions. This method should returns true if machine code emission is 00078 /// not supported. 00079 /// 00080 bool PPC32TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, 00081 MachineCodeEmitter &MCE) { 00082 // Machine code emitter pass for PowerPC 00083 PM.add(new PPC32CodeEmitter(*this, MCE)); 00084 // Delete machine code for this function after emitting it 00085 PM.add(createMachineCodeDeleter()); 00086 return false; 00087 } 00088 00089 bool PPC32CodeEmitter::runOnMachineFunction(MachineFunction &MF) { 00090 MovePCtoLROffset = 0; 00091 MCE.startFunction(MF); 00092 MCE.emitConstantPool(MF.getConstantPool()); 00093 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB) 00094 emitBasicBlock(*BB); 00095 MCE.finishFunction(MF); 00096 00097 // Resolve branches to BasicBlocks for the entire function 00098 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) { 00099 intptr_t Location = BBLocations[BBRefs[i].first]; 00100 unsigned *Ref = BBRefs[i].second; 00101 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location 00102 << "\n"); 00103 unsigned Instr = *Ref; 00104 intptr_t BranchTargetDisp = (Location - (intptr_t)Ref) >> 2; 00105 00106 switch (Instr >> 26) { 00107 default: assert(0 && "Unknown branch user!"); 00108 case 18: // This is B or BL 00109 *Ref |= (BranchTargetDisp & ((1 << 24)-1)) << 2; 00110 break; 00111 case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction 00112 *Ref |= (BranchTargetDisp & ((1 << 14)-1)) << 2; 00113 break; 00114 } 00115 } 00116 BBRefs.clear(); 00117 BBLocations.clear(); 00118 00119 return false; 00120 } 00121 00122 void PPC32CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { 00123 BBLocations[&MBB] = MCE.getCurrentPCValue(); 00124 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){ 00125 MachineInstr &MI = *I; 00126 unsigned Opcode = MI.getOpcode(); 00127 switch (MI.getOpcode()) { 00128 default: 00129 emitWord(getBinaryCodeForInstr(*I)); 00130 break; 00131 case PPC::IMPLICIT_DEF: 00132 break; // pseudo opcode, no side effects 00133 case PPC::MovePCtoLR: 00134 assert(MovePCtoLROffset == 0 && 00135 "Multiple MovePCtoLR instructions in the function?"); 00136 MovePCtoLROffset = (void*)(intptr_t)MCE.getCurrentPCValue(); 00137 emitWord(0x48000005); // bl 1 00138 break; 00139 } 00140 } 00141 } 00142 00143 static unsigned enumRegToMachineReg(unsigned enumReg) { 00144 switch (enumReg) { 00145 case PPC::R0 : case PPC::F0 : case PPC::CR0: return 0; 00146 case PPC::R1 : case PPC::F1 : case PPC::CR1: return 1; 00147 case PPC::R2 : case PPC::F2 : case PPC::CR2: return 2; 00148 case PPC::R3 : case PPC::F3 : case PPC::CR3: return 3; 00149 case PPC::R4 : case PPC::F4 : case PPC::CR4: return 4; 00150 case PPC::R5 : case PPC::F5 : case PPC::CR5: return 5; 00151 case PPC::R6 : case PPC::F6 : case PPC::CR6: return 6; 00152 case PPC::R7 : case PPC::F7 : case PPC::CR7: return 7; 00153 case PPC::R8 : case PPC::F8 : return 8; 00154 case PPC::R9 : case PPC::F9 : return 9; 00155 case PPC::R10: case PPC::F10: return 10; 00156 case PPC::R11: case PPC::F11: return 11; 00157 case PPC::R12: case PPC::F12: return 12; 00158 case PPC::R13: case PPC::F13: return 13; 00159 case PPC::R14: case PPC::F14: return 14; 00160 case PPC::R15: case PPC::F15: return 15; 00161 case PPC::R16: case PPC::F16: return 16; 00162 case PPC::R17: case PPC::F17: return 17; 00163 case PPC::R18: case PPC::F18: return 18; 00164 case PPC::R19: case PPC::F19: return 19; 00165 case PPC::R20: case PPC::F20: return 20; 00166 case PPC::R21: case PPC::F21: return 21; 00167 case PPC::R22: case PPC::F22: return 22; 00168 case PPC::R23: case PPC::F23: return 23; 00169 case PPC::R24: case PPC::F24: return 24; 00170 case PPC::R25: case PPC::F25: return 25; 00171 case PPC::R26: case PPC::F26: return 26; 00172 case PPC::R27: case PPC::F27: return 27; 00173 case PPC::R28: case PPC::F28: return 28; 00174 case PPC::R29: case PPC::F29: return 29; 00175 case PPC::R30: case PPC::F30: return 30; 00176 case PPC::R31: case PPC::F31: return 31; 00177 default: 00178 std::cerr << "Unhandled reg in enumRegToRealReg!\n"; 00179 abort(); 00180 } 00181 } 00182 00183 int PPC32CodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) { 00184 00185 int rv = 0; // Return value; defaults to 0 for unhandled cases 00186 // or things that get fixed up later by the JIT. 00187 if (MO.isRegister()) { 00188 rv = enumRegToMachineReg(MO.getReg()); 00189 } else if (MO.isImmediate()) { 00190 rv = MO.getImmedValue(); 00191 } else if (MO.isGlobalAddress()) { 00192 GlobalValue *GV = MO.getGlobal(); 00193 unsigned Reloc = 0; 00194 int Offset = 0; 00195 if (MI.getOpcode() == PPC::CALLpcrel) 00196 Reloc = PPC::reloc_pcrel_bx; 00197 else { 00198 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); 00199 Offset = -((intptr_t)MovePCtoLROffset+4); 00200 00201 if (MI.getOpcode() == PPC::LOADHiAddr) { 00202 if (GV->hasWeakLinkage() || GV->isExternal()) 00203 Reloc = PPC::reloc_absolute_ptr_high; // Pointer to stub 00204 else 00205 Reloc = PPC::reloc_absolute_high; // Pointer to symbol 00206 00207 } else if (MI.getOpcode() == PPC::LA) { 00208 assert(!(GV->hasWeakLinkage() || GV->isExternal()) 00209 && "Something in the ISEL changed\n"); 00210 00211 Reloc = PPC::reloc_absolute_low; 00212 } else if (MI.getOpcode() == PPC::LWZ) { 00213 Reloc = PPC::reloc_absolute_ptr_low; 00214 00215 assert((GV->hasWeakLinkage() || GV->isExternal()) && 00216 "Something in the ISEL changed\n"); 00217 } else { 00218 // These don't show up for global value references AFAIK, only for 00219 // constant pool refs: PPC::LFS, PPC::LFD 00220 assert(0 && "Unknown instruction for relocation!"); 00221 } 00222 } 00223 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(), 00224 Reloc, MO.getGlobal(), Offset)); 00225 } else if (MO.isMachineBasicBlock()) { 00226 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue(); 00227 BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC)); 00228 } else if (MO.isConstantPoolIndex()) { 00229 unsigned index = MO.getConstantPoolIndex(); 00230 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); 00231 rv = MCE.getConstantPoolEntryAddress(index) - (intptr_t)MovePCtoLROffset-4; 00232 00233 unsigned Opcode = MI.getOpcode(); 00234 if (Opcode == PPC::LOADHiAddr) { 00235 // LoadHiAddr wants hi16(addr - &MovePCtoLR) 00236 if ((short)rv < 0) rv += 1 << 16; 00237 rv >>= 16; 00238 } else if (Opcode == PPC::LWZ || Opcode == PPC::LA || 00239 Opcode == PPC::LFS || Opcode == PPC::LFD) { 00240 // These load opcodes want lo16(addr - &MovePCtoLR) 00241 rv &= 0xffff; 00242 } else { 00243 assert(0 && "Unknown constant pool using instruction!"); 00244 } 00245 } else { 00246 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; 00247 abort(); 00248 } 00249 00250 return rv; 00251 } 00252 00253 #include "PPC32GenCodeEmitter.inc" 00254