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PowerPCTargetMachine.cpp

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00001 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
00002 // 
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 // 
00008 //===----------------------------------------------------------------------===//
00009 // 
00010 //
00011 //===----------------------------------------------------------------------===//
00012 
00013 #include "PowerPC.h"
00014 #include "PowerPCTargetMachine.h"
00015 #include "PowerPCFrameInfo.h"
00016 #include "PPC32TargetMachine.h"
00017 #include "PPC64TargetMachine.h"
00018 #include "PPC32JITInfo.h"
00019 #include "PPC64JITInfo.h"
00020 #include "llvm/Module.h"
00021 #include "llvm/PassManager.h"
00022 #include "llvm/CodeGen/IntrinsicLowering.h"
00023 #include "llvm/CodeGen/MachineFunction.h"
00024 #include "llvm/CodeGen/Passes.h"
00025 #include "llvm/Target/TargetOptions.h"
00026 #include "llvm/Target/TargetMachineRegistry.h"
00027 #include "llvm/Transforms/Scalar.h"
00028 #include "llvm/Support/CommandLine.h"
00029 #include <iostream>
00030 using namespace llvm;
00031 
00032 namespace llvm {
00033   cl::opt<bool> AIX("aix", 
00034                     cl::desc("Generate AIX/xcoff instead of Darwin/MachO"), 
00035                     cl::Hidden);
00036 }
00037 
00038 namespace {
00039   const std::string PPC32ID = "PowerPC/32bit";
00040   const std::string PPC64ID = "PowerPC/64bit";
00041   
00042   // Register the targets
00043   RegisterTarget<PPC32TargetMachine> 
00044   X("ppc32", "  PowerPC 32-bit");
00045 
00046 #if 0
00047   RegisterTarget<PPC64TargetMachine> 
00048   Y("ppc64", "  PowerPC 64-bit (unimplemented)");
00049 #endif
00050 }
00051 
00052 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
00053                                            IntrinsicLowering *IL,
00054                                            const TargetData &TD,
00055                                            const PowerPCFrameInfo &TFI)
00056   : TargetMachine(name, IL, TD), FrameInfo(TFI)
00057 {}
00058 
00059 unsigned PPC32TargetMachine::getJITMatchQuality() {
00060 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
00061   return 10;
00062 #else
00063   return 0;
00064 #endif
00065 }
00066 
00067 /// addPassesToEmitAssembly - Add passes to the specified pass manager
00068 /// to implement a static compiler for this target.
00069 ///
00070 bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
00071                                                    std::ostream &Out) {
00072   bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
00073   
00074   // FIXME: Implement efficient support for garbage collection intrinsics.
00075   PM.add(createLowerGCPass());
00076 
00077   // FIXME: Implement the invoke/unwind instructions!
00078   PM.add(createLowerInvokePass());
00079 
00080   // FIXME: Implement the switch instruction in the instruction selector!
00081   PM.add(createLowerSwitchPass());
00082 
00083   PM.add(createLowerConstantExpressionsPass());
00084 
00085   // Make sure that no unreachable blocks are instruction selected.
00086   PM.add(createUnreachableBlockEliminationPass());
00087 
00088   if (LP64)
00089     PM.add(createPPC64ISelSimple(*this));
00090   else
00091     PM.add(createPPC32ISelSimple(*this));
00092 
00093   if (PrintMachineCode)
00094     PM.add(createMachineFunctionPrinterPass(&std::cerr));
00095 
00096   PM.add(createRegisterAllocator());
00097 
00098   if (PrintMachineCode)
00099     PM.add(createMachineFunctionPrinterPass(&std::cerr));
00100 
00101   PM.add(createPrologEpilogCodeInserter());
00102   
00103   // Must run branch selection immediately preceding the asm printer
00104   PM.add(createPPCBranchSelectionPass());
00105   
00106   if (AIX)
00107     PM.add(createAIXAsmPrinter(Out, *this));
00108   else
00109     PM.add(createDarwinAsmPrinter(Out, *this));
00110     
00111   PM.add(createMachineCodeDeleter());
00112   return false;
00113 }
00114 
00115 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
00116   // FIXME: Implement efficient support for garbage collection intrinsics.
00117   PM.add(createLowerGCPass());
00118 
00119   // FIXME: Implement the invoke/unwind instructions!
00120   PM.add(createLowerInvokePass());
00121 
00122   // FIXME: Implement the switch instruction in the instruction selector!
00123   PM.add(createLowerSwitchPass());
00124 
00125   PM.add(createLowerConstantExpressionsPass());
00126 
00127   // Make sure that no unreachable blocks are instruction selected.
00128   PM.add(createUnreachableBlockEliminationPass());
00129 
00130   PM.add(createPPC32ISelSimple(TM));
00131   PM.add(createRegisterAllocator());
00132   PM.add(createPrologEpilogCodeInserter());
00133 
00134   // Must run branch selection immediately preceding the asm printer
00135   PM.add(createPPCBranchSelectionPass());
00136 
00137   if (PrintMachineCode)
00138     PM.add(createMachineFunctionPrinterPass(&std::cerr));
00139 }
00140 
00141 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
00142 ///
00143 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
00144   : PowerPCTargetMachine(PPC32ID, IL, 
00145                          TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
00146                          PowerPCFrameInfo(*this, false)), JITInfo(*this) {}
00147 
00148 /// PPC64TargetMachine ctor - Create a LP64 architecture model
00149 ///
00150 PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
00151   : PowerPCTargetMachine(PPC64ID, IL,
00152                          TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,1),
00153                          PowerPCFrameInfo(*this, true)) {}
00154 
00155 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
00156   if (M.getEndianness()  == Module::BigEndian &&
00157       M.getPointerSize() == Module::Pointer32)
00158     return 10;                                   // Direct match
00159   else if (M.getEndianness() != Module::AnyEndianness ||
00160            M.getPointerSize() != Module::AnyPointerSize)
00161     return 0;                                    // Match for some other target
00162 
00163   return getJITMatchQuality()/2;
00164 }
00165 
00166 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
00167   if (M.getEndianness()  == Module::BigEndian &&
00168       M.getPointerSize() == Module::Pointer64)
00169     return 10;                                   // Direct match
00170   else if (M.getEndianness() != Module::AnyEndianness ||
00171            M.getPointerSize() != Module::AnyPointerSize)
00172     return 0;                                    // Match for some other target
00173 
00174   return getJITMatchQuality()/2;
00175 }