LLVM API Documentation
00001 //===-- X86ISelPattern.cpp - A pattern matching inst selector for X86 -----===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file defines a pattern matching instruction selector for X86. 00011 // 00012 // FIXME: we could allocate one big array of unsigneds to use as the backing 00013 // store for all of the nodes costs arrays. 00014 // 00015 //===----------------------------------------------------------------------===// 00016 00017 /// NOTE: This whole selector is completely disabled. This is only retained 00018 /// for historical interest and future work. It will probably change 00019 /// substantially in the future. 00020 #if 0 00021 00022 #include "X86.h" 00023 #include "llvm/Pass.h" 00024 #include "llvm/Function.h" 00025 #include "llvm/DerivedTypes.h" 00026 #include "llvm/CodeGen/SelectionDAG.h" 00027 #include "llvm/CodeGen/MachineFunction.h" 00028 #include "llvm/CodeGen/MachineFrameInfo.h" 00029 #include "llvm/CodeGen/SSARegMap.h" 00030 #include "X86RegisterInfo.h" 00031 #include <iostream> 00032 00033 // Include the generated instruction selector... 00034 #include "X86GenInstrSelector.inc" 00035 using namespace llvm; 00036 00037 namespace { 00038 struct ISel : public FunctionPass, SelectionDAGTargetBuilder { 00039 TargetMachine &TM; 00040 ISel(TargetMachine &tm) : TM(tm) {} 00041 int VarArgsFrameIndex; // FrameIndex for start of varargs area 00042 00043 bool runOnFunction(Function &Fn) { 00044 MachineFunction &MF = MachineFunction::construct(&Fn, TM); 00045 SelectionDAG DAG(MF, TM, *this); 00046 00047 std::cerr << "\n\n\n=== " 00048 << DAG.getMachineFunction().getFunction()->getName() << "\n"; 00049 00050 DAG.dump(); 00051 X86ISel(DAG).generateCode(); 00052 std::cerr << "\n\n\n"; 00053 return true; 00054 } 00055 00056 public: // Implementation of the SelectionDAGTargetBuilder class... 00057 /// expandArguments - Add nodes to the DAG to indicate how to load arguments 00058 /// off of the X86 stack. 00059 void expandArguments(SelectionDAG &SD); 00060 void expandCall(SelectionDAG &SD, CallInst &CI); 00061 }; 00062 } 00063 00064 00065 void ISel::expandArguments(SelectionDAG &SD) { 00066 00067 // Add DAG nodes to load the arguments... On entry to a function on the X86, 00068 // the stack frame looks like this: 00069 // 00070 // [ESP] -- return address 00071 // [ESP + 4] -- first argument (leftmost lexically) 00072 // [ESP + 8] -- second argument, if first argument is four bytes in size 00073 // ... 00074 // 00075 MachineFunction &F = SD.getMachineFunction(); 00076 MachineFrameInfo *MFI = F.getFrameInfo(); 00077 const Function &Fn = *F.getFunction(); 00078 00079 unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot 00080 for (Function::const_aiterator I = Fn.abegin(), E = Fn.aend(); I != E; ++I) { 00081 MVT::ValueType ObjectVT = SD.getValueType(I->getType()); 00082 unsigned ArgIncrement = 4; 00083 unsigned ObjSize; 00084 switch (ObjectVT) { 00085 default: assert(0 && "Unhandled argument type!"); 00086 case MVT::i8: ObjSize = 1; break; 00087 case MVT::i16: ObjSize = 2; break; 00088 case MVT::i32: ObjSize = 4; break; 00089 case MVT::i64: ObjSize = ArgIncrement = 8; break; 00090 case MVT::f32: ObjSize = 4; break; 00091 case MVT::f64: ObjSize = ArgIncrement = 8; break; 00092 } 00093 // Create the frame index object for this incoming parameter... 00094 int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); 00095 00096 // Create the SelectionDAG nodes corresponding to a load from this parameter 00097 SelectionDAGNode *FIN = new SelectionDAGNode(ISD::FrameIndex, MVT::i32); 00098 FIN->addValue(new ReducedValue_FrameIndex_i32(FI)); 00099 00100 SelectionDAGNode *Arg 00101 = new SelectionDAGNode(ISD::Load, ObjectVT, F.begin(), FIN); 00102 00103 // Add the SelectionDAGNodes to the SelectionDAG... note that there is no 00104 // reason to add chain nodes here. We know that no loads ore stores will 00105 // ever alias these loads, so we are free to perform the load at any time in 00106 // the function 00107 SD.addNode(FIN); 00108 SD.addNodeForValue(Arg, I); 00109 00110 ArgOffset += ArgIncrement; // Move on to the next argument... 00111 } 00112 00113 // If the function takes variable number of arguments, make a frame index for 00114 // the start of the first vararg value... for expansion of llvm.va_start. 00115 if (Fn.getFunctionType()->isVarArg()) 00116 VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset); 00117 } 00118 00119 void ISel::expandCall(SelectionDAG &SD, CallInst &CI) { 00120 assert(0 && "ISel::expandCall not implemented!"); 00121 } 00122 00123 /// createX86PatternInstructionSelector - This pass converts an LLVM function 00124 /// into a machine code representation using pattern matching and a machine 00125 /// description file. 00126 /// 00127 FunctionPass *llvm::createX86PatternInstructionSelector(TargetMachine &TM) { 00128 return new ISel(TM); 00129 } 00130 00131 #endif