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MachineInstrBuilder.h

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00001 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
00002 // 
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 // 
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file exposes a function named BuildMI, which is useful for dramatically
00011 // simplifying how MachineInstr's are created.  Instead of using code like this:
00012 //
00013 //   M = new MachineInstr(X86::ADDrr8);
00014 //   M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
00015 //   M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
00016 //
00017 // we can now use code like this:
00018 //
00019 //   M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
00020 //
00021 //===----------------------------------------------------------------------===//
00022 
00023 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
00024 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
00025 
00026 #include "llvm/CodeGen/MachineBasicBlock.h"
00027 
00028 namespace llvm {
00029 
00030 class MachineInstrBuilder {
00031   MachineInstr *MI;
00032 public:
00033   MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
00034 
00035   /// Allow automatic conversion to the machine instruction we are working on.
00036   ///
00037   operator MachineInstr*() const { return MI; }
00038   operator MachineBasicBlock::iterator() const { return MI; }
00039 
00040   /// addReg - Add a new virtual register operand...
00041   ///
00042   const MachineInstrBuilder &addReg(
00043     int RegNo,
00044     MachineOperand::UseType Ty = MachineOperand::Use) const {
00045     MI->addRegOperand(RegNo, Ty);
00046     return *this;
00047   }
00048 
00049   /// addReg - Add an LLVM value that is to be used as a register...
00050   ///
00051   const MachineInstrBuilder &addReg(
00052     Value *V,
00053     MachineOperand::UseType Ty = MachineOperand::Use) const {
00054     MI->addRegOperand(V, Ty);
00055     return *this;
00056   }
00057 
00058   /// addReg - Add an LLVM value that is to be used as a register...
00059   ///
00060   const MachineInstrBuilder &addCCReg(
00061     Value *V,
00062     MachineOperand::UseType Ty = MachineOperand::Use) const {
00063     MI->addCCRegOperand(V, Ty);
00064     return *this;
00065   }
00066 
00067   /// addRegDef - Add an LLVM value that is to be defined as a register... this
00068   /// is the same as addReg(V, MachineOperand::Def).
00069   ///
00070   const MachineInstrBuilder &addRegDef(Value *V) const {
00071     return addReg(V, MachineOperand::Def);
00072   }
00073 
00074   /// addPCDisp - Add an LLVM value to be treated as a PC relative
00075   /// displacement...
00076   ///
00077   const MachineInstrBuilder &addPCDisp(Value *V) const {
00078     MI->addPCDispOperand(V);
00079     return *this;
00080   }
00081 
00082   /// addMReg - Add a machine register operand...
00083   ///
00084   const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
00085                                         = MachineOperand::Use) const {
00086     MI->addMachineRegOperand(Reg, Ty);
00087     return *this;
00088   }
00089   
00090   /// addImm - Add a new immediate operand.
00091   ///
00092   const MachineInstrBuilder &addImm(int Val) const {
00093     MI->addZeroExtImmOperand(Val);
00094     return *this;
00095   }
00096 
00097   /// addSImm - Add a new sign extended immediate operand...
00098   ///
00099   const MachineInstrBuilder &addSImm(int val) const {
00100     MI->addSignExtImmOperand(val);
00101     return *this;
00102   }
00103 
00104   /// addZImm - Add a new zero extended immediate operand...
00105   ///
00106   const MachineInstrBuilder &addZImm(unsigned Val) const {
00107     MI->addZeroExtImmOperand(Val);
00108     return *this;
00109   }
00110 
00111   const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
00112     MI->addMachineBasicBlockOperand(MBB);
00113     return *this;
00114   }
00115 
00116   const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
00117     MI->addFrameIndexOperand(Idx);
00118     return *this;
00119   }
00120 
00121   const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx) const {
00122     MI->addConstantPoolIndexOperand(Idx);
00123     return *this;
00124   }
00125 
00126   const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
00127                                               bool isPCRelative = false, int Offset = 0) const {
00128     MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
00129     return *this;
00130   }
00131 
00132   const MachineInstrBuilder &addExternalSymbol(const char *FnName,
00133                                                bool isPCRelative = false) const{
00134     MI->addExternalSymbolOperand(FnName, isPCRelative);
00135     return *this;
00136   }
00137 };
00138 
00139 /// BuildMI - Builder interface.  Specify how to create the initial instruction
00140 /// itself.  NumOperands is the number of operands to the machine instruction to
00141 /// allow for memory efficient representation of machine instructions.
00142 ///
00143 inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
00144   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
00145 }
00146 
00147 /// BuildMI - This version of the builder sets up the first operand as a
00148 /// destination virtual register.  NumOperands is the number of additional add*
00149 /// calls that are expected, not including the destination register.
00150 ///
00151 inline MachineInstrBuilder BuildMI(
00152   int Opcode, unsigned NumOperands,
00153   unsigned DestReg,
00154   MachineOperand::UseType useType = MachineOperand::Def) {
00155   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
00156                                    true, true)).addReg(DestReg, useType);
00157 }
00158 
00159 /// BuildMI - This version of the builder inserts the newly-built
00160 /// instruction before the given position in the given MachineBasicBlock, and
00161 /// sets up the first operand as a destination virtual register.
00162 /// NumOperands is the number of additional add* calls that are expected,
00163 /// not including the destination register.
00164 ///
00165 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
00166                                    MachineBasicBlock::iterator I,
00167                                    int Opcode, unsigned NumOperands,
00168                                    unsigned DestReg) {
00169   MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
00170   BB.insert(I, MI);
00171   return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
00172 }
00173 
00174 /// BuildMI - This version of the builder inserts the newly-built
00175 /// instruction before the given position in the given MachineBasicBlock, and
00176 /// does NOT take a destination register.
00177 ///
00178 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
00179                                    MachineBasicBlock::iterator I,
00180                                    int Opcode, unsigned NumOperands) {
00181   MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
00182   BB.insert(I, MI);
00183   return MachineInstrBuilder(MI);
00184 }
00185 
00186 /// BuildMI - This version of the builder inserts the newly-built
00187 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
00188 /// destination register.
00189 ///
00190 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
00191                                    unsigned NumOperands) {
00192   return BuildMI(*BB, BB->end(), Opcode, NumOperands);
00193 }
00194 
00195 /// BuildMI - This version of the builder inserts the newly-built
00196 /// instruction at the end of the given MachineBasicBlock, and sets up the first
00197 /// operand as a destination virtual register. NumOperands is the number of
00198 /// additional add* calls that are expected, not including the destination
00199 /// register.
00200 ///
00201 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
00202                                    unsigned NumOperands, unsigned DestReg) {
00203   return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
00204 }
00205 
00206 } // End llvm namespace
00207 
00208 #endif