LLVM API Documentation
00001 //===-- SparcV9RegInfo.h - SparcV9 Target Register Info ---------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file is used to describe the register file of the SparcV9 target to 00011 // its register allocator. 00012 // 00013 //===----------------------------------------------------------------------===// 00014 00015 #ifndef SPARCV9REGINFO_H 00016 #define SPARCV9REGINFO_H 00017 00018 #include "llvm/ADT/hash_map" 00019 #include <string> 00020 #include <cassert> 00021 00022 namespace llvm { 00023 00024 class TargetMachine; 00025 class IGNode; 00026 class Type; 00027 class Value; 00028 class LiveRangeInfo; 00029 class Function; 00030 class LiveRange; 00031 class AddedInstrns; 00032 class MachineInstr; 00033 class BasicBlock; 00034 class SparcV9TargetMachine; 00035 00036 00037 ///---------------------------------------------------------------------------- 00038 /// Interface to description of machine register class (e.g., int reg class 00039 /// float reg class etc) 00040 /// 00041 class TargetRegClassInfo { 00042 protected: 00043 const unsigned RegClassID; // integer ID of a reg class 00044 const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc. 00045 const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc. 00046 00047 public: 00048 inline unsigned getRegClassID() const { return RegClassID; } 00049 inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; } 00050 inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; } 00051 00052 // This method marks the registers used for a given register number. 00053 // This defaults to marking a single register but may mark multiple 00054 // registers when a single number denotes paired registers. 00055 // 00056 virtual void markColorsUsed(unsigned RegInClass, 00057 int UserRegType, 00058 int RegTypeWanted, 00059 std::vector<bool> &IsColorUsedArr) const { 00060 assert(RegInClass < NumOfAllRegs && RegInClass < IsColorUsedArr.size()); 00061 assert(UserRegType == RegTypeWanted && 00062 "Default method is probably incorrect for class with multiple types."); 00063 IsColorUsedArr[RegInClass] = true; 00064 } 00065 00066 // This method finds unused registers of the specified register type, 00067 // using the given "used" flag array IsColorUsedArr. It defaults to 00068 // checking a single entry in the array directly, but that can be overridden 00069 // for paired registers and other such silliness. 00070 // It returns -1 if no unused color is found. 00071 // 00072 virtual int findUnusedColor(int RegTypeWanted, 00073 const std::vector<bool> &IsColorUsedArr) const { 00074 // find first unused color in the IsColorUsedArr directly 00075 unsigned NC = this->getNumOfAvailRegs(); 00076 assert(IsColorUsedArr.size() >= NC && "Invalid colors-used array"); 00077 for (unsigned c = 0; c < NC; c++) 00078 if (!IsColorUsedArr[c]) 00079 return c; 00080 return -1; 00081 } 00082 00083 // This method should find a color which is not used by neighbors 00084 // (i.e., a false position in IsColorUsedArr) and 00085 virtual void colorIGNode(IGNode *Node, 00086 const std::vector<bool> &IsColorUsedArr) const = 0; 00087 00088 // Check whether a specific register is volatile, i.e., whether it is not 00089 // preserved across calls 00090 virtual bool isRegVolatile(int Reg) const = 0; 00091 00092 // Check whether a specific register is modified as a side-effect of the 00093 // call instruction itself, 00094 virtual bool modifiedByCall(int Reg) const { return false; } 00095 00096 virtual const char* const getRegName(unsigned reg) const = 0; 00097 00098 TargetRegClassInfo(unsigned ID, unsigned NVR, unsigned NAR) 00099 : RegClassID(ID), NumOfAvailRegs(NVR), NumOfAllRegs(NAR) {} 00100 }; 00101 00102 /// SparcV9RegInfo - Interface to register info of SparcV9 target machine 00103 /// 00104 class SparcV9RegInfo { 00105 SparcV9RegInfo(const SparcV9RegInfo &); // DO NOT IMPLEMENT 00106 void operator=(const SparcV9RegInfo &); // DO NOT IMPLEMENT 00107 protected: 00108 // A vector of all machine register classes 00109 // 00110 std::vector<const TargetRegClassInfo *> MachineRegClassArr; 00111 00112 public: 00113 const TargetMachine ⌖ 00114 00115 // A register can be initialized to an invalid number. That number can 00116 // be obtained using this method. 00117 // 00118 static int getInvalidRegNum() { return -1; } 00119 00120 00121 // According the definition of a MachineOperand class, a Value in a 00122 // machine instruction can go into either a normal register or a 00123 // condition code register. If isCCReg is true below, the ID of the condition 00124 // code register class will be returned. Otherwise, the normal register 00125 // class (eg. int, float) must be returned. 00126 00127 // To find the register class used for a specified Type 00128 // 00129 unsigned getRegClassIDOfType (const Type *type, 00130 bool isCCReg = false) const; 00131 00132 // To find the register class to which a specified register belongs 00133 // 00134 unsigned getRegClassIDOfRegType(int regType) const; 00135 00136 unsigned getRegClassIDOfReg(int unifiedRegNum) const { 00137 unsigned classId = 0; 00138 (void) getClassRegNum(unifiedRegNum, classId); 00139 return classId; 00140 } 00141 00142 unsigned int getNumOfRegClasses() const { 00143 return MachineRegClassArr.size(); 00144 } 00145 00146 const TargetRegClassInfo *getMachineRegClass(unsigned i) const { 00147 return MachineRegClassArr[i]; 00148 } 00149 00150 // getZeroRegNum - returns the register that is hardwired to always contain 00151 // zero, if any (-1 if none). This is the unified register number. 00152 // 00153 unsigned getZeroRegNum() const; 00154 00155 // The following methods are used to color special live ranges (e.g. 00156 // method args and return values etc.) with specific hardware registers 00157 // as required. See SparcRegInfo.cpp for the implementation for Sparc. 00158 // 00159 void suggestRegs4MethodArgs(const Function *Func, 00160 LiveRangeInfo& LRI) const; 00161 00162 void suggestRegs4CallArgs(MachineInstr *CallI, 00163 LiveRangeInfo& LRI) const; 00164 00165 void suggestReg4RetValue(MachineInstr *RetI, 00166 LiveRangeInfo& LRI) const; 00167 00168 void colorMethodArgs(const Function *Func, 00169 LiveRangeInfo &LRI, 00170 std::vector<MachineInstr*>& InstrnsBefore, 00171 std::vector<MachineInstr*>& InstrnsAfter) const; 00172 00173 00174 // Check whether a specific register is volatile, i.e., whether it is not 00175 // preserved across calls 00176 inline bool isRegVolatile(int RegClassID, int Reg) const { 00177 return MachineRegClassArr[RegClassID]->isRegVolatile(Reg); 00178 } 00179 00180 // Check whether a specific register is modified as a side-effect of the 00181 // call instruction itself, 00182 inline bool modifiedByCall(int RegClassID, int Reg) const { 00183 return MachineRegClassArr[RegClassID]->modifiedByCall(Reg); 00184 } 00185 00186 // getCallAddressReg - Returns the reg used for pushing the address 00187 // when a method is called. This can be used for other purposes 00188 // between calls 00189 // 00190 unsigned getCallAddressReg() const; 00191 00192 // Each register class has a separate space for register IDs. To convert 00193 // a regId in a register class to a common Id, or vice versa, 00194 // we use the folloing two methods. 00195 // 00196 // This method converts from class reg. number to unified register number. 00197 int getUnifiedRegNum(unsigned regClassID, int reg) const { 00198 if (reg == getInvalidRegNum()) { return getInvalidRegNum(); } 00199 assert(regClassID < getNumOfRegClasses() && "Invalid register class"); 00200 int totalRegs = 0; 00201 for (unsigned rcid = 0; rcid < regClassID; ++rcid) 00202 totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs(); 00203 return reg + totalRegs; 00204 } 00205 00206 // This method converts the unified number to the number in its class, 00207 // and returns the class ID in regClassID. 00208 int getClassRegNum(int uRegNum, unsigned& regClassID) const { 00209 if (uRegNum == getInvalidRegNum()) { return getInvalidRegNum(); } 00210 00211 int totalRegs = 0, rcid = 0, NC = getNumOfRegClasses(); 00212 while (rcid < NC && 00213 uRegNum>= totalRegs+(int)MachineRegClassArr[rcid]->getNumOfAllRegs()) 00214 { 00215 totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs(); 00216 rcid++; 00217 } 00218 if (rcid == NC) { 00219 assert(0 && "getClassRegNum(): Invalid register number"); 00220 return getInvalidRegNum(); 00221 } 00222 regClassID = rcid; 00223 return uRegNum - totalRegs; 00224 } 00225 00226 // Returns the assembly-language name of the specified machine register. 00227 // 00228 const char * const getUnifiedRegName(int UnifiedRegNum) const { 00229 unsigned regClassID = getNumOfRegClasses(); // initialize to invalid value 00230 int regNumInClass = getClassRegNum(UnifiedRegNum, regClassID); 00231 return MachineRegClassArr[regClassID]->getRegName(regNumInClass); 00232 } 00233 00234 // This method gives the the number of bytes of stack space allocated 00235 // to a register when it is spilled to the stack, according to its 00236 // register type. 00237 // 00238 // For SparcV9, currently we allocate 8 bytes on stack for all 00239 // register types. We can optimize this later if necessary to save stack 00240 // space (However, should make sure that stack alignment is correct) 00241 // 00242 int getSpilledRegSize(int RegType) const { 00243 return 8; 00244 } 00245 00246 private: 00247 // Number of registers used for passing int args (usually 6: %o0 - %o5) 00248 // 00249 unsigned const NumOfIntArgRegs; 00250 00251 // Number of registers used for passing float args (usually 32: %f0 - %f31) 00252 // 00253 unsigned const NumOfFloatArgRegs; 00254 00255 // The following methods are used to color special live ranges (e.g. 00256 // function args and return values etc.) with specific hardware registers 00257 // as required. See SparcV9RegInfo.cpp for the implementation. 00258 // 00259 void suggestReg4RetAddr(MachineInstr *RetMI, 00260 LiveRangeInfo &LRI) const; 00261 00262 void suggestReg4CallAddr(MachineInstr *CallMI, LiveRangeInfo &LRI) const; 00263 00264 // Helper used by the all the getRegType() functions. 00265 int getRegTypeForClassAndType(unsigned regClassID, const Type* type) const; 00266 00267 public: 00268 // Type of registers available in SparcV9. There can be several reg types 00269 // in the same class. For instace, the float reg class has Single/Double 00270 // types 00271 // 00272 enum RegTypes { 00273 IntRegType, 00274 FPSingleRegType, 00275 FPDoubleRegType, 00276 IntCCRegType, 00277 FloatCCRegType, 00278 SpecialRegType 00279 }; 00280 00281 // The actual register classes in the SparcV9 00282 // 00283 // **** WARNING: If this enum order is changed, also modify 00284 // getRegisterClassOfValue method below since it assumes this particular 00285 // order for efficiency. 00286 // 00287 enum RegClassIDs { 00288 IntRegClassID, // Integer 00289 FloatRegClassID, // Float (both single/double) 00290 IntCCRegClassID, // Int Condition Code 00291 FloatCCRegClassID, // Float Condition code 00292 SpecialRegClassID // Special (unallocated) registers 00293 }; 00294 00295 SparcV9RegInfo(const SparcV9TargetMachine &tgt); 00296 00297 ~SparcV9RegInfo() { 00298 for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i) 00299 delete MachineRegClassArr[i]; 00300 } 00301 00302 // Returns the register containing the return address. 00303 // It should be made sure that this register contains the return 00304 // value when a return instruction is reached. 00305 // 00306 unsigned getReturnAddressReg() const; 00307 00308 // Number of registers used for passing int args (usually 6: %o0 - %o5) 00309 // and float args (usually 32: %f0 - %f31) 00310 // 00311 unsigned const getNumOfIntArgRegs() const { return NumOfIntArgRegs; } 00312 unsigned const getNumOfFloatArgRegs() const { return NumOfFloatArgRegs; } 00313 00314 // Compute which register can be used for an argument, if any 00315 // 00316 int regNumForIntArg(bool inCallee, bool isVarArgsCall, 00317 unsigned argNo, unsigned& regClassId) const; 00318 00319 int regNumForFPArg(unsigned RegType, bool inCallee, bool isVarArgsCall, 00320 unsigned argNo, unsigned& regClassId) const; 00321 00322 00323 // method used for printing a register for debugging purposes 00324 // 00325 void printReg(const LiveRange *LR) const; 00326 00327 // To obtain the return value and the indirect call address (if any) 00328 // contained in a CALL machine instruction 00329 // 00330 const Value * getCallInstRetVal(const MachineInstr *CallMI) const; 00331 const Value * getCallInstIndirectAddrVal(const MachineInstr *CallMI) const; 00332 00333 // The following methods are used to generate "copy" machine instructions 00334 // for an architecture. Currently they are used in TargetRegClass 00335 // interface. However, they can be moved to TargetInstrInfo interface if 00336 // necessary. 00337 // 00338 // The function regTypeNeedsScratchReg() can be used to check whether a 00339 // scratch register is needed to copy a register of type `regType' to 00340 // or from memory. If so, such a scratch register can be provided by 00341 // the caller (e.g., if it knows which regsiters are free); otherwise 00342 // an arbitrary one will be chosen and spilled by the copy instructions. 00343 // If a scratch reg is needed, the reg. type that must be used 00344 // for scratch registers is returned in scratchRegType. 00345 // 00346 00347 bool regTypeNeedsScratchReg(int RegType, 00348 int& scratchRegClassId) const; 00349 00350 void cpReg2RegMI(std::vector<MachineInstr*>& mvec, 00351 unsigned SrcReg, unsigned DestReg, 00352 int RegType) const; 00353 00354 void cpReg2MemMI(std::vector<MachineInstr*>& mvec, 00355 unsigned SrcReg, unsigned DestPtrReg, 00356 int Offset, int RegType, int scratchReg = -1) const; 00357 00358 void cpMem2RegMI(std::vector<MachineInstr*>& mvec, 00359 unsigned SrcPtrReg, int Offset, unsigned DestReg, 00360 int RegType, int scratchReg = -1) const; 00361 00362 void cpValue2Value(Value *Src, Value *Dest, 00363 std::vector<MachineInstr*>& mvec) const; 00364 00365 // Get the register type for a register identified different ways. 00366 // Note that getRegTypeForLR(LR) != getRegTypeForDataType(LR->getType())! 00367 // The reg class of a LR depends both on the Value types in it and whether 00368 // they are CC registers or not (for example). 00369 int getRegTypeForDataType(const Type* type) const; 00370 int getRegTypeForLR(const LiveRange *LR) const; 00371 int getRegType(int unifiedRegNum) const; 00372 00373 unsigned getFramePointer() const; 00374 unsigned getStackPointer() const; 00375 }; 00376 00377 } // End llvm namespace 00378 00379 #endif // SPARCV9REGINFO_H