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SparcV9Internals.h

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00001 //===-- SparcV9Internals.h --------------------------------------*- C++ -*-===//
00002 // 
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file was developed by the LLVM research group and is distributed under
00006 // the University of Illinois Open Source License. See LICENSE.TXT for details.
00007 // 
00008 //===----------------------------------------------------------------------===//
00009 // 
00010 // This file defines stuff that is to be private to the SparcV9 backend, but is
00011 // shared among different portions of the backend.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef SPARCV9INTERNALS_H
00016 #define SPARCV9INTERNALS_H
00017 
00018 #include "llvm/CodeGen/MachineInstrBuilder.h"
00019 #include "llvm/Target/TargetMachine.h"
00020 #include "llvm/Target/TargetSchedInfo.h"
00021 #include "llvm/Target/TargetFrameInfo.h"
00022 #include "SparcV9RegInfo.h"
00023 #include "llvm/Type.h"
00024 #include "SparcV9RegClassInfo.h"
00025 #include "llvm/Config/sys/types.h"
00026 
00027 namespace llvm {
00028 
00029 class LiveRange;
00030 class SparcV9TargetMachine;
00031 class ModulePass;
00032 class GetElementPtrInst;
00033 
00034 enum SparcV9InstrSchedClass {
00035   SPARC_NONE,   /* Instructions with no scheduling restrictions */
00036   SPARC_IEUN,   /* Integer class that can use IEU0 or IEU1 */
00037   SPARC_IEU0,   /* Integer class IEU0 */
00038   SPARC_IEU1,   /* Integer class IEU1 */
00039   SPARC_FPM,    /* FP Multiply or Divide instructions */
00040   SPARC_FPA,    /* All other FP instructions */ 
00041   SPARC_CTI,    /* Control-transfer instructions */
00042   SPARC_LD,   /* Load instructions */
00043   SPARC_ST,   /* Store instructions */
00044   SPARC_SINGLE,   /* Instructions that must issue by themselves */
00045   
00046   SPARC_INV,    /* This should stay at the end for the next value */
00047   SPARC_NUM_SCHED_CLASSES = SPARC_INV
00048 };
00049 
00050 
00051 //---------------------------------------------------------------------------
00052 // enum SparcV9MachineOpCode. 
00053 // const TargetInstrDescriptor SparcV9MachineInstrDesc[]
00054 // 
00055 // Purpose:
00056 //   Description of UltraSparcV9 machine instructions.
00057 // 
00058 //---------------------------------------------------------------------------
00059 
00060 namespace V9 {
00061   enum SparcV9MachineOpCode {
00062 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
00063           NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS)             \
00064    ENUM,
00065 #include "SparcV9Instr.def"
00066 
00067     // End-of-array marker
00068     INVALID_OPCODE,
00069     NUM_REAL_OPCODES = PHI,   // number of valid opcodes
00070     NUM_TOTAL_OPCODES = INVALID_OPCODE
00071   };
00072 }
00073 
00074 // Array of machine instruction descriptions...
00075 extern const TargetInstrDescriptor SparcV9MachineInstrDesc[];
00076 
00077 //---------------------------------------------------------------------------
00078 // class SparcV9SchedInfo
00079 // 
00080 // Purpose:
00081 //   Interface to instruction scheduling information for UltraSPARC.
00082 //   The parameter values above are based on UltraSPARC IIi.
00083 //---------------------------------------------------------------------------
00084 
00085 class SparcV9SchedInfo: public TargetSchedInfo {
00086 public:
00087   SparcV9SchedInfo(const TargetMachine &tgt);
00088 protected:
00089   virtual void initializeResources();
00090 };
00091 
00092 /// createStackSlotsPass - External interface to stack-slots pass that enters 2
00093 /// empty slots at the top of each function stack
00094 ///
00095 FunctionPass *createStackSlotsPass(const TargetMachine &TM);
00096 
00097 /// Specializes LLVM code for a target machine.
00098 ///
00099 FunctionPass *createPreSelectionPass(const TargetMachine &TM);
00100 
00101 // DecomposeMultiDimRefs - Convert multi-dimensional references consisting of
00102 // any combination of 2 or more array and structure indices into a sequence of
00103 // instructions (using getelementpr and cast) so that each instruction has at
00104 // most one index (except structure references, which need an extra leading
00105 // index of [0]).
00106 // This pass decomposes all multi-dimensional references in a function.
00107 FunctionPass *createDecomposeMultiDimRefsPass();
00108 
00109 // This function decomposes a single instance of such a reference.
00110 // Return value: true if the instruction was replaced; false otherwise.
00111 // 
00112 bool DecomposeArrayRef(GetElementPtrInst* GEP);
00113 
00114 /// Peephole optimization pass operating on machine code
00115 ///
00116 FunctionPass *createPeepholeOptsPass(const TargetMachine &TM);
00117 
00118 /// Writes out assembly code for the module, one function at a time
00119 ///
00120 FunctionPass *createAsmPrinterPass(std::ostream &Out, TargetMachine &TM);
00121 
00122 /// getPrologEpilogInsertionPass - Inserts prolog/epilog code.
00123 ///
00124 FunctionPass* createPrologEpilogInsertionPass();
00125 
00126 /// getBytecodeAsmPrinterPass - Emits final LLVM bytecode to assembly file.
00127 ///
00128 ModulePass* createBytecodeAsmPrinterPass(std::ostream &Out);
00129 
00130 FunctionPass *createSparcV9MachineCodeDestructionPass();
00131 
00132 } // End llvm namespace
00133 
00134 #endif