LLVM API Documentation
00001 //===- PPC64InstrInfo.cpp - PowerPC64 Instruction Information ---*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file was developed by the LLVM research group and is distributed under 00006 // the University of Illinois Open Source License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file contains the PowerPC implementation of the TargetInstrInfo class. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #include "PowerPC.h" 00015 #include "PPC64InstrInfo.h" 00016 #include "PPC64GenInstrInfo.inc" 00017 #include "llvm/CodeGen/MachineInstrBuilder.h" 00018 #include <iostream> 00019 using namespace llvm; 00020 00021 PPC64InstrInfo::PPC64InstrInfo() 00022 : TargetInstrInfo(PPC64Insts, sizeof(PPC64Insts)/sizeof(PPC64Insts[0])) { } 00023 00024 bool PPC64InstrInfo::isMoveInstr(const MachineInstr& MI, 00025 unsigned& sourceReg, 00026 unsigned& destReg) const { 00027 MachineOpCode oc = MI.getOpcode(); 00028 if (oc == PPC::OR) { // or r1, r2, r2 00029 assert(MI.getNumOperands() == 3 && 00030 MI.getOperand(0).isRegister() && 00031 MI.getOperand(1).isRegister() && 00032 MI.getOperand(2).isRegister() && 00033 "invalid PPC OR instruction!"); 00034 if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { 00035 sourceReg = MI.getOperand(1).getReg(); 00036 destReg = MI.getOperand(0).getReg(); 00037 return true; 00038 } 00039 } else if (oc == PPC::ADDI) { // addi r1, r2, 0 00040 assert(MI.getNumOperands() == 3 && 00041 MI.getOperand(0).isRegister() && 00042 MI.getOperand(2).isImmediate() && 00043 "invalid PPC ADDI instruction!"); 00044 if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImmedValue()==0) { 00045 sourceReg = MI.getOperand(1).getReg(); 00046 destReg = MI.getOperand(0).getReg(); 00047 return true; 00048 } 00049 } else if (oc == PPC::FMR) { // fmr r1, r2 00050 assert(MI.getNumOperands() == 2 && 00051 MI.getOperand(0).isRegister() && 00052 MI.getOperand(1).isRegister() && 00053 "invalid PPC FMR instruction"); 00054 sourceReg = MI.getOperand(1).getReg(); 00055 destReg = MI.getOperand(0).getReg(); 00056 return true; 00057 } 00058 return false; 00059 }