NCC options are available in the NCC Preferences (in menu File / Preferences... , "Tools" section, "NCC" tab).
We recommend hierarchical over flat comparison because hierarchical comparisons are faster and the mismatch diagnostics are much more precise and intelligible. However, transistor size checking limits what NCC can compare hierarchically because the size of a schematic transistor may depend upon the instance path.
The best way to use NCC is to initially perform all your comparisons hierarchically. This will typically require many iterations. Once you have gotten your cell to pass a hierarchical comparison, turn on size checking. This will report transistor size mismatches.
The two tolerance values allow the user to specify how much more the larger of the two matched transistors may be than the smaller before NCC reports a size mismatch. The "Relative size tolerance" is the difference in percentage. The "Absolute size tolerance" is the difference in units. NCC reports a size mismatch when both tolerances are exceeded.
If you choose "Check transistor sizes" and "Hierarchical Comparison" simultaneously then NCC restricts which cells it treats hierarchically to ensure a correct answer in the presence of automatically sized transistors. For this case it compares a pair of cells hierarchically if and only if each cell is instantiated exactly once.
NCC uses the "Relative size tolerance" and the "Absolute size tolerance" fields to determine how close transistor widths and lengths have to be before it will combine them in series or in parallel.
If the user wishes to check body connections, then she must check this box. Then, the NCC will make sure that the schematics and layout have matching connections to all transistor body ports.
Note that only certain versions of schematic transistors have body ports. The designer must use those schematic transistors. In addition, in this version of Electric, layout transistors also have body ports. The designer must specify the connectivity of the body port of layout transistors using well arcs.
Note that the body port of the layout transistors are in the very center of the transistor and are "hard to select". If you wish to connect to the body port of a layout transistor you may need to push the "Toggle Special Select" button in the Electric tool bar.
At the moment, only the MoCMOS layout technology has been augmented to allow body connections. This is because this implementation of body checking is experimental. We'd like to get some feedback from users before we go to the effort of generalizing all other technologies.
It is occasionally useful to continue checking even after mismatches have been detected. For example, the designer might find that although a cell mismatches, it cannot be fixed because someone else designed it. When asked to continue, NCC will do the following when comparing cells that use the mismatched one:
If the check box "Don't recheck cells that have passed in this Electric run" is checked, then NCC skips a cell if that cell passed NCC in a previous run and the designer hasn't since changed the cell.
Note that NCC only remembers when cells were last checked during a single run of Electric. If you run NCC, quit Electric, restart Electric, and rerun NCC, all cells will be checked.