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power.h
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1 /* Copyright (c) 2006, 2007, 2008 Eric B. Weddington
2  Copyright (c) 2011 Frédéric Nadeau
3  All rights reserved.
4 
5  Redistribution and use in source and binary forms, with or without
6  modification, are permitted provided that the following conditions are met:
7 
8  * Redistributions of source code must retain the above copyright
9  notice, this list of conditions and the following disclaimer.
10  * Redistributions in binary form must reproduce the above copyright
11  notice, this list of conditions and the following disclaimer in
12  the documentation and/or other materials provided with the
13  distribution.
14  * Neither the name of the copyright holders nor the names of
15  contributors may be used to endorse or promote products derived
16  from this software without specific prior written permission.
17 
18  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
22  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  POSSIBILITY OF SUCH DAMAGE. */
29 
30 /* $Id$ */
31 
32 #ifndef _AVR_POWER_H_
33 #define _AVR_POWER_H_ 1
34 
35 #include <avr/io.h>
36 #include <stdint.h>
37 
38 
39 /** \file */
40 /** \defgroup avr_power <avr/power.h>: Power Reduction Management
41 
42 \code #include <avr/power.h>\endcode
43 
44 Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that
45 allow you to reduce power consumption by disabling or enabling various on-board
46 peripherals as needed. Some devices have the XTAL Divide Control Register
47 (XDIV) which offer similar functionality as System Clock Prescale
48 Register (CLKPR).
49 
50 There are many macros in this header file that provide an easy interface
51 to enable or disable on-board peripherals to reduce power. See the table below.
52 
53 \note Not all AVR devices have a Power Reduction Register (for example
54 the ATmega8). On those devices without a Power Reduction Register, the
55 power reduction macros are not available..
56 
57 \note Not all AVR devices contain the same peripherals (for example, the LCD
58 interface), or they will be named differently (for example, USART and
59 USART0). Please consult your device's datasheet, or the header file, to
60 find out which macros are applicable to your device.
61 
62 \note For device using the XTAL Divide Control Register (XDIV), when prescaler
63 is used, Timer/Counter0 can only be used in asynchronous mode. Keep in mind
64 that Timer/Counter0 source shall be less than ¼th of peripheral clock.
65 Therefore, when using a typical 32.768 kHz crystal, one shall not scale
66 the clock below 131.072 kHz.
67 
68 */
69 
70 
71 /** \addtogroup avr_power
72 
73 \anchor avr_powermacros
74 <small>
75 <center>
76 <table border="3">
77  <tr>
78  <td width="10%"><strong>Power Macro</strong></td>
79  <td width="15%"><strong>Description</strong></td>
80  <td width="75%"><strong>Applicable for device</strong></td>
81  </tr>
82 
83  <tr>
84  <td>power_aca_disable()</td>
85  <td> Disable The Analog Comparator On PortA </td>
86  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
87  </tr>
88 
89  <tr>
90  <td>power_aca_enable()</td>
91  <td> Enable The Analog Comparator On PortA </td>
92  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
93  </tr>
94 
95  <tr>
96  <td>power_acb_disable()</td>
97  <td> Disable The Analog Comparator On PortB </td>
98  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
99  </tr>
100 
101  <tr>
102  <td>power_acb_enable()</td>
103  <td> Enable The Analog Comparator On PortB </td>
104  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
105  </tr>
106 
107  <tr>
108  <td>power_adc_disable()</td>
109  <td>Disable the Analog to Digital Converter module.</td>
110  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
111  </tr>
112 
113  <tr>
114  <td>power_adc_enable()</td>
115  <td>Enable the Analog to Digital Converter module.</td>
116  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
117  </tr>
118 
119  <tr>
120  <td>power_adca_disable()</td>
121  <td> Disable the Analog to Digital Converter module On PortA </td>
122  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
123  </tr>
124 
125  <tr>
126  <td>power_adca_enable()</td>
127  <td> Enable the Analog to Digital Converter module On PortA </td>
128  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
129  </tr>
130 
131  <tr>
132  <td>power_adcb_disable()</td>
133  <td> Disable the Analog to Digital Converter module On PortB </td>
134  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
135  </tr>
136 
137  <tr>
138  <td>power_adcb_enable()</td>
139  <td> Enable the Analog to Digital Converter module On PortB </td>
140  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
141  </tr>
142 
143  <tr>
144  <td>power_aes_disable()</td>
145  <td> Disable the AES module </td>
146  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90SCR100</td>
147  </tr>
148 
149  <tr>
150  <td>power_aes_enable()</td>
151  <td> Enable the AES module </td>
152  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90SCR100</td>
153  </tr>
154 
155  <tr>
156  <td>power_all_disable()</td>
157  <td>Disable all modules.</td>
158  <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64D4, ATxmega128D4, ATxmega16D4, ATxmega32D4, ATxmega32D3, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny828, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
159  </tr>
160 
161  <tr>
162  <td>power_all_enable()</td>
163  <td>Enable all modules.</td>
164  <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64D4, ATxmega128D4, ATxmega16D4, ATxmega32D4, ATxmega32D3, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny828, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
165  </tr>
166 
167  <tr>
168  <td>power_can_disable()</td>
169  <td> Disable the CAN module </td>
170  <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
171  </tr>
172 
173  <tr>
174  <td>power_can_enable()</td>
175  <td> Enable the CAN module </td>
176  <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
177  </tr>
178 
179  <tr>
180  <td>power_cinterface_disable()</td>
181  <td> Disable the CINTERFACE module </td>
182  <td>ATA5790, ATA5795, ATA5702M322</td>
183  </tr>
184 
185  <tr>
186  <td>power_cinterface_enable()</td>
187  <td> Enable the CINTERFACE module </td>
188  <td>ATA5790, ATA5795, ATA5702M322</td>
189  </tr>
190 
191  <tr>
192  <td>power_crypto_disable()</td>
193  <td> Disable the CRYPTO module </td>
194  <td>ATA5790, ATA5795, ATA5702M322</td>
195  </tr>
196 
197  <tr>
198  <td>power_crypto_enable()</td>
199  <td> Enable the CRYPTO module </td>
200  <td>ATA5790, ATA5795, ATA5702M322</td>
201  </tr>
202 
203  <tr>
204  <td>power_daca_disable()</td>
205  <td> Disable the DAC module on PortA </td>
206  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
207  </tr>
208 
209  <tr>
210  <td>power_daca_enable()</td>
211  <td> Enable the DAC module on PortA </td>
212  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
213  </tr>
214 
215  <tr>
216  <td>power_dacb_disable()</td>
217  <td> Disable the DAC module on PortB </td>
218  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
219  </tr>
220 
221  <tr>
222  <td>power_dacb_enable()</td>
223  <td> Enable the DAC module on PortB </td>
224  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
225  </tr>
226 
227  <tr>
228  <td>power_dma_disable()</td>
229  <td> Disable the DMA module </td>
230  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
231  </tr>
232 
233  <tr>
234  <td>power_dma_enable()</td>
235  <td> Enable the DMA module </td>
236  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
237  </tr>
238 
239  <tr>
240  <td>power_ebi_disable()</td>
241  <td> Disable the EBI module </td>
242  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
243  </tr>
244 
245  <tr>
246  <td>power_ebi_enable()</td>
247  <td> Enable the EBI module </td>
248  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
249  </tr>
250 
251  <tr>
252  <td>power_evsys_disable()</td>
253  <td> Disable the EVSYS module </td>
254  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
255  </tr>
256 
257  <tr>
258  <td>power_evsys_enable()</td>
259  <td> Enable the EVSYS module </td>
260  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
261  </tr>
262 
263  <tr>
264  <td>power_hiresc_disable()</td>
265  <td> Disable the HIRES module on PortC </td>
266  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
267  </tr>
268 
269  <tr>
270  <td>power_hiresc_enable()</td>
271  <td> Enable the HIRES module on PortC </td>
272  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
273  </tr>
274 
275  <tr>
276  <td>power_hiresd_disable()</td>
277  <td> Disable the HIRES module on PortD </td>
278  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
279  </tr>
280 
281  <tr>
282  <td>power_hiresd_enable()</td>
283  <td> Enable the HIRES module on PortD </td>
284  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
285  </tr>
286 
287  <tr>
288  <td>power_hirese_disable()</td>
289  <td> Disable the HIRES module on PortE </td>
290  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
291  </tr>
292 
293  <tr>
294  <td>power_hirese_enable()</td>
295  <td> Enable the HIRES module on PortE </td>
296  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
297  </tr>
298 
299  <tr>
300  <td>power_hiresf_disable()</td>
301  <td> Disable the HIRES module on PortF </td>
302  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
303  </tr>
304 
305  <tr>
306  <td>power_hiresf_enable()</td>
307  <td> Enable the HIRES module on PortF </td>
308  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
309  </tr>
310 
311  <tr>
312  <td>power_hsspi_disable()</td>
313  <td> Disable the HSPPI module </td>
314  <td>AT90SCR100</td>
315  </tr>
316 
317  <tr>
318  <td>power_hsspi_enable()</td>
319  <td> Enable the HSPPI module </td>
320  <td>AT90SCR100</td>
321  </tr>
322 
323  <tr>
324  <td>power_irdriver_disable()</td>
325  <td> Disable the IRDRIVER module </td>
326  <td>ATA5790, ATA5795</td>
327  </tr>
328 
329  <tr>
330  <td>power_irdriver_enable()</td>
331  <td> Enable the IRDRIVER module </td>
332  <td>ATA5790, ATA5795</td>
333  </tr>
334 
335  <tr>
336  <td>power_kb_disable()</td>
337  <td> Disable the KB module </td>
338  <td>AT90SCR100</td>
339  </tr>
340 
341  <tr>
342  <td>power_kb_enable()</td>
343  <td> Enable the KB module </td>
344  <td>AT90SCR100</td>
345  </tr>
346 
347  <tr>
348  <td>power_lcd_disable()</td>
349  <td>Disable the LCD module.</td>
350  <td>ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P</td>
351  </tr>
352 
353  <tr>
354  <td>power_lcd_enable()</td>
355  <td>Enable the LCD module.</td>
356  <td>ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P</td>
357  </tr>
358 
359  <tr>
360  <td>power_lfreceiver_disable()</td>
361  <td> Disable the LFRECEIVER module </td>
362  <td>ATA5790, ATA5702M322</td>
363  </tr>
364 
365  <tr>
366  <td>power_lfreceiver_enable()</td>
367  <td> Enable the LFRECEIVER module </td>
368  <td>ATA5790, ATA5702M322</td>
369  </tr>
370 
371  <tr>
372  <td>power_lin_disable()</td>
373  <td> Disable the LIN module </td>
374  <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251</td>
375  </tr>
376 
377  <tr>
378  <td>power_lin_enable()</td>
379  <td> Enable the LIN module </td>
380  <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251</td>
381  </tr>
382 
383  <tr>
384  <td>power_psc0_disable()</td>
385  <td>Disable the Power Stage Controller 0 module.</td>
386  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
387  </tr>
388 
389  <tr>
390  <td>power_psc0_enable()</td>
391  <td>Enable the Power Stage Controller 0 module.</td>
392  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
393  </tr>
394 
395  <tr>
396  <td>power_psc1_disable()</td>
397  <td>Disable the Power Stage Controller 1 module.</td>
398  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
399  </tr>
400 
401  <tr>
402  <td>power_psc1_enable()</td>
403  <td>Enable the Power Stage Controller 1 module.</td>
404  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
405  </tr>
406 
407  <tr>
408  <td>power_psc2_disable()</td>
409  <td>Disable the Power Stage Controller 2 module.</td>
410  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161</td>
411  </tr>
412 
413  <tr>
414  <td>power_psc2_enable()</td>
415  <td>Enable the Power Stage Controller 2 module.</td>
416  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161</td>
417  </tr>
418 
419  <tr>
420  <td>power_psc_disable()</td>
421  <td> Disable the Power Stage Controller module </td>
422  <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
423  </tr>
424 
425  <tr>
426  <td>power_psc_enable()</td>
427  <td> Enable the Power Stage Controller module </td>
428  <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
429  </tr>
430 
431  <tr>
432  <td>power_pscr_disable()</td>
433  <td>Disable the Reduced Power Stage Controller module.</td>
434  <td>AT90PWM81, AT90PWM161</td>
435  </tr>
436 
437  <tr>
438  <td>power_pscr_enable()</td>
439  <td>Enable the Reduced Power Stage Controller module.</td>
440  <td>AT90PWM81, AT90PWM161</td>
441  </tr>
442 
443  <tr>
444  <td>power_rtc_disable()</td>
445  <td> Disable the RTC module </td>
446  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
447  </tr>
448 
449  <tr>
450  <td>power_rtc_enable()</td>
451  <td> Enable the RTC module </td>
452  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
453  </tr>
454 
455  <tr>
456  <td>power_sci_disable()</td>
457  <td> Disable the SCI module </td>
458  <td>AT90SCR100</td>
459  </tr>
460 
461  <tr>
462  <td>power_sci_enable()</td>
463  <td> Enable the SCI module </td>
464  <td>AT90SCR100</td>
465  </tr>
466 
467  <tr>
468  <td>power_spi_disable()</td>
469  <td>Disable the Serial Peripheral Interface module.</td>
470  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
471  </tr>
472 
473  <tr>
474  <td>power_spi_enable()</td>
475  <td>Enable the Serial Peripheral Interface module.</td>
476  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
477  </tr>
478 
479  <tr>
480  <td>power_spic_disable()</td>
481  <td> Disable the SPI module on PortC </td>
482  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
483  </tr>
484 
485  <tr>
486  <td>power_spic_enable()</td>
487  <td> Enable the SPI module on PortC </td>
488  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
489  </tr>
490 
491  <tr>
492  <td>power_spid_disable()</td>
493  <td> Disable the SPI module on PortD </td>
494  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
495  </tr>
496 
497  <tr>
498  <td>power_spid_enable()</td>
499  <td> Enable the SPI module on PortD </td>
500  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
501  </tr>
502 
503  <tr>
504  <td>power_spie_disable()</td>
505  <td> Disable the SPI module on PortE </td>
506  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
507  </tr>
508 
509  <tr>
510  <td>power_spie_enable()</td>
511  <td> Enable the SPI module on PortE </td>
512  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
513  </tr>
514 
515  <tr>
516  <td>power_spif_disable()</td>
517  <td> Disable the SPI module on PortF </td>
518  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
519  </tr>
520 
521  <tr>
522  <td>power_spif_enable()</td>
523  <td> Enable the SPI module on PortF </td>
524  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
525  </tr>
526 
527  <tr>
528  <td>power_tc0c_disable()</td>
529  <td> Disable the TC0 module on PortC </td>
530  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
531  </tr>
532 
533  <tr>
534  <td>power_tc0c_enable()</td>
535  <td> Enable the TC0 module on PortC </td>
536  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
537  </tr>
538 
539  <tr>
540  <td>power_tc0d_disable()</td>
541  <td> Disable the TC0 module on PortD </td>
542  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
543  </tr>
544 
545  <tr>
546  <td>power_tc0d_enable()</td>
547  <td> Enable the TC0 module on PortD </td>
548  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
549  </tr>
550 
551  <tr>
552  <td>power_tc0e_disable()</td>
553  <td> Disable the TC0 module on PortE </td>
554  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
555  </tr>
556 
557  <tr>
558  <td>power_tc0e_enable()</td>
559  <td> Enable the TC0 module on PortE </td>
560  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
561  </tr>
562 
563  <tr>
564  <td>power_tc0f_disable()</td>
565  <td> Disable the TC0 module on PortF </td>
566  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
567  </tr>
568 
569  <tr>
570  <td>power_tc0f_enable()</td>
571  <td> Enable the TC0 module on PortF </td>
572  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
573  </tr>
574 
575  <tr>
576  <td>power_tc1c_disable()</td>
577  <td> Disable the TC1 module on PortC </td>
578  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
579  </tr>
580 
581  <tr>
582  <td>power_tc1c_enable()</td>
583  <td> Enable the TC1 module on PortC </td>
584  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
585  </tr>
586 
587  <tr>
588  <td>power_tc1d_disable()</td>
589  <td> Disable the TC1 module on PortD </td>
590  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
591  </tr>
592 
593  <tr>
594  <td>power_tc1d_enable()</td>
595  <td> Enable the TC1 module on PortD </td>
596  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
597  </tr>
598 
599  <tr>
600  <td>power_tc1e_disable()</td>
601  <td> Disable the TC1 module on PortE </td>
602  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
603  </tr>
604 
605  <tr>
606  <td>power_tc1e_enable()</td>
607  <td> Enable the TC1 module on PortE </td>
608  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
609  </tr>
610 
611  <tr>
612  <td>power_tc1f_disable()</td>
613  <td> Disable the TC1 module on PortF </td>
614  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
615  </tr>
616 
617  <tr>
618  <td>power_tc1f_enable()</td>
619  <td> Enable the TC1 module on PortF </td>
620  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
621  </tr>
622 
623  <tr>
624  <td>power_timer0_disable()</td>
625  <td>Disable the Timer 0 module.</td>
626  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny441, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
627  </tr>
628 
629  <tr>
630  <td>power_timer0_enable()</td>
631  <td>Enable the Timer 0 module.</td>
632  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny441, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
633  </tr>
634 
635  <tr>
636  <td>power_timer1_disable()</td>
637  <td>Disable the Timer 1 module.</td>
638  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
639  </tr>
640 
641  <tr>
642  <td>power_timer1_enable()</td>
643  <td>Enable the Timer 1 module.</td>
644  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
645  </tr>
646 
647  <tr>
648  <td>power_timer2_disable()</td>
649  <td>Disable the Timer 2 module.</td>
650  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATA5790, ATA5795, ATA6612C, ATA6613C, ATA6614Q, AT90SCR100</td>
651  </tr>
652 
653  <tr>
654  <td>power_timer2_enable()</td>
655  <td>Enable the Timer 2 module.</td>
656  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATA5790, ATA5795, ATA6612C, ATA6613C, ATA6614Q, AT90SCR100</td>
657  </tr>
658 
659  <tr>
660  <td>power_timer3_disable()</td>
661  <td>Disable the Timer 3 module.</td>
662  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega1284, ATmega1284P, ATA5790, ATA5795</td>
663  </tr>
664 
665  <tr>
666  <td>power_timer3_enable()</td>
667  <td>Enable the Timer 3 module.</td>
668  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega1284, ATmega1284P, ATA5790, ATA5795</td>
669  </tr>
670 
671  <tr>
672  <td>power_timer4_disable()</td>
673  <td>Disable the Timer 4 module.</td>
674  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1</td>
675  </tr>
676 
677  <tr>
678  <td>power_timer4_enable()</td>
679  <td>Enable the Timer 4 module.</td>
680  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1</td>
681  </tr>
682 
683  <tr>
684  <td>power_timermodulator_disable()</td>
685  <td> Disable the TIMERMODULATOR module </td>
686  <td>ATA5790, ATA5795</td>
687  </tr>
688 
689  <tr>
690  <td>power_timermodulator_enable()</td>
691  <td> Enable the TIMERMODULATOR module </td>
692  <td>ATA5790, ATA5795</td>
693  </tr>
694 
695  <tr>
696  <td>power_twi_disable()</td>
697  <td>Disable the Two Wire Interface module.</td>
698  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA6612C, ATA6613C, ATA6614Q, ATtiny1634, AT90SCR100, ATtiny20, ATtiny40, ATA5702M322</td>
699  </tr>
700 
701  <tr>
702  <td>power_twi_enable()</td>
703  <td>Enable the Two Wire Interface module.</td>
704  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA6612C, ATA6613C, ATA6614Q, ATtiny1634, AT90SCR100, ATtiny20, ATtiny40, ATA5702M322</td>
705  </tr>
706 
707  <tr>
708  <td>power_twic_disable()</td>
709  <td>Disable the Two Wire Interface module on PortC </td>
710  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
711  </tr>
712 
713  <tr>
714  <td>power_twic_enable()</td>
715  <td>Enable the Two Wire Interface module on PortC </td>
716  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
717  </tr>
718 
719  <tr>
720  <td>power_twid_disable()</td>
721  <td>Disable the Two Wire Interface module on PortD </td>
722  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
723  </tr>
724 
725  <tr>
726  <td>power_twid_enable()</td>
727  <td>Enable the Two Wire Interface module on PortD </td>
728  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
729  </tr>
730 
731  <tr>
732  <td>power_twie_disable()</td>
733  <td>Disable the Two Wire Interface module on PortE </td>
734  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
735  </tr>
736 
737  <tr>
738  <td>power_twie_enable()</td>
739  <td>Enable the Two Wire Interface module on PortE </td>
740  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
741  </tr>
742 
743  <tr>
744  <td>power_twif_disable()</td>
745  <td>Disable the Two Wire Interface module on PortF </td>
746  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
747  </tr>
748 
749  <tr>
750  <td>power_twif_enable()</td>
751  <td>Disable the Two Wire Interface module on PortF </td>
752  <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
753  </tr>
754 
755  <tr>
756  <td>power_usart0_disable()</td>
757  <td>Disable the USART 0 module.</td>
758  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega32U4, ATmega16U4, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATA6612C, ATA6613C, ATA6614Q, ATmega1284, ATmega1284P, ATtiny1634, AT90SCR100</td>
759  </tr>
760 
761  <tr>
762  <td>power_usart0_enable()</td>
763  <td>Enable the USART 0 module.</td>
764  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega32U4, ATmega16U4, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATA6612C, ATA6613C, ATA6614Q, ATmega1284, ATmega1284P, ATtiny1634, AT90SCR100</td>
765  </tr>
766 
767  <tr>
768  <td>power_usart1_disable()</td>
769  <td>Disable the USART 1 module.</td>
770  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega1284P, ATtiny441, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2</td>
771  </tr>
772 
773  <tr>
774  <td>power_usart1_enable()</td>
775  <td>Enable the USART 1 module.</td>
776  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega1284P, ATtiny441, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2</td>
777  </tr>
778 
779  <tr>
780  <td>power_usart2_disable()</td>
781  <td>Disable the USART 2 module.</td>
782  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
783  </tr>
784 
785  <tr>
786  <td>power_usart2_enable()</td>
787  <td>Enable the USART 2 module.</td>
788  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
789  </tr>
790 
791  <tr>
792  <td>power_usart3_disable()</td>
793  <td>Disable the USART 3 module.</td>
794  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
795  </tr>
796 
797  <tr>
798  <td>power_usart3_enable()</td>
799  <td>Enable the USART 3 module.</td>
800  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
801  </tr>
802 
803  <tr>
804  <td>power_usart_disable()</td>
805  <td>Disable the USART module.</td>
806  <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
807  </tr>
808 
809  <tr>
810  <td>power_usart_enable()</td>
811  <td>Enable the USART module.</td>
812  <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
813  </tr>
814 
815  <tr>
816  <td>power_usartc0_disable()</td>
817  <td> Disable the USART0 module on PortC </td>
818  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
819  </tr>
820 
821  <tr>
822  <td>power_usartc0_enable()</td>
823  <td> Enable the USART0 module on PortC </td>
824  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
825  </tr>
826 
827  <tr>
828  <td>power_usartc1_disable()</td>
829  <td> Disable the USART1 module on PortC </td>
830  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3</td>
831  </tr>
832 
833  <tr>
834  <td>power_usartc1_enable()</td>
835  <td> Enable the USART1 module on PortC </td>
836  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3</td>
837  </tr>
838 
839  <tr>
840  <td>power_usartd0_disable()</td>
841  <td> Disable the USART0 module on PortD </td>
842  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
843  </tr>
844 
845  <tr>
846  <td>power_usartd0_enable()</td>
847  <td> Enable the USART0 module on PortD </td>
848  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
849  </tr>
850 
851  <tr>
852  <td>power_usartd1_disable()</td>
853  <td> Disable the USART1 module on PortD </td>
854  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
855  </tr>
856 
857  <tr>
858  <td>power_usartd1_enable()</td>
859  <td> Enable the USART1 module on PortE </td>
860  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
861  </tr>
862 
863  <tr>
864  <td>power_usarte0_disable()</td>
865  <td> Disable the USART0 module on PortE </td>
866  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
867  </tr>
868 
869  <tr>
870  <td>power_usarte0_enable()</td>
871  <td> Enable the USART0 module on PortE </td>
872  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
873  </tr>
874 
875  <tr>
876  <td>power_usarte1_disable()</td>
877  <td> Disable the USART1 module on PortE </td>
878  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
879  </tr>
880 
881  <tr>
882  <td>power_usarte1_enable()</td>
883  <td> Enable the USART1 module on PortE </td>
884  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
885  </tr>
886 
887  <tr>
888  <td>power_usartf0_disable()</td>
889  <td> Disable the USART0 module on PortF </td>
890  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
891  </tr>
892 
893  <tr>
894  <td>power_usartf0_enable()</td>
895  <td> Enable the USART0 module on PortF </td>
896  <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
897  </tr>
898 
899  <tr>
900  <td>power_usartf1_disable()</td>
901  <td> Disable the USART1 module on PortF </td>
902  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
903  </tr>
904 
905  <tr>
906  <td>power_usartf1_enable()</td>
907  <td> Enable the USART1 module on PortF </td>
908  <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
909  </tr>
910 
911  <tr>
912  <td>power_usb_disable()</td>
913  <td>Disable the USB module.</td>
914  <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100</td>
915  </tr>
916 
917  <tr>
918  <td>power_usb_enable()</td>
919  <td>Enable the USB module.</td>
920  <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100</td>
921  </tr>
922 
923  <tr>
924  <td>power_usbh_disable()</td>
925  <td> Disable the USBH module </td>
926  <td>AT90SCR100</td>
927  </tr>
928 
929  <tr>
930  <td>power_usbh_enable()</td>
931  <td> Enable the USBH module </td>
932  <td>AT90SCR100</td>
933  </tr>
934 
935  <tr>
936  <td>power_usi_disable()</td>
937  <td>Disable the Universal Serial Interface module.</td>
938  <td>ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634</td>
939  </tr>
940 
941  <tr>
942  <td>power_usi_enable()</td>
943  <td>Enable the Universal Serial Interface module.</td>
944  <td>ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634</td>
945  </tr>
946 
947  <tr>
948  <td>power_vadc_disable()</td>
949  <td>Disable the Voltage ADC module.</td>
950  <td>ATmega406, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
951  </tr>
952 
953  <tr>
954  <td>power_vadc_enable()</td>
955  <td>Enable the Voltage ADC module.</td>
956  <td>ATmega406, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
957  </tr>
958 
959  <tr>
960  <td>power_vmonitor_disable()</td>
961  <td> Disable the VMONITOR module </td>
962  <td>ATA5790, ATA5795</td>
963  </tr>
964 
965  <tr>
966  <td>power_vmonitor_enable()</td>
967  <td> Enable the VMONITOR module </td>
968  <td>ATA5790, ATA5795</td>
969  </tr>
970 
971  <tr>
972  <td>power_vrm_disable()</td>
973  <td> Disable the VRM module </td>
974  <td>ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
975  </tr>
976 
977  <tr>
978  <td>power_vrm_enable()</td>
979  <td> Enable the VRM module </td>
980  <td>ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
981  </tr>
982 
983  <tr>
984  <td>power_clock_output_enable()</td>
985  <td>Enable clock output module</td>
986  <td>ATA5702M322, ATA5782, ATA5831</td>
987  </tr>
988 
989  <tr>
990  <td>power_clock_output_disable()</td>
991  <td>Enable clock output module</td>
992  <td>ATA5702M322, ATA5782, ATA5831</td>
993  </tr>
994 
995  <tr>
996  <td>power_voltage_monitor_enable()</td>
997  <td>Enable voltage monitor module</td>
998  <td>ATA5702M322, ATA5782, ATA5831</td>
999  </tr>
1000 
1001  <tr>
1002  <td>power_voltage_monitor_disable()</td>
1003  <td>Disable voltage monitor module</td>
1004  <td>ATA5702M322, ATA5782, ATA5831</td>
1005  </tr>
1006 
1007  <tr>
1008  <td>power_crc_enable()</td>
1009  <td>Enable CRC module</td>
1010  <td>ATA5702M322, ATA5782, ATA5831</td>
1011  </tr>
1012 
1013  <tr>
1014  <td>power_crc_disable()</td>
1015  <td>Disable CRC module</td>
1016  <td>ATA5702M322, ATA5782, ATA5831</td>
1017  </tr>
1018 
1019  <tr>
1020  <td>power_transmit_dsp_control_enable()</td>
1021  <td>Enable Transmit DSP control module</td>
1022  <td>ATA5702M322, ATA5782, ATA5831</td>
1023  </tr>
1024 
1025  <tr>
1026  <td>power_transmit_dsp_control_disable()</td>
1027  <td>Disable Transmit DSP control module</td>
1028  <td>ATA5702M322, ATA5782, ATA5831</td>
1029  </tr>
1030 
1031  <tr>
1032  <td>power_receive_dsp_control_enable()</td>
1033  <td>Enable Receive DSP control module</td>
1034  <td>ATA5782, ATA5831</td>
1035  </tr>
1036 
1037  <tr>
1038  <td>power_receive_dsp_control_disable()</td>
1039  <td>Disable Receive DSP control module</td>
1040  <td>ATA5782, ATA5831</td>
1041  </tr>
1042 
1043  <tr>
1044  <td>power_sequencer_state_machine_enable()</td>
1045  <td>Enable power sequencer state machine</td>
1046  <td>ATA5702M322, ATA5782, ATA5831</td>
1047  </tr>
1048 
1049  <tr>
1050  <td>power_sequencer_state_machine_disable()</td>
1051  <td>Disable power sequencer state machine</td>
1052  <td>ATA5702M322, ATA5782, ATA5831</td>
1053  </tr>
1054 
1055  <tr>
1056  <td>power_tx_modulator_enable()</td>
1057  <td>Enable Tx modulator</td>
1058  <td>ATA5702M322, ATA5782, ATA5831</td>
1059  </tr>
1060 
1061  <tr>
1062  <td>power_tx_modulator_disable()</td>
1063  <td>Disable Tx modulator</td>
1064  <td>ATA5702M322, ATA5782, ATA5831</td>
1065  </tr>
1066 
1067  <tr>
1068  <td>power_rssi_buffer_enable()</td>
1069  <td>Enable RSSI buffer</td>
1070  <td>ATA5782, ATA5831</td>
1071  </tr>
1072 
1073  <tr>
1074  <td>power_rssi_buffer_disable()</td>
1075  <td>Disable RSSI buffer</td>
1076  <td>ATA5782, ATA5831</td>
1077  </tr>
1078 
1079  <tr>
1080  <td>power_id_scan_enable()</td>
1081  <td>Enable ID Scan</td>
1082  <td>ATA5782, ATA5831</td>
1083  </tr>
1084 
1085  <tr>
1086  <td>power_id_scan_disable()</td>
1087  <td>Disable ID Scan</td>
1088  <td>ATA5782, ATA5831</td>
1089  </tr>
1090 
1091  <tr>
1092  <td>power_data_fifo_enable()</td>
1093  <td>Enable data FIFO</td>
1094  <td>ATA5702M322, ATA5782, ATA5831</td>
1095  </tr>
1096 
1097  <tr>
1098  <td>power_data_fifo_disable()</td>
1099  <td>Disable data FIFO</td>
1100  <td>ATA5702M322, ATA5782, ATA5831</td>
1101  </tr>
1102 
1103  <tr>
1104  <td>power_preamble_rssi_fifo_enable()</td>
1105  <td>Enable preamble/RSSI FIFO</td>
1106  <td>ATA5702M322, ATA5782, ATA5831</td>
1107  </tr>
1108 
1109  <tr>
1110  <td>power_preamble_rssi_fifo_disable()</td>
1111  <td>Disable preamble/RSSI FIFO</td>
1112  <td>ATA5702M322, ATA5782, ATA5831</td>
1113  </tr>
1114 
1115  <tr>
1116  <td>power_rx_buffer_A_enable()</td>
1117  <td>Enable receive buffer for data path A</td>
1118  <td>ATA5782, ATA5831</td>
1119  </tr>
1120 
1121  <tr>
1122  <td>power_rx_buffer_A_disable()</td>
1123  <td>Disable receive buffer for data path A</td>
1124  <td>ATA5782, ATA5831</td>
1125  </tr>
1126 
1127  <tr>
1128  <td>power_rx_buffer_B_enable()</td>
1129  <td>Enable receive buffer for data path B</td>
1130  <td>ATA5782, ATA5831</td>
1131  </tr>
1132 
1133  <tr>
1134  <td>power_rx_buffer_B_disable()</td>
1135  <td>Disable receive buffer for data path B</td>
1136  <td>ATA5782, ATA5831</td>
1137  </tr>
1138 
1139 </table>
1140 </center>
1141 </small>
1142 
1143 @} */
1144 
1145 // Xmega A series has AES, EBI and DMA bits
1146 // Include any other device on need basis
1147 #if defined(__AVR_ATxmega16A4__) \
1148 || defined(__AVR_ATxmega16A4U__) \
1149 || defined(__AVR_ATxmega32A4U__) \
1150 || defined(__AVR_ATxmega32A4__) \
1151 || defined(__AVR_ATxmega64A1__) \
1152 || defined(__AVR_ATxmega64A1U__) \
1153 || defined(__AVR_ATxmega64A3__) \
1154 || defined(__AVR_ATxmega64A3U__) \
1155 || defined(__AVR_ATxmega64A4U__) \
1156 || defined(__AVR_ATxmega128A1__) \
1157 || defined(__AVR_ATxmega128A1U__) \
1158 || defined(__AVR_ATxmega128A3__) \
1159 || defined(__AVR_ATxmega128A3U__) \
1160 || defined(__AVR_ATxmega128A4U__) \
1161 || defined(__AVR_ATxmega192A3__) \
1162 || defined(__AVR_ATxmega192A3U__) \
1163 || defined(__AVR_ATxmega256A3__) \
1164 || defined(__AVR_ATxmega256A3U__) \
1165 || defined(__AVR_ATxmega256A3B__) \
1166 || defined(__AVR_ATxmega256A3BU__) \
1167 || defined(__AVR_ATxmega384C3__)
1168 
1169 
1170 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
1171 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
1172 
1173 #define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
1174 #define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
1175 
1176 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1177 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1178 
1179 #define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
1180 #define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
1181 #define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
1182 #define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
1183 
1184 #define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
1185 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
1186 #define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
1187 #define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
1188 #define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
1189 #define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
1190 #define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
1191 #define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
1192 
1193 #if defined(__AVR_ATxmega384C3__) \
1194 || defined(__AVR_ATxmega256A3BU__) \
1195 || defined(__AVR_ATxmega16A4U__) \
1196 || defined(__AVR_ATxmega32A4U__) \
1197 || defined(__AVR_ATxmega64A3U__) \
1198 || defined(__AVR_ATxmega64A4U__) \
1199 || defined(__AVR_ATxmega128A3U__) \
1200 || defined(__AVR_ATxmega128A4U__) \
1201 || defined(__AVR_ATxmega192A3U__) \
1202 || defined(__AVR_ATxmega256A3U__)
1203 
1204 #define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
1205 #define power_usb_disable() (PR_PRGEN &= (uint8_t)(PR_USB_bm))
1206 
1207 #define power_all_enable() \
1208 do { \
1209  PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm|PR_USB_bm); \
1210  PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1211  PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1212  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1213  PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1214  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1215  PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1216 } while(0)
1217 
1218 #define power_all_disable() \
1219 do { \
1220  PR_PRGEN |= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm|PR_USB_bm); \
1221  PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1222  PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1223  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1224  PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1225  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1226  PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1227 } while(0)
1228 
1229 #else
1230 
1231 #define power_all_enable() \
1232 do { \
1233  PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1234  PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1235  PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1236  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1237  PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1238  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1239  PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1240 } while(0)
1241 
1242 
1243 #define power_all_disable() \
1244 do { \
1245  PR_PRGEN|= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1246  PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1247  PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1248  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1249  PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1250  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1251  PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1252 } while(0)
1253 #endif
1254 
1255 #endif
1256 
1257 #if defined(__AVR_ATxmega16C4__) \
1258 || defined(__AVR_ATxmega32C3__) \
1259 || defined(__AVR_ATxmega32C4__) \
1260 || defined(__AVR_ATxmega64C3__) \
1261 || defined(__AVR_ATxmega128C3__) \
1262 || defined(__AVR_ATxmega192C3__) \
1263 || defined(__AVR_ATxmega256C3__)
1264 
1265 #define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
1266 #define power_usb_disable() (PR_PRGEN &= (uint8_t)(PR_USB_bm))
1267 
1268 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
1269 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
1270 
1271 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1272 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1273 
1274 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1275 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1276 
1277 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1278 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1279 
1280 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1281 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1282 
1283 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1284 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1285 
1286 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1287 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1288 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1289 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1290 
1291 #define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
1292 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
1293 
1294 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1295 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1296 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1297 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1298 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1299 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1300 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1301 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1302 
1303 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1304 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1305 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1306 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1307 
1308 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1309 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1310 
1311 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1312 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1313 
1314 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1315 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1316 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1317 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1318 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1319 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1320 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1321 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1322 
1323 #define power_all_enable() \
1324 do { \
1325  PR_PRGEN &= (uint8_t)~(PR_USB_bm|PR_AES_bm|PR_DMA_bm|PR_RTC_bm|PR_EVSYS_bm); \
1326  PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1327  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_USART1_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1328  PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1329  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1330  PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
1331  } while(0)
1332 
1333 #define power_all_disable() \
1334 do { \
1335  PR_PRGEN |= (uint8_t)(PR_USB_bm|PR_AES_bm|PR_DMA_bm|PR_RTC_bm|PR_EVSYS_bm); \
1336  PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1337  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_USART1_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1338  PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1339  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1340  PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
1341  } while(0)
1342 
1343 #endif
1344 
1345 #if defined(__AVR_ATxmega16A4__) \
1346 || defined(__AVR_ATxmega16A4U__) \
1347 || defined(__AVR_ATxmega16D4__) \
1348 || defined(__AVR_ATxmega32A4__) \
1349 || defined(__AVR_ATxmega32A4U__) \
1350 || defined(__AVR_ATxmega32D3__) \
1351 || defined(__AVR_ATxmega32D4__) \
1352 || defined(__AVR_ATxmega64A1__) \
1353 || defined(__AVR_ATxmega64A1U__) \
1354 || defined(__AVR_ATxmega64A3__) \
1355 || defined(__AVR_ATxmega64A3U__) \
1356 || defined(__AVR_ATxmega64A4U__) \
1357 || defined(__AVR_ATxmega128A1__) \
1358 || defined(__AVR_ATxmega128A1U__) \
1359 || defined(__AVR_ATxmega128A3__) \
1360 || defined(__AVR_ATxmega128A3U__) \
1361 || defined(__AVR_ATxmega128A4U__) \
1362 || defined(__AVR_ATxmega192A3__) \
1363 || defined(__AVR_ATxmega192A3U__) \
1364 || defined(__AVR_ATxmega256A3__) \
1365 || defined(__AVR_ATxmega256A3U__) \
1366 || defined(__AVR_ATxmega256A3B__) \
1367 || defined(__AVR_ATxmega256A3BU__) \
1368 || defined(__AVR_ATxmega384C3__)
1369 
1370 
1371 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1372 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1373 
1374 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1375 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1376 
1377 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1378 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1379 
1380 #ifndef __AVR_ATxmega32D3__
1381 #define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
1382 #define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
1383 #define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
1384 #define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
1385 #endif
1386 
1387 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1388 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1389 
1390 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1391 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1392 #define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
1393 #define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm)
1394 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1395 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1396 #define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
1397 #define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm)
1398 
1399 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1400 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1401 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1402 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1403 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1404 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1405 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1406 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1407 
1408 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1409 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1410 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1411 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1412 #define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
1413 #define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm)
1414 #define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
1415 #define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm)
1416 
1417 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1418 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1419 #define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
1420 #define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm)
1421 #define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
1422 #define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm)
1423 #define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
1424 #define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm)
1425 
1426 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1427 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1428 #define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
1429 #define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm)
1430 #define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
1431 #define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm)
1432 #define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
1433 #define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm)
1434 
1435 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1436 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1437 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1438 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1439 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1440 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1441 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1442 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1443 
1444 #endif
1445 
1446 #if defined(__AVR_ATxmega64D3__) \
1447 || defined(__AVR_ATxmega128D3__) \
1448 || defined(__AVR_ATxmega192D3__) \
1449 || defined(__AVR_ATxmega256D3__)
1450 
1451 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1452 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1453 
1454 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1455 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1456 
1457 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1458 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1459 
1460 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1461 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1462 
1463 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1464 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1465 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1466 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1467 
1468 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1469 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1470 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1471 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1472 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1473 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1474 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1475 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1476 
1477 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1478 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1479 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1480 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1481 
1482 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1483 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1484 
1485 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1486 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1487 
1488 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1489 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1490 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1491 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1492 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1493 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1494 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1495 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1496 
1497 #define power_all_enable() \
1498 do { \
1499  PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
1500  PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1501  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1502  PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1503  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1504  PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
1505 } while(0)
1506 
1507 
1508 #define power_all_disable() \
1509 do { \
1510  PR_PRGEN|= (uint8_t)(PR_RTC_bm|PR_EVSYS_bm); \
1511  PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1512  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1513  PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1514  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1515  PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
1516 } while(0)
1517 
1518 #endif
1519 
1520 #if defined(__AVR_ATxmega64D4__) \
1521 || defined(__AVR_ATxmega128D4__)
1522 
1523 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1524 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1525 
1526 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1527 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1528 
1529 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1530 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1531 
1532 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1533 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1534 
1535 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1536 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1537 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1538 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1539 
1540 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1541 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1542 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1543 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1544 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1545 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1546 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1547 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1548 
1549 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1550 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1551 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1552 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1553 
1554 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1555 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1556 
1557 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1558 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1559 
1560 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1561 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1562 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1563 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1564 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1565 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1566 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1567 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1568 
1569 #define power_all_enable() \
1570 do { \
1571  PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
1572  PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1573  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1574  PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1575  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1576  PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
1577  } while(0)
1578 
1579 #define power_all_disable() \
1580 do { \
1581  PR_PRGEN |= (uint8_t)(PR_RTC_bm|PR_EVSYS_bm); \
1582  PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1583  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1584  PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1585  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1586  PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
1587  } while(0)
1588 
1589 #endif
1590 
1591 #if defined(__AVR_ATxmega16D4__) \
1592 || defined(__AVR_ATxmega32D3__) \
1593 || defined(__AVR_ATxmega32D4__) \
1594 
1595 #define power_all_enable() \
1596 do { \
1597  PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
1598  PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1599  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1600  PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1601  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1602  PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1603 } while(0)
1604 
1605 
1606 #define power_all_disable() \
1607 do { \
1608  PR_PRGEN|= (uint8_t)(PR_RTC_bm|PR_EVSYS_bm); \
1609  PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1610  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1611  PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1612  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1613  PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1614 } while(0)
1615 
1616 
1617 #elif defined(__AVR_ATxmega32E5__) \
1618 || defined(__AVR_ATxmega16E5__) \
1619 || defined(__AVR_ATxmega8E5__)
1620 
1621 #define power_xcl_enable() (PR_PRGEN &= (uint8_t)~(PR_XCL_bm))
1622 #define power_xcl_disable() (PR_PRGEN |= (uint8_t)PR_XCL_bm)
1623 
1624 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1625 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1626 
1627 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1628 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1629 
1630 #define power_edma_enable() (PR_PRGEN &= (uint8_t)~(PR_EDMA_bm))
1631 #define power_edma_disable() (PR_PRGEN |= (uint8_t)PR_EDMA_bm)
1632 
1633 #define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
1634 #define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
1635 
1636 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1637 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1638 
1639 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1640 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1641 
1642 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1643 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1644 
1645 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1646 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1647 
1648 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1649 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1650 
1651 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1652 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1653 
1654 #define power_tc5c_enable() (PR_PRPC &= (uint8_t)~(PR_TC5_bm))
1655 #define power_tc5c_disable() (PR_PRPC |= (uint8_t)PR_TC5_bm)
1656 
1657 #define power_tc4c_enable() (PR_PRPC &= (uint8_t)~(PR_TC4_bm))
1658 #define power_tc4c_disable() (PR_PRPC |= (uint8_t)PR_TC4_bm)
1659 
1660 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1661 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1662 
1663 #define power_tc5d_enable() (PR_PRPC &= (uint8_t)~(PR_TC5_bm))
1664 #define power_tc5d_disable() (PR_PRPC |= (uint8_t)PR_TC5_bm)
1665 
1666 #define power_all_enable() \
1667 do { \
1668  PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm|PR_XCL_bm|PR_EDMA_bm); \
1669  PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm|PR_DAC_bm); \
1670  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC5_bm|PR_TC4_bm); \
1671  PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_TC5_bm); \
1672 } while(0)
1673 
1674 
1675 #define power_all_disable() \
1676 do { \
1677  PR_PRGEN|= (uint8_t)(PR_XCL_bm|PR_RTC_bm|PR_EVSYS_bm|PR_EDMA_bm); \
1678  PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm|PR_DAC_bm); \
1679  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC5_bm|PR_TC4_bm); \
1680  PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_TC5_bm); \
1681 } while(0)
1682 
1683 
1684 #elif defined (__AVR_ATxmega64B1__) \
1685 || defined (__AVR_ATxmega64B3__) \
1686 || defined (__AVR_ATxmega128B1__) \
1687 || defined (__AVR_ATxmega128B3__)
1688 #define power_lcd_enable() (PR_PRGEN &= (uint8_t)~(PR_LCD_bm))
1689 #define power_lcd_disable() (PR_PRGEN |= (uint8_t)PR_LCD_bm)
1690 
1691 #define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
1692 #define power_usb_disable() (PR_PRGEN |= (uint8_t)PR_USB_bm)
1693 
1694 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
1695 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
1696 
1697 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1698 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1699 
1700 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1701 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1702 
1703 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1704 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1705 
1706 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1707 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1708 #define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
1709 #define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
1710 
1711 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1712 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1713 #define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
1714 #define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
1715 
1716 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1717 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1718 
1719 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1720 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1721 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1722 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1723 
1724 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1725 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1726 
1727 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1728 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1729 
1730 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1731 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1732 
1733 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1734 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1735 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1736 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1737 
1738 #define power_all_enable() \
1739 do { \
1740  PR_PRGEN &= (uint8_t)~(PR_LCD_bm|PR_USB_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1741  PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1742  PR_PRPB &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1743  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1744  PR_PRPE &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
1745  } while(0)
1746 
1747 #define power_all_disable() \
1748 do { \
1749  PR_PRGEN |= (uint8_t)(PR_LCD_bm|PR_USB_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1750  PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1751  PR_PRPB |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1752  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1753  PR_PRPE |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
1754  } while(0)
1755 
1756 #elif defined(__AVR_ATmega640__) \
1757 || defined(__AVR_ATmega1280__) \
1758 || defined(__AVR_ATmega1281__) \
1759 || defined(__AVR_ATmega2560__) \
1760 || defined(__AVR_ATmega2561__)
1761 
1762 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1763 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1764 
1765 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1766 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1767 
1768 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1769 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1770 
1771 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1772 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1773 
1774 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1775 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1776 
1777 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1778 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1779 
1780 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1781 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1782 
1783 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
1784 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
1785 
1786 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
1787 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
1788 
1789 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1790 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1791 
1792 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1793 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1794 
1795 #define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2))
1796 #define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2))
1797 
1798 #define power_usart3_enable() (PRR1 &= (uint8_t)~(1 << PRUSART3))
1799 #define power_usart3_disable() (PRR1 |= (uint8_t)(1 << PRUSART3))
1800 
1801 #define power_all_enable() \
1802 do{ \
1803  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1804  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
1805 }while(0)
1806 
1807 #define power_all_disable() \
1808 do{ \
1809  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1810  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
1811 }while(0)
1812 
1813 
1814 #elif defined(__AVR_ATmega128RFA1__)
1815 
1816 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1817 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1818 
1819 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1820 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1821 
1822 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1823 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1824 
1825 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1826 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1827 
1828 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1829 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1830 
1831 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1832 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1833 
1834 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1835 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1836 
1837 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
1838 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
1839 
1840 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
1841 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
1842 
1843 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1844 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1845 
1846 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1847 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1848 
1849 #define power_all_enable() \
1850 do{ \
1851  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1852  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
1853 }while(0)
1854 
1855 #define power_all_disable() \
1856 do{ \
1857  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1858  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
1859 }while(0)
1860 
1861 #elif defined(__AVR_ATmega256RFR2__) \
1862 || defined(__AVR_ATmega2564RFR2__) \
1863 || defined(__AVR_ATmega128RFR2__) \
1864 || defined(__AVR_ATmega1284RFR2__) \
1865 || defined(__AVR_ATmega64RFR2__) \
1866 || defined(__AVR_ATmega644RFR2__)
1867 
1868 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1869 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1870 
1871 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1872 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1873 
1874 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1875 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1876 
1877 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1878 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1879 
1880 #define power_pga_enable() (PRR0 &= (uint8_t)~(1 << PRPGA))
1881 #define power_pga_disable() (PRR0 |= (uint8_t)(1 << PRPGA))
1882 
1883 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1884 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1885 
1886 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1887 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1888 
1889 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1890 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1891 
1892 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1893 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1894 
1895 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1896 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1897 
1898 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
1899 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
1900 
1901 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
1902 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
1903 
1904 #define power_transceiver_enable() (PRR1 &= (uint8_t)~(1 << PRTRX24))
1905 #define power_transceiver_disable() (PRR1 |= (uint8_t)(1 << PRTRX24))
1906 
1907 #define power_ram0_enable() (PRR2 &= (uint8_t)~(1 << PRRAM0))
1908 #define power_ram0_disable() (PRR2 |= (uint8_t)(1 << PRRAM0))
1909 
1910 #define power_ram1_enable() (PRR2 &= (uint8_t)~(1 << PRRAM1))
1911 #define power_ram1_disable() (PRR2 |= (uint8_t)(1 << PRRAM1))
1912 
1913 #define power_ram2_enable() (PRR2 &= (uint8_t)~(1 << PRRAM2))
1914 #define power_ram2_disable() (PRR2 |= (uint8_t)(1 << PRRAM2))
1915 
1916 #define power_ram3_enable() (PRR2 &= (uint8_t)~(1 << PRRAM3))
1917 #define power_ram3_disable() (PRR2 |= (uint8_t)(1 << PRRAM3))
1918 
1919 #define power_all_enable() \
1920 do{ \
1921  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1922  PRR1 &= (uint8_t)~((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
1923  PRR2 &= (uint8_t)~((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
1924 }while(0)
1925 
1926 #define power_all_disable() \
1927 do{ \
1928  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1929  PRR1 |= (uint8_t)((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
1930  PRR2 |= (uint8_t)((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
1931 }while(0)
1932 
1933 #elif defined(__AVR_AT90USB646__) \
1934 || defined(__AVR_AT90USB647__) \
1935 || defined(__AVR_AT90USB1286__) \
1936 || defined(__AVR_AT90USB1287__)
1937 
1938 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1939 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1940 
1941 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1942 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1943 
1944 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1945 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1946 
1947 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1948 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1949 
1950 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1951 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1952 
1953 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1954 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1955 
1956 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1957 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1958 
1959 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1960 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1961 
1962 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
1963 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
1964 
1965 #define power_all_enable() \
1966 do{ \
1967  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
1968  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
1969 }while(0)
1970 
1971 #define power_all_disable() \
1972 do{ \
1973  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
1974  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
1975 }while(0)
1976 
1977 
1978 #elif defined(__AVR_ATmega32U4__) \
1979 || defined(__AVR_ATmega16U4__)
1980 
1981 
1982 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1983 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1984 
1985 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1986 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1987 
1988 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1989 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1990 
1991 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1992 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1993 
1994 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1995 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1996 
1997 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1998 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1999 
2000 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2001 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2002 
2003 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2004 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2005 
2006 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2007 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2008 
2009 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2010 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2011 
2012 #define power_all_enable() \
2013 do{ \
2014  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2015  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2016 }while(0)
2017 
2018 #define power_all_disable() \
2019 do{ \
2020  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2021  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2022 }while(0)
2023 
2024 
2025 #elif defined(__AVR_ATmega32U6__)
2026 
2027 
2028 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2029 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2030 
2031 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2032 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2033 
2034 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2035 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2036 
2037 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2038 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2039 
2040 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2041 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2042 
2043 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2044 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2045 
2046 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2047 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2048 
2049 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2050 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2051 
2052 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2053 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2054 
2055 #define power_all_enable() \
2056 do{ \
2057  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2058  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2059 }while(0)
2060 
2061 #define power_all_disable() \
2062 do{ \
2063  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2064  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2065 }while(0)
2066 
2067 
2068 #elif defined(__AVR_AT90PWM1__)
2069 
2070 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2071 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2072 
2073 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2074 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2075 
2076 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2077 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2078 
2079 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2080 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2081 
2082 /* Power Stage Controller 0 */
2083 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
2084 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
2085 
2086 /* Power Stage Controller 1 */
2087 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
2088 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
2089 
2090 /* Power Stage Controller 2 */
2091 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
2092 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
2093 
2094 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2095 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2096 
2097 
2098 #elif defined(__AVR_AT90PWM2__) \
2099 || defined(__AVR_AT90PWM2B__) \
2100 || defined(__AVR_AT90PWM3__) \
2101 || defined(__AVR_AT90PWM3B__) \
2102 || defined(__AVR_AT90PWM216__) \
2103 || defined(__AVR_AT90PWM316__)
2104 
2105 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2106 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2107 
2108 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2109 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2110 
2111 #define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2112 #define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2113 
2114 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2115 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2116 
2117 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2118 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2119 
2120 /* Power Stage Controller 0 */
2121 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
2122 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
2123 
2124 /* Power Stage Controller 1 */
2125 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
2126 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
2127 
2128 /* Power Stage Controller 2 */
2129 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
2130 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
2131 
2132 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2133 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2134 
2135 
2136 #elif defined(__AVR_AT90PWM81__) \
2137 || defined(__AVR_AT90PWM161__)
2138 
2139 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2140 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2141 
2142 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2143 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2144 
2145 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2146 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2147 
2148 /* Reduced Power Stage Controller */
2149 #define power_pscr_enable() (PRR &= (uint8_t)~(1 << PRPSCR))
2150 #define power_pscr_disable() (PRR |= (uint8_t)(1 << PRPSCR))
2151 
2152 /* Power Stage Controller 2 */
2153 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
2154 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
2155 
2156 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
2157 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
2158 
2159 
2160 #elif defined(__AVR_ATmega165__) \
2161 || defined(__AVR_ATmega165A__) \
2162 || defined(__AVR_ATmega165P__) \
2163 || defined(__AVR_ATmega165PA__) \
2164 || defined(__AVR_ATmega325__) \
2165 || defined(__AVR_ATmega325A__) \
2166 || defined(__AVR_ATmega325P__) \
2167 || defined(__AVR_ATmega325PA__) \
2168 || defined(__AVR_ATmega3250__) \
2169 || defined(__AVR_ATmega3250A__) \
2170 || defined(__AVR_ATmega3250P__) \
2171 || defined(__AVR_ATmega3250PA__) \
2172 || defined(__AVR_ATmega645__) \
2173 || defined(__AVR_ATmega645A__) \
2174 || defined(__AVR_ATmega645P__) \
2175 || defined(__AVR_ATmega6450__) \
2176 || defined(__AVR_ATmega6450A__) \
2177 || defined(__AVR_ATmega6450P__)
2178 
2179 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2180 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2181 
2182 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2183 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2184 
2185 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2186 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2187 
2188 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2189 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2190 
2191 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
2192 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
2193 
2194 
2195 #elif defined(__AVR_ATmega169__) \
2196 || defined(__AVR_ATmega169A__) \
2197 || defined(__AVR_ATmega169P__) \
2198 || defined(__AVR_ATmega169PA__) \
2199 || defined(__AVR_ATmega329__) \
2200 || defined(__AVR_ATmega329A__) \
2201 || defined(__AVR_ATmega329P__) \
2202 || defined(__AVR_ATmega329PA__) \
2203 || defined(__AVR_ATmega3290__) \
2204 || defined(__AVR_ATmega3290A__) \
2205 || defined(__AVR_ATmega3290P__) \
2206 || defined(__AVR_ATmega3290PA__) \
2207 || defined(__AVR_ATmega649__) \
2208 || defined(__AVR_ATmega649A__) \
2209 || defined(__AVR_ATmega649P__) \
2210 || defined(__AVR_ATmega6490__) \
2211 || defined(__AVR_ATmega6490A__) \
2212 || defined(__AVR_ATmega6490P__)
2213 
2214 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2215 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2216 
2217 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2218 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2219 
2220 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2221 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2222 
2223 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2224 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2225 
2226 #define power_lcd_enable() (PRR &= (uint8_t)~(1 << PRLCD))
2227 #define power_lcd_disable() (PRR |= (uint8_t)(1 << PRLCD))
2228 
2229 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
2230 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
2231 
2232 
2233 #elif defined(__AVR_ATmega164A__) \
2234 || defined(__AVR_ATmega164P__) \
2235 || defined(__AVR_ATmega324A__) \
2236 || defined(__AVR_ATmega324P__) \
2237 || defined(__AVR_ATmega324PA__) \
2238 || defined(__AVR_ATmega644P__) \
2239 || defined(__AVR_ATmega644A__) \
2240 || defined(__AVR_ATmega644PA__)
2241 
2242 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2243 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2244 
2245 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2246 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2247 
2248 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2249 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2250 
2251 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
2252 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
2253 
2254 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2255 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2256 
2257 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2258 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2259 
2260 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2261 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2262 
2263 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2264 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2265 
2266 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2267 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2268 
2269 
2270 #elif defined(__AVR_ATmega644__) \
2271 || defined(__AVR_ATmega164PA__)
2272 
2273 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2274 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2275 
2276 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2277 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2278 
2279 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2280 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2281 
2282 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2283 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2284 
2285 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2286 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2287 
2288 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2289 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2290 
2291 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2292 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2293 
2294 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2295 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2296 
2297 
2298 #elif defined(__AVR_ATmega406__)
2299 
2300 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2301 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2302 
2303 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2304 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2305 
2306 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2307 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2308 
2309 /* Voltage ADC */
2310 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
2311 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
2312 
2313 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
2314 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
2315 
2316 
2317 #elif defined(__AVR_ATmega48__) \
2318 || defined(__AVR_ATmega48A__) \
2319 || defined(__AVR_ATmega48PA__) \
2320 || defined(__AVR_ATmega48P__) \
2321 || defined(__AVR_ATmega88__) \
2322 || defined(__AVR_ATmega88A__) \
2323 || defined(__AVR_ATmega88P__) \
2324 || defined(__AVR_ATmega88PA__) \
2325 || defined(__AVR_ATmega168__) \
2326 || defined(__AVR_ATmega168A__) \
2327 || defined(__AVR_ATmega168P__) \
2328 || defined(__AVR_ATmega168PA__) \
2329 || defined(__AVR_ATmega328__) \
2330 || defined(__AVR_ATmega328P__) \
2331 || defined(__AVR_ATtiny441__) \
2332 || defined(__AVR_ATtiny828__) \
2333 || defined(__AVR_ATtiny841__) \
2334 || defined(__AVR_ATA6612C__) \
2335 || defined(__AVR_ATA6613C__) \
2336 || defined(__AVR_ATA6614Q__)
2337 
2338 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2339 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2340 
2341 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2342 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2343 
2344 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2345 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2346 
2347 #if defined(__AVR_ATtiny441__) \
2348 || defined(__AVR_ATtiny841__)
2349 
2350 #define power_usart1_enable() (PRR &= (uint8_t)~(1 << PRUSART1))
2351 #define power_usart1_disable() (PRR |= (uint8_t)(1 << PRUSART1))
2352 
2353 #endif
2354 
2355 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2356 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2357 
2358 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2359 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2360 
2361 #if !defined(__AVR_ATtiny828__)
2362 
2363 #define power_timer2_enable() (PRR &= (uint8_t)~(1 << PRTIM2))
2364 #define power_timer2_disable() (PRR |= (uint8_t)(1 << PRTIM2))
2365 
2366 #endif
2367 
2368 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
2369 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
2370 
2371 #if defined(__AVR_ATtiny828__)
2372 
2373 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2374 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2375 
2376 #elif defined(__AVR_ATtiny441__) \
2377 || defined(__AVR_ATtiny841__)
2378 
2379 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2380 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2381 
2382 #else
2383 
2384 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2385 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2386 
2387 #endif
2388 
2389 #elif defined(__AVR_ATtiny48__) \
2390 || defined(__AVR_ATtiny88__)
2391 
2392 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2393 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2394 
2395 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2396 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2397 
2398 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2399 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2400 
2401 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2402 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2403 
2404 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
2405 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
2406 
2407 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2408 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2409 
2410 
2411 #elif defined(__AVR_ATtiny24__) \
2412 || defined(__AVR_ATtiny24A__) \
2413 || defined(__AVR_ATtiny44__) \
2414 || defined(__AVR_ATtiny44A__) \
2415 || defined(__AVR_ATtiny84__) \
2416 || defined(__AVR_ATtiny84A__) \
2417 || defined(__AVR_ATtiny25__) \
2418 || defined(__AVR_ATtiny45__) \
2419 || defined(__AVR_ATtiny85__) \
2420 || defined(__AVR_ATtiny261__) \
2421 || defined(__AVR_ATtiny261A__) \
2422 || defined(__AVR_ATtiny461__) \
2423 || defined(__AVR_ATtiny461A__) \
2424 || defined(__AVR_ATtiny861__) \
2425 || defined(__AVR_ATtiny861A__) \
2426 || defined(__AVR_ATtiny43U__)
2427 
2428 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2429 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2430 
2431 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2432 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2433 
2434 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2435 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2436 
2437 /* Universal Serial Interface */
2438 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
2439 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
2440 
2441 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
2442 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
2443 
2444 #elif defined(__AVR_ATmega1284__)
2445 
2446 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2447 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2448 
2449 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2450 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2451 
2452 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2453 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2454 
2455 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2456 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2457 
2458 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2459 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2460 
2461 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2462 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2463 
2464 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2465 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2466 
2467 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2468 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2469 
2470 #define power_all_enable() \
2471 do{ \
2472  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
2473  PRR1 &= (uint8_t)~(1<<PRTIM3); \
2474 }while(0)
2475 
2476 #define power_all_disable() \
2477 do{ \
2478  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
2479  PRR1 |= (uint8_t)(1<<PRTIM3); \
2480 }while(0)
2481 
2482 #elif defined(__AVR_ATmega1284P__)
2483 
2484 
2485 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2486 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2487 
2488 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2489 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2490 
2491 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2492 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2493 
2494 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2495 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2496 
2497 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2498 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2499 
2500 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2501 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2502 
2503 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2504 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2505 
2506 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2507 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2508 
2509 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
2510 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
2511 
2512 #define power_all_enable() \
2513 do{ \
2514  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
2515  PRR1 &= (uint8_t)~(1<<PRTIM3); \
2516 }while(0)
2517 
2518 #define power_all_disable() \
2519 do{ \
2520  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
2521  PRR1 |= (uint8_t)(1<<PRTIM3); \
2522 }while(0)
2523 
2524 
2525 #elif defined(__AVR_ATmega32HVB__) \
2526 || defined(__AVR_ATmega32HVBrevB__) \
2527 || defined(__AVR_ATmega16HVB__) \
2528 || defined(__AVR_ATmega16HVBrevB__)
2529 
2530 
2531 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2532 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2533 
2534 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2535 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2536 
2537 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2538 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2539 
2540 /* Voltage ADC */
2541 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
2542 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
2543 
2544 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2545 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2546 
2547 #define power_vrm_enable() (PRR0 &= (uint8_t)~(1 << PRVRM))
2548 #define power_vrm_disable() (PRR0 |= (uint8_t)(1 << PRVRM))
2549 
2550 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
2551 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
2552 
2553 
2554 #elif defined (__AVR_ATA5790__) \
2555 || defined (__AVR_ATA5790N__) \
2556 || defined (__AVR_ATA5795__)
2557 
2558 // Enable the voltage monitor
2559 #define power_vmonitor_enable() (PRR0 &= (uint8_t)~(1 << PRVM))
2560 #define power_vmonitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
2561 
2562 #define power_irdriver_enable() (PRR0 &= (uint8_t)~(1 << PRDS))
2563 #define power_irdriver_disable() (PRR0 |= (uint8_t)(1 << PRDS))
2564 
2565 #define power_crypto_enable() (PRR0 &= (uint8_t)~(1 << PRCU))
2566 #define power_crypto_disable() (PRR0 |= (uint8_t)(1 << PRCU))
2567 
2568 #define power_timermodulator_enable() (PRR0 &= (uint8_t)~(1 << PRTM))
2569 #define power_timermodulator_disable() (PRR0 |= (uint8_t)(1 << PRTM))
2570 
2571 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRT1))
2572 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRT1))
2573 
2574 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRT2))
2575 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRT2))
2576 
2577 #define power_timer3_enable() (PRR0 &= (uint8_t)~(1 << PRT3))
2578 #define power_timer3_disable() (PRR0 |= (uint8_t)(1 << PRT3))
2579 
2580 #define power_spi_enable() (PRR1 &= (uint8_t)~(1 << PRSPI))
2581 #define power_spi_disable() (PRR1 |= (uint8_t)(1 << PRSPI))
2582 
2583 #define power_cinterface_enable() (PRR1 &= (uint8_t)~(1 << PRCI))
2584 #define power_cinterface_disable() (PRR1 |= (uint8_t)(1 << PRCI))
2585 
2586 #if defined(__AVR_ATA5790__) \
2587 || defined(__AVR_ATA5790N__)
2588 
2589 #define power_lfreceiver_enable() (PRR0 &= (uint8_t)~(1 << PRLFR))
2590 #define power_lfreceiver_disable() (PRR0 |= (uint8_t)(1 << PRLFR))
2591 
2592 #define power_all_enable() \
2593 do{ \
2594  PRR0 &= (uint8_t)~((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)|(1<<PRLFR)); \
2595  PRR1 &= (uint8_t)~((1<<PRSPI)|(1<<PRCI)); \
2596 }while(0)
2597 
2598 #define power_all_disable() \
2599 do{ \
2600  PRR0 |= (uint8_t)((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)|(1<<PRLFR)); \
2601  PRR1 |= (uint8_t)((1<<PRSPI)|(1<<PRCI)); \
2602 }while(0)
2603 
2604 #elif defined(__AVR_ATA5795__)
2605 
2606 #define power_all_enable() \
2607 do{ \
2608  PRR0 &= (uint8_t)~((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)); \
2609  PRR1 &= (uint8_t)~((1<<PRSPI)|(1<<PRCI)); \
2610 }while(0)
2611 
2612 #define power_all_disable() \
2613 do{ \
2614  PRR0 |= (uint8_t)((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)); \
2615  PRR1 |= (uint8_t)((1<<PRSPI)|(1<<PRCI)); \
2616 }while(0)
2617 
2618 #endif
2619 
2620 #elif defined(__AVR_ATA5831__) \
2621 || defined(__AVR_ATA5702M322__) \
2622 || defined(__AVR_ATA5782__)
2623 
2624 #if defined(__AVR_ATA5702M322__)
2625 
2626 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2627 #define power_twi_disable() (PRR0 &= (uint8_t)(1 << PRTWI))
2628 
2629 #define power_crypto_enable() (PRR0 &= (uint8_t)~(1 << PRCU))
2630 #define power_crypto_disable() (PRR0 |= (uint8_t)(1 << PRCU))
2631 
2632 #endif
2633 
2634 #define power_clock_output_enable() (PRR0 &= (uint8_t)~(1 << PRCO))
2635 #define power_clock_output_disable() (PRR0 |= (uint8_t)(1 << PRCO))
2636 
2637 #define power_voltage_monitor_enable() (PRR0 &= (uint8_t)~(1 << PRVM))
2638 #define power_voltage_monitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
2639 
2640 #define power_crc_enable() (PRR0 &= (uint8_t)~(1 << PRCRC))
2641 #define power_crc_disable() (PRR0 |= (uint8_t)(1 << PRCRC))
2642 
2643 #define power_transmit_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRTXDC))
2644 #define power_transmit_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRTXDC))
2645 
2646 #if defined(__AVR_ATA5831__) \
2647 || defined(__AVR_ATA5782__)
2648 
2649 #define power_receive_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRRXDC))
2650 #define power_receive_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRRXDC))
2651 
2652 #endif
2653 
2654 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2655 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2656 
2657 #if defined (__AVR_ATA5702M322__)
2658 
2659 #define power_cinterface_enable() (PRR1 &= (uint8_t)~(1 << PRCI))
2660 #define power_cinterface_disable() (PRR1 |= (uint8_t)(1 << PRCI))
2661 
2662 #define power_lfreceiver_enable() (PRR1 &= (uint8_t)~(1 << PRLFR))
2663 #define power_lfreceiver_disable() (PRR1 |= (uint8_t)(1 << PRLFR))
2664 
2665 #endif
2666 
2667 #define power_timer1_enable() (PRR1 &= (uint8_t)~(1 << PRT1))
2668 #define power_timer1_disable() (PRR1 |= (uint8_t)(1 << PRT1))
2669 
2670 #define power_timer2_enable() (PRR1 &= (uint8_t)~(1 << PRT2))
2671 #define power_timer2_disable() (PRR1 |= (uint8_t)(1 << PRT2))
2672 
2673 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRT3))
2674 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRT3))
2675 
2676 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRT4))
2677 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRT4))
2678 
2679 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRT5))
2680 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRT5))
2681 
2682 #define power_sequencer_state_machine_enable() (PRR2 &= (uint8_t)~(1 << PRSSM))
2683 #define power_sequencer_state_machine_disable() (PRR2 |= (uint8_t)(1 << PRSSM))
2684 
2685 #define power_tx_modulator_enable() (PRR2 &= (uint8_t)~(1 << PRTM))
2686 #define power_tx_modulator_disable() (PRR2 |= (uint8_t)(1 << PRTM))
2687 
2688 #if defined(__AVR_ATA5831__) \
2689 || defined(__AVR_ATA5782__)
2690 
2691 #define power_rssi_buffer_enable() (PRR2 &= (uint8_t)~(1 << PRRS))
2692 #define power_rssi_buffer_disable() (PRR2 |= (uint8_t)(1 << PRRS))
2693 
2694 #define power_id_scan_enable() (PRR2 &= (uint8_t)~(1 << PRIDS))
2695 #define power_id_scan_disable() (PRR2 |= (uint8_t)(1 << PRIDS))
2696 
2697 #define power_rx_buffer_A_enable() (PRR2 &= (uint8_t)~(1 << PRXA))
2698 #define power_rx_buffer_A_disable() (PRR2 |= (uint8_t)(1 << PRXA))
2699 
2700 #define power_rx_buffer_B_enable() (PRR2 &= (uint8_t)~(1 << PRXB))
2701 #define power_rx_buffer_B_disable() (PRR2 |= (uint8_t)(1 << PRXB))
2702 
2703 #endif
2704 
2705 #define power_data_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRDF))
2706 #define power_data_fifo_disable() (PRR2 |= (uint8_t)(1 << PRDF))
2707 
2708 #define power_preamble_rssi_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRSF))
2709 #define power_preamble_rssi_fifo_disable() (PRR2 |= (uint8_t)(1 << PRSF))
2710 
2711 #define power_rx_buffer_A_enable() (PRR2 &= (uint8_t)~(1 << PRXA))
2712 #define power_rx_buffer_A_disable() (PRR2 |= (uint8_t)(1 << PRXA))
2713 
2714 #define power_rx_buffer_B_enable() (PRR2 &= (uint8_t)~(1 << PRXB))
2715 #define power_rx_buffer_B_disable() (PRR2 |= (uint8_t)(1 << PRXB))
2716 
2717 #if defined(__AVR_ATA5831__) \
2718 || defined(__AVR_ATA5782__)
2719 
2720 #define power_all_enable() \
2721 do{ \
2722  PRR0 &= (uint8_t)~((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
2723  PRR1 &= (uint8_t)~((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
2724  PRR2 &= (uint8_t)~((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
2725 }while(0)
2726 
2727 #define power_all_disable() \
2728 do{ \
2729  PRR0 |= (uint8_t)((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
2730  PRR1 |= (uint8_t)((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
2731  PRR2 |= (uint8_t)((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
2732 }while(0)
2733 
2734 #elif defined (__AVR_ATA5702M322__)
2735 
2736 #define power_all_enable() \
2737 do{ \
2738  PRR0 &= (uint8_t)~((1 << PRTWI) | (1 << PRCU) | (1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRSPI)); \
2739  PRR1 &= (uint8_t)~((1 << PRCI) | (1 << PRLFR)| (1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
2740  PRR2 &= (uint8_t)~((1 << PRSSM) | (1 << PRTM) | (1 << PRDF) | (1 << PRSF)); \
2741 }while(0)
2742 
2743 #define power_all_disable() \
2744 do{ \
2745  PRR0 &= (uint8_t)((1 << PRTWI) | (1 << PRCU) | (1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRSPI)); \
2746  PRR1 &= (uint8_t)((1 << PRCI) | (1 << PRLFR)| (1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
2747  PRR2 &= (uint8_t)((1 << PRSSM) | (1 << PRTM) | (1 << PRDF) | (1 << PRSF)); \
2748 }while(0)
2749 
2750 #endif
2751 
2752 #elif defined(__AVR_ATmega64HVE__) \
2753 || defined(__AVR_ATmega64HVE2__)
2754 
2755 #define power_lin_enable() (PRR0 &= (uint8_t)~(1 << PRLIN))
2756 #define power_lin_disable() (PRR0 |= (uint8_t)(1 << PRLIN))
2757 
2758 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2759 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2760 
2761 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2762 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2763 
2764 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2765 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2766 
2767 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)))
2768 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)))
2769 
2770 #elif defined(__AVR_ATmega16M1__) \
2771 || defined(__AVR_ATmega32C1__) \
2772 || defined(__AVR_ATmega32M1__) \
2773 || defined(__AVR_ATmega64C1__) \
2774 || defined(__AVR_ATmega64M1__)
2775 
2776 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2777 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2778 
2779 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
2780 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
2781 
2782 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2783 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2784 
2785 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2786 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2787 
2788 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2789 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2790 
2791 #define power_psc_enable() (PRR &= (uint8_t)~(1 << PRPSC))
2792 #define power_psc_disable() (PRR |= (uint8_t)(1 << PRPSC))
2793 
2794 #define power_can_enable() (PRR &= (uint8_t)~(1 << PRCAN))
2795 #define power_can_disable() (PRR |= (uint8_t)(1 << PRCAN))
2796 
2797 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
2798 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
2799 
2800 
2801 #elif defined(__AVR_ATtiny167__) \
2802 || defined(__AVR_ATtiny87__) \
2803 || defined(__AVR_ATA5505__) \
2804 || defined(__AVR_ATA5272__) \
2805 || defined(__AVR_ATA6616C__) \
2806 || defined(__AVR_ATA6617C__) \
2807 || defined(__AVR_ATA664251__)
2808 
2809 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2810 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2811 
2812 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
2813 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
2814 
2815 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2816 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2817 
2818 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2819 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2820 
2821 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2822 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2823 
2824 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
2825 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
2826 
2827 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
2828 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
2829 
2830 
2831 #elif defined(__AVR_ATtiny1634__)
2832 
2833 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2834 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2835 
2836 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2837 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2838 
2839 #define power_usart1_enable() (PRR &= (uint8_t)~(1 << PRUSART1))
2840 #define power_usart1_disable() (PRR |= (uint8_t)(1 << PRUSART1))
2841 
2842 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
2843 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
2844 
2845 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2846 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2847 
2848 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2849 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2850 
2851 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
2852 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
2853 
2854 #define power_all_enable() (PRR &= (uint8_t)~((1 << PRTWI)|(1 << PRUSI)|(1 << PRTIM0)|(1 << PRTIM1)|(1 << PRUSART0)|(1 << PRUSART1)|(1 << PRADC)))
2855 #define power_all_disable() (PRR |= (uint8_t)((1 << PRTWI)|(1 << PRUSI)|(1 << PRTIM0)|(1 << PRTIM1)|(1 << PRUSART0)|(1 << PRUSART1)|(1 << PRADC)))
2856 
2857 
2858 #elif defined(__AVR_AT90USB82__) \
2859 || defined(__AVR_AT90USB162__) \
2860 || defined(__AVR_ATmega8U2__) \
2861 || defined(__AVR_ATmega16U2__) \
2862 || defined(__AVR_ATmega32U2__)
2863 
2864 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2865 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2866 
2867 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2868 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2869 
2870 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2871 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2872 
2873 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2874 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2875 
2876 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2877 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2878 
2879 #define power_all_enable() \
2880 do{ \
2881  PRR0 &= (uint8_t)~((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
2882  PRR1 &= (uint8_t)~((1<<PRUSB)|(1<<PRUSART1)); \
2883 }while(0)
2884 
2885 #define power_all_disable() \
2886 do{ \
2887  PRR0 |= (uint8_t)((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
2888  PRR1 |= (uint8_t)((1<<PRUSB)|(1<<PRUSART1)); \
2889 }while(0)
2890 
2891 
2892 #elif defined(__AVR_AT90SCR100__)
2893 
2894 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2895 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2896 
2897 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2898 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2899 
2900 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2901 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2902 
2903 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2904 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2905 
2906 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2907 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2908 
2909 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2910 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2911 
2912 #define power_usbh_enable() (PRR1 &= (uint8_t)~(1 << PRUSBH))
2913 #define power_usbh_disable() (PRR1 |= (uint8_t)(1 << PRUSBH))
2914 
2915 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2916 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2917 
2918 #define power_hsspi_enable() (PRR1 &= (uint8_t)~(1 << PRHSSPI))
2919 #define power_hsspi_disable() (PRR1 |= (uint8_t)(1 << PRHSSPI))
2920 
2921 #define power_sci_enable() (PRR1 &= (uint8_t)~(1 << PRSCI))
2922 #define power_sci_disable() (PRR1 |= (uint8_t)(1 << PRSCI))
2923 
2924 #define power_aes_enable() (PRR1 &= (uint8_t)~(1 << PRAES))
2925 #define power_aes_disable() (PRR1 |= (uint8_t)(1 << PRAES))
2926 
2927 #define power_kb_enable() (PRR1 &= (uint8_t)~(1 << PRKB))
2928 #define power_kb_disable() (PRR1 |= (uint8_t)(1 << PRKB))
2929 
2930 #define power_all_enable() \
2931 do{ \
2932  PRR0 &= (uint8_t)~((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
2933  PRR1 &= (uint8_t)~((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
2934 }while(0)
2935 
2936 #define power_all_disable() \
2937 do{ \
2938  PRR0 |= (uint8_t)((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
2939  PRR1 |= (uint8_t)((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
2940 }while(0)
2941 
2942 
2943 #elif defined(__AVR_ATtiny4__) \
2944 || defined(__AVR_ATtiny5__) \
2945 || defined(__AVR_ATtiny9__) \
2946 || defined(__AVR_ATtiny10__) \
2947 || defined(__AVR_ATtiny13A__) \
2948 
2949 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2950 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2951 
2952 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2953 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2954 
2955 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)))
2956 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)))
2957 
2958 
2959 #elif defined(__AVR_ATtiny20__) \
2960 || defined(__AVR_ATtiny40__)
2961 
2962 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2963 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2964 
2965 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2966 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2967 
2968 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2969 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2970 
2971 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2972 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2973 
2974 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
2975 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
2976 
2977 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
2978 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
2979 
2980 #endif
2981 
2982 
2983 #if defined(__AVR_AT90CAN32__) \
2984 || defined(__AVR_AT90CAN64__) \
2985 || defined(__AVR_AT90CAN128__) \
2986 || defined(__AVR_AT90PWM1__) \
2987 || defined(__AVR_AT90PWM2__) \
2988 || defined(__AVR_AT90PWM2B__) \
2989 || defined(__AVR_AT90PWM3__) \
2990 || defined(__AVR_AT90PWM3B__) \
2991 || defined(__AVR_AT90PWM81__) \
2992 || defined(__AVR_AT90PWM161__) \
2993 || defined(__AVR_AT90PWM216__) \
2994 || defined(__AVR_AT90PWM316__) \
2995 || defined(__AVR_AT90SCR100__) \
2996 || defined(__AVR_AT90USB646__) \
2997 || defined(__AVR_AT90USB647__) \
2998 || defined(__AVR_AT90USB82__) \
2999 || defined(__AVR_AT90USB1286__) \
3000 || defined(__AVR_AT90USB1287__) \
3001 || defined(__AVR_AT90USB162__) \
3002 || defined(__AVR_ATA5505__) \
3003 || defined(__AVR_ATA5272__) \
3004 || defined(__AVR_ATA6617C__) \
3005 || defined(__AVR_ATA664251__) \
3006 || defined(__AVR_ATmega1280__) \
3007 || defined(__AVR_ATmega1281__) \
3008 || defined(__AVR_ATmega1284__) \
3009 || defined(__AVR_ATmega128RFA1__) \
3010 || defined(__AVR_ATmega128RFR2__) \
3011 || defined(__AVR_ATmega1284RFR2__) \
3012 || defined(__AVR_ATmega1284P__) \
3013 || defined(__AVR_ATmega162__) \
3014 || defined(__AVR_ATmega164A__) \
3015 || defined(__AVR_ATmega164P__) \
3016 || defined(__AVR_ATmega164PA__) \
3017 || defined(__AVR_ATmega165__) \
3018 || defined(__AVR_ATmega165A__) \
3019 || defined(__AVR_ATmega165P__) \
3020 || defined(__AVR_ATmega165PA__) \
3021 || defined(__AVR_ATmega168__) \
3022 || defined(__AVR_ATmega168A__) \
3023 || defined(__AVR_ATmega168P__) \
3024 || defined(__AVR_ATmega168PA__) \
3025 || defined(__AVR_ATmega169__) \
3026 || defined(__AVR_ATmega169A__) \
3027 || defined(__AVR_ATmega169P__) \
3028 || defined(__AVR_ATmega169PA__) \
3029 || defined(__AVR_ATmega16M1__) \
3030 || defined(__AVR_ATmega16U2__) \
3031 || defined(__AVR_ATmega324PA__) \
3032 || defined(__AVR_ATmega16U4__) \
3033 || defined(__AVR_ATmega2560__) \
3034 || defined(__AVR_ATmega2561__) \
3035 || defined(__AVR_ATmega256RFR2__) \
3036 || defined(__AVR_ATmega2564RFR2__) \
3037 || defined(__AVR_ATmega324A__) \
3038 || defined(__AVR_ATmega324P__) \
3039 || defined(__AVR_ATmega325__) \
3040 || defined(__AVR_ATmega325A__) \
3041 || defined(__AVR_ATmega325P__) \
3042 || defined(__AVR_ATmega325PA__) \
3043 || defined(__AVR_ATmega3250__) \
3044 || defined(__AVR_ATmega3250A__) \
3045 || defined(__AVR_ATmega3250P__) \
3046 || defined(__AVR_ATmega3250PA__) \
3047 || defined(__AVR_ATmega328__) \
3048 || defined(__AVR_ATmega328P__) \
3049 || defined(__AVR_ATmega329__) \
3050 || defined(__AVR_ATmega329A__) \
3051 || defined(__AVR_ATmega329P__) \
3052 || defined(__AVR_ATmega329PA__) \
3053 || defined(__AVR_ATmega3290__) \
3054 || defined(__AVR_ATmega3290A__) \
3055 || defined(__AVR_ATmega3290P__) \
3056 || defined(__AVR_ATmega3290PA__) \
3057 || defined(__AVR_ATmega32C1__) \
3058 || defined(__AVR_ATmega32M1__) \
3059 || defined(__AVR_ATmega32U2__) \
3060 || defined(__AVR_ATmega32U4__) \
3061 || defined(__AVR_ATmega32U6__) \
3062 || defined(__AVR_ATmega48__) \
3063 || defined(__AVR_ATmega48A__) \
3064 || defined(__AVR_ATmega48PA__) \
3065 || defined(__AVR_ATmega48P__) \
3066 || defined(__AVR_ATmega640__) \
3067 || defined(__AVR_ATmega649P__) \
3068 || defined(__AVR_ATmega644__) \
3069 || defined(__AVR_ATmega644A__) \
3070 || defined(__AVR_ATmega644P__) \
3071 || defined(__AVR_ATmega644PA__) \
3072 || defined(__AVR_ATmega645__) \
3073 || defined(__AVR_ATmega645A__) \
3074 || defined(__AVR_ATmega645P__) \
3075 || defined(__AVR_ATmega6450__) \
3076 || defined(__AVR_ATmega6450A__) \
3077 || defined(__AVR_ATmega6450P__) \
3078 || defined(__AVR_ATmega649__) \
3079 || defined(__AVR_ATmega649A__) \
3080 || defined(__AVR_ATmega64M1__) \
3081 || defined(__AVR_ATmega64C1__) \
3082 || defined(__AVR_ATmega88A__) \
3083 || defined(__AVR_ATmega88PA__) \
3084 || defined(__AVR_ATmega6490__) \
3085 || defined(__AVR_ATmega6490A__) \
3086 || defined(__AVR_ATmega6490P__) \
3087 || defined(__AVR_ATmega64RFR2__) \
3088 || defined(__AVR_ATmega644RFR2__) \
3089 || defined(__AVR_ATmega88__) \
3090 || defined(__AVR_ATmega88P__) \
3091 || defined(__AVR_ATmega8U2__) \
3092 || defined(__AVR_ATmega16U2__) \
3093 || defined(__AVR_ATmega32U2__) \
3094 || defined(__AVR_ATtiny48__) \
3095 || defined(__AVR_ATtiny88__) \
3096 || defined(__AVR_ATtiny87__) \
3097 || defined(__AVR_ATtiny167__) \
3098 || defined(__DOXYGEN__)
3099 
3100 
3101 /** \addtogroup avr_power
3102 
3103 Some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that
3104 allows you to decrease the system clock frequency and the power consumption
3105 when the need for processing power is low.
3106 On some earlier AVRs (ATmega103, ATmega64, ATmega128), similar
3107 functionality can be achieved through the XTAL Divide Control Register.
3108 Below are two macros and an enumerated type that can be used to
3109 interface to the Clock Prescale Register or
3110 XTAL Divide Control Register.
3111 
3112 \note Not all AVR devices have a clock prescaler. On those devices
3113 without a Clock Prescale Register or XTAL Divide Control Register, these
3114 macros are not available.
3115 */
3116 
3117 
3118 /** \addtogroup avr_power
3119 \code
3120 typedef enum
3121 {
3122  clock_div_1 = 0,
3123  clock_div_2 = 1,
3124  clock_div_4 = 2,
3125  clock_div_8 = 3,
3126  clock_div_16 = 4,
3127  clock_div_32 = 5,
3128  clock_div_64 = 6,
3129  clock_div_128 = 7,
3130  clock_div_256 = 8,
3131  clock_div_1_rc = 15, // ATmega128RFA1 only
3132 } clock_div_t;
3133 \endcode
3134 Clock prescaler setting enumerations for device using
3135 System Clock Prescale Register.
3136 
3137 \code
3138 typedef enum
3139 {
3140  clock_div_1 = 1,
3141  clock_div_2 = 2,
3142  clock_div_4 = 4,
3143  clock_div_8 = 8,
3144  clock_div_16 = 16,
3145  clock_div_32 = 32,
3146  clock_div_64 = 64,
3147  clock_div_128 = 128
3148 } clock_div_t;
3149 \endcode
3150 Clock prescaler setting enumerations for device using
3151 XTAL Divide Control Register.
3152 
3153 */
3154 typedef enum
3155 {
3156  clock_div_1 = 0,
3157  clock_div_2 = 1,
3158  clock_div_4 = 2,
3159  clock_div_8 = 3,
3160  clock_div_16 = 4,
3161  clock_div_32 = 5,
3162  clock_div_64 = 6,
3163  clock_div_128 = 7,
3164  clock_div_256 = 8
3165 #if defined(__AVR_ATmega128RFA1__) \
3166 || defined(__AVR_ATmega256RFR2__) \
3167 || defined(__AVR_ATmega2564RFR2__) \
3168 || defined(__AVR_ATmega128RFR2__) \
3169 || defined(__AVR_ATmega1284RFR2__) \
3170 || defined(__AVR_ATmega64RFR2__) \
3171 || defined(__AVR_ATmega644RFR2__)
3172  , clock_div_1_rc = 15
3173 #endif
3174 } clock_div_t;
3175 
3176 
3177 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3178 
3179 /** \addtogroup avr_power
3180 \code clock_prescale_set(x) \endcode
3181 
3182 Set the clock prescaler register select bits, selecting a system clock
3183 division setting. This function is inlined, even if compiler
3184 optimizations are disabled.
3185 
3186 The type of \c x is \c clock_div_t.
3187 
3188 \note For device with XTAL Divide Control Register (XDIV), \c x can actually range
3189 from 1 to 129. Thus, one does not need to use \c clock_div_t type as argument.
3190 */
3191 void clock_prescale_set(clock_div_t __x)
3192 {
3193  uint8_t __tmp = _BV(CLKPCE);
3194  __asm__ __volatile__ (
3195  "in __tmp_reg__,__SREG__" "\n\t"
3196  "cli" "\n\t"
3197  "sts %1, %0" "\n\t"
3198  "sts %1, %2" "\n\t"
3199  "out __SREG__, __tmp_reg__"
3200  : /* no outputs */
3201  : "d" (__tmp),
3202  "M" (_SFR_MEM_ADDR(CLKPR)),
3203  "d" (__x)
3204  : "r0");
3205 }
3206 
3207 /** \addtogroup avr_power
3208 \code clock_prescale_get() \endcode
3209 Gets and returns the clock prescaler register setting. The return type is \c clock_div_t.
3210 
3211 \note For device with XTAL Divide Control Register (XDIV), return can actually
3212 range from 1 to 129. Care should be taken has the return value could differ from the
3213 typedef enum clock_div_t. This should only happen if clock_prescale_set was previously
3214 called with a value other than those defined by \c clock_div_t.
3215 */
3216 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3217 
3218 #elif defined(__AVR_ATmega16HVB__) \
3219 || defined(__AVR_ATmega16HVBrevB__) \
3220 || defined(__AVR_ATmega64HVE__) \
3221 || defined(__AVR_ATmega32HVB__) \
3222 || defined(__AVR_ATmega32HVBrevB__) \
3223 || defined(__AVR_ATmega64HVE2__)
3224 
3225 typedef enum
3226 {
3227  clock_div_1 = 0,
3228  clock_div_2 = 1,
3229  clock_div_4 = 2,
3230  clock_div_8 = 3
3231 } clock_div_t;
3232 
3233 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3234 
3235 void clock_prescale_set(clock_div_t __x)
3236 {
3237  uint8_t __tmp = _BV(CLKPCE);
3238  __asm__ __volatile__ (
3239  "in __tmp_reg__,__SREG__" "\n\t"
3240  "cli" "\n\t"
3241  "sts %1, %0" "\n\t"
3242  "sts %1, %2" "\n\t"
3243  "out __SREG__, __tmp_reg__"
3244  : /* no outputs */
3245  : "d" (__tmp),
3246  "M" (_SFR_MEM_ADDR(CLKPR)),
3247  "d" (__x)
3248  : "r0");
3249 }
3250 
3251 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)))
3252 
3253 #elif defined(__AVR_ATA5790__) \
3254 || defined (__AVR_ATA5790N__) \
3255 || defined (__AVR_ATA5795__)
3256 
3257 typedef enum
3258 {
3259  clock_div_1 = 0,
3260  clock_div_2 = 1,
3261  clock_div_4 = 2,
3262  clock_div_8 = 3,
3263  clock_div_16 = 4,
3264  clock_div_32 = 5,
3265  clock_div_64 = 6,
3266  clock_div_128 = 7,
3267 } clock_div_t;
3268 
3269 static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3270 
3271 void system_clock_prescale_set(clock_div_t __x)
3272 {
3273  uint8_t __tmp = _BV(CLKPCE);
3274  __asm__ __volatile__ (
3275  "in __tmp_reg__,__SREG__" "\n\t"
3276  "cli" "\n\t"
3277  "out %1, %0" "\n\t"
3278  "out %1, %2" "\n\t"
3279  "out __SREG__, __tmp_reg__"
3280  : /* no outputs */
3281  : "d" (__tmp),
3282  "I" (_SFR_IO_ADDR(CLKPR)),
3283  "d" (__x)
3284  : "r0");
3285 }
3286 
3287 #define system_clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
3288 
3289 typedef enum
3290 {
3291  timer_clock_div_reset = 0,
3292  timer_clock_div_1 = 1,
3293  timer_clock_div_2 = 2,
3294  timer_clock_div_4 = 3,
3295  timer_clock_div_8 = 4,
3296  timer_clock_div_16 = 5,
3297  timer_clock_div_32 = 6,
3298  timer_clock_div_64 = 7
3299 } timer_clock_div_t;
3300 
3301 static __inline__ void timer_clock_prescale_set(timer_clock_div_t) __attribute__((__always_inline__));
3302 
3303 void timer_clock_prescale_set(timer_clock_div_t __x)
3304 {
3305  uint8_t __t;
3306  __asm__ __volatile__ (
3307  "in __tmp_reg__,__SREG__" "\n\t"
3308  "cli" "\n\t"
3309  "in %[temp],%[clkpr]" "\n\t"
3310  "out %[clkpr],%[enable]" "\n\t"
3311  "andi %[temp],%[not_CLTPS]" "\n\t"
3312  "or %[temp], %[set_value]" "\n\t"
3313  "out %[clkpr],%[temp]" "\n\t"
3314  "sei" "\n\t"
3315  "out __SREG__,__tmp_reg__" "\n\t"
3316  : /* no outputs */
3317  : [temp] "r" (__t),
3318  [clkpr] "I" (_SFR_IO_ADDR(CLKPR)),
3319  [enable] "r" (_BV(CLKPCE)),
3320  [not_CLTPS] "M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
3321  [set_value] "r" ((__x & 7) << 3)
3322  : "r0");
3323 }
3324 
3325 #define timer_clock_prescale_get() (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
3326 
3327 #elif defined(__AVR_ATA6285__) \
3328 || defined(__AVR_ATA6286__) \
3329 || defined(__AVR_ATA6289__) \
3330 || defined(__AVR_ATA5702M322__) \
3331 || defined(__AVR_ATA5782__) \
3332 || defined(__AVR_ATA5831__)
3333 
3334 typedef enum
3335 {
3336  clock_div_1 = 0,
3337  clock_div_2 = 1,
3338  clock_div_4 = 2,
3339  clock_div_8 = 3,
3340  clock_div_16 = 4,
3341  clock_div_32 = 5,
3342  clock_div_64 = 6,
3343  clock_div_128 = 7
3344 } clock_div_t;
3345 
3346 static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3347 
3348 void system_clock_prescale_set(clock_div_t __x)
3349 {
3350  uint8_t __t;
3351  __asm__ __volatile__ (
3352  "in __tmp_reg__,__SREG__" "\n\t"
3353  "cli" "\n\t"
3354  "in %[temp],%[clpr]" "\n\t"
3355  "out %[clpr],%[enable]" "\n\t"
3356  "andi %[temp],%[not_CLKPS]" "\n\t"
3357  "or %[temp], %[set_value]" "\n\t"
3358  "out %[clpr],%[temp]" "\n\t"
3359  "sei" "\n\t"
3360  "out __SREG__,__tmp_reg__" "\n\t"
3361  : /* no outputs */
3362  : [temp] "r" (__t),
3363 #if defined(__AVR_ATA6286__) \
3364 || defined(__AVR_ATA6285__) \
3365 || defined(__AVR_ATA6289__)
3366  [clpr] "I" (_SFR_IO_ADDR(CLKPR)),
3367 #elif defined(__AVR_ATA5831__) \
3368 || defined(__AVR_ATA5702M322__) \
3369 || defined(__AVR_ATA5782__)
3370  [clpr] "I" (_SFR_IO_ADDR(CLPR)),
3371 #endif
3372  [enable] "r" _BV(CLPCE),
3373  [not_CLKPS] "M" (0xFF & (~ ((1 << CLKPS2) | (1 << CLKPS1) | (1 << CLKPS0)))),
3374  [set_value] "r" (__x & 7)
3375  : "r0");
3376 }
3377 
3378 #if defined(__AVR_ATA6286__) \
3379 || defined(__AVR_ATA6285__) \
3380 || defined(__AVR_ATA6289__)
3381 
3382  #define system_clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
3383 
3384 #elif defined(__AVR_ATA5831__) \
3385 || defined(__AVR_ATA5702M322__) \
3386 || defined(__AVR_ATA5782__)
3387 
3388  #define system_clock_prescale_get() (clock_div_t)(CLPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
3389 
3390 #endif
3391 
3392 typedef enum
3393 {
3394  timer_clock_div_reset = 0,
3395  timer_clock_div_1 = 1,
3396  timer_clock_div_2 = 2,
3397  timer_clock_div_4 = 3,
3398  timer_clock_div_8 = 4,
3399  timer_clock_div_16 = 5,
3400  timer_clock_div_32 = 6,
3401  timer_clock_div_64 = 7
3402 } timer_clock_div_t;
3403 
3404 static __inline__ void timer_clock_prescale_set(timer_clock_div_t) __attribute__((__always_inline__));
3405 
3406 void timer_clock_prescale_set(timer_clock_div_t __x)
3407 {
3408  uint8_t __t;
3409  __asm__ __volatile__ (
3410  "in __tmp_reg__,__SREG__" "\n\t"
3411  "cli" "\n\t"
3412  "in %[temp],%[clpr]" "\n\t"
3413  "out %[clpr],%[enable]" "\n\t"
3414  "andi %[temp],%[not_CLTPS]" "\n\t"
3415  "or %[temp], %[set_value]" "\n\t"
3416  "out %[clpr],%[temp]" "\n\t"
3417  "sei" "\n\t"
3418  "out __SREG__,__tmp_reg__" "\n\t"
3419  : /* no outputs */
3420  : [temp] "r" (__t),
3421 #if defined(__AVR_ATA6286__) \
3422 || defined(__AVR_ATA6285__) \
3423 || defined(__AVR_ATA6289__)
3424  [clpr] "I" (_SFR_IO_ADDR(CLKPR)),
3425 #elif defined(__AVR_ATA5831__) \
3426 || defined(__AVR_ATA5702M322__) \
3427 || defined(__AVR_ATA5782__)
3428  [clpr] "I" (_SFR_IO_ADDR(CLPR)),
3429 #endif
3430  [enable] "r" (_BV(CLPCE)),
3431  [not_CLTPS] "M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
3432  [set_value] "r" ((__x & 7) << 3)
3433  : "r0");
3434 }
3435 
3436 #if defined(__AVR_ATA6286__) \
3437 || defined(__AVR_ATA6285__) \
3438 || defined(__AVR_ATA6289__)
3439 
3440  #define timer_clock_prescale_get() (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
3441 
3442 #elif defined(__AVR_ATA5831__) \
3443 || defined(__AVR_ATA5702M322__) \
3444 || defined(__AVR_ATA5782__)
3445 
3446  #define timer_clock_prescale_get() (timer_clock_div_t)(CLPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
3447 #endif
3448 
3449 #elif defined(__AVR_ATtiny24__) \
3450 || defined(__AVR_ATtiny24A__) \
3451 || defined(__AVR_ATtiny44__) \
3452 || defined(__AVR_ATtiny44A__) \
3453 || defined(__AVR_ATtiny84__) \
3454 || defined(__AVR_ATtiny84A__) \
3455 || defined(__AVR_ATtiny25__) \
3456 || defined(__AVR_ATtiny45__) \
3457 || defined(__AVR_ATtiny85__) \
3458 || defined(__AVR_ATtiny261A__) \
3459 || defined(__AVR_ATtiny261__) \
3460 || defined(__AVR_ATtiny461__) \
3461 || defined(__AVR_ATtiny461A__) \
3462 || defined(__AVR_ATtiny861__) \
3463 || defined(__AVR_ATtiny861A__) \
3464 || defined(__AVR_ATtiny2313__) \
3465 || defined(__AVR_ATtiny2313A__) \
3466 || defined(__AVR_ATtiny4313__) \
3467 || defined(__AVR_ATtiny13__) \
3468 || defined(__AVR_ATtiny13A__) \
3469 || defined(__AVR_ATtiny43U__) \
3470 
3471 typedef enum
3472 {
3473  clock_div_1 = 0,
3474  clock_div_2 = 1,
3475  clock_div_4 = 2,
3476  clock_div_8 = 3,
3477  clock_div_16 = 4,
3478  clock_div_32 = 5,
3479  clock_div_64 = 6,
3480  clock_div_128 = 7,
3481  clock_div_256 = 8
3482 } clock_div_t;
3483 
3484 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3485 
3486 void clock_prescale_set(clock_div_t __x)
3487 {
3488  uint8_t __tmp = _BV(CLKPCE);
3489  __asm__ __volatile__ (
3490  "in __tmp_reg__,__SREG__" "\n\t"
3491  "cli" "\n\t"
3492  "out %1, %0" "\n\t"
3493  "out %1, %2" "\n\t"
3494  "out __SREG__, __tmp_reg__"
3495  : /* no outputs */
3496  : "d" (__tmp),
3497  "I" (_SFR_IO_ADDR(CLKPR)),
3498  "d" (__x)
3499  : "r0");
3500 }
3501 
3502 
3503 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3504 
3505 #elif defined(__AVR_ATtiny441__) \
3506 || defined(__AVR_ATtiny841__)
3507 
3508 typedef enum
3509 {
3510  clock_div_1 = 0,
3511  clock_div_2 = 1,
3512  clock_div_4 = 2,
3513  clock_div_8 = 3,
3514  clock_div_16 = 4,
3515  clock_div_32 = 5,
3516  clock_div_64 = 6,
3517  clock_div_128 = 7,
3518  clock_div_256 = 8
3519 } clock_div_t;
3520 
3521 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3522 
3523 void clock_prescale_set(clock_div_t __x)
3524 {
3525 
3526  __asm__ __volatile__ (
3527  "in __tmp_reg__,__SREG__" "\n\t"
3528  "cli" "\n\t"
3529  "sts %2, %3" "\n\t"
3530  "sts %1, %0" "\n\t"
3531  "out __SREG__, __tmp_reg__"
3532  : /* no outputs */
3533  : "d" (__x),
3534  "M" (_SFR_MEM_ADDR(CLKPR)),
3535  "M" (_SFR_MEM_ADDR(CCP)),
3536  "r" ((uint8_t)0xD8)
3537  : "r0");
3538 }
3539 
3540 
3541 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3542 
3543 #elif defined(__AVR_ATtiny4__) \
3544 || defined(__AVR_ATtiny5__) \
3545 || defined(__AVR_ATtiny9__) \
3546 || defined(__AVR_ATtiny10__) \
3547 || defined(__AVR_ATtiny20__) \
3548 || defined(__AVR_ATtiny40__) \
3549 
3550 typedef enum
3551 {
3552  clock_div_1 = 0,
3553  clock_div_2 = 1,
3554  clock_div_4 = 2,
3555  clock_div_8 = 3,
3556  clock_div_16 = 4,
3557  clock_div_32 = 5,
3558  clock_div_64 = 6,
3559  clock_div_128 = 7,
3560  clock_div_256 = 8
3561 } clock_div_t;
3562 
3563 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3564 
3565 void clock_prescale_set(clock_div_t __x)
3566 {
3567  uint8_t __tmp = 0xD8;
3568  __asm__ __volatile__ (
3569  "in __tmp_reg__,__SREG__" "\n\t"
3570  "cli" "\n\t"
3571  "out %1, %0" "\n\t"
3572  "out %2, %3" "\n\t"
3573  "out __SREG__, __tmp_reg__"
3574  : /* no outputs */
3575  : "d" (__tmp),
3576  "I" (_SFR_IO_ADDR(CCP)),
3577  "I" (_SFR_IO_ADDR(CLKPSR)),
3578  "d" (__x)
3579  : "r16");
3580 }
3581 
3582 #define clock_prescale_get() (clock_div_t)(CLKPSR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3583 
3584 #elif defined(__AVR_ATmega64__) \
3585 || defined(__AVR_ATmega103__) \
3586 || defined(__AVR_ATmega128__)
3587 
3588 //Enum is declared for code compatibility
3589 typedef enum
3590 {
3591  clock_div_1 = 1,
3592  clock_div_2 = 2,
3593  clock_div_4 = 4,
3594  clock_div_8 = 8,
3595  clock_div_16 = 16,
3596  clock_div_32 = 32,
3597  clock_div_64 = 64,
3598  clock_div_128 = 128
3599 } clock_div_t;
3600 
3601 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3602 
3603 void clock_prescale_set(clock_div_t __x)
3604 {
3605  if((__x <= 0) || (__x > 129))
3606  {
3607  return;//Invalid value.
3608  }
3609  else
3610  {
3611  uint8_t __tmp = 0;
3612  //Algo explained:
3613  //1 - Clear XDIV in order for it to accept a new value (actually only
3614  // XDIVEN need to be cleared, but clearing XDIV is faster than
3615  // read-modify-write since we will rewrite XDIV later anyway)
3616  //2 - wait 8 clock cycle for stability, see datasheet erreta
3617  //3 - Exist if requested prescaller is 1
3618  //4 - Calculate XDIV6..0 value = 129 - __x
3619  //5 - Set XDIVEN bit in calculated value
3620  //6 - write XDIV with calculated value
3621  //7 - wait 8 clock cycle for stability, see datasheet erreta
3622  __asm__ __volatile__ (
3623  "in __tmp_reg__,__SREG__" "\n\t"
3624  "cli" "\n\t"
3625  "out %1, __zero_reg__" "\n\t"
3626  "nop" "\n\t"
3627  "nop" "\n\t"
3628  "nop" "\n\t"
3629  "nop" "\n\t"
3630  "nop" "\n\t"
3631  "nop" "\n\t"
3632  "nop" "\n\t"
3633  "nop" "\n\t"
3634  "cpi %0, 0x01" "\n\t"
3635  "breq L_%=" "\n\t"
3636  "ldi %2, 0x81" "\n\t" //129
3637  "sub %2, %0" "\n\t"
3638  "ori %2, 0x80" "\n\t" //128
3639  "out %1, %2" "\n\t"
3640  "nop" "\n\t"
3641  "nop" "\n\t"
3642  "nop" "\n\t"
3643  "nop" "\n\t"
3644  "nop" "\n\t"
3645  "nop" "\n\t"
3646  "nop" "\n\t"
3647  "nop" "\n\t"
3648  "L_%=: " "out __SREG__, __tmp_reg__"
3649  : /* no outputs */
3650  :"d" (__x),
3651  "I" (_SFR_IO_ADDR(XDIV)),
3652  "d" (__tmp)
3653  : "r0");
3654  }
3655 }
3656 
3657 static __inline__ clock_div_t clock_prescale_get(void) __attribute__((__always_inline__));
3658 
3659 clock_div_t clock_prescale_get(void)
3660 {
3661  if(bit_is_clear(XDIV, XDIVEN))
3662  {
3663  return 1;
3664  }
3665  else
3666  {
3667  return (clock_div_t)(129 - (XDIV & 0x7F));
3668  }
3669 }
3670 
3671 #endif
3672 
3673 #endif /* _AVR_POWER_H_ */
#define bit_is_clear(sfr, bit)
Definition: sfr_defs.h:245
unsigned char uint8_t
Definition: stdint.h:79
#define _BV(bit)
Definition: sfr_defs.h:208

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