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8.5.9 MOSFET Models (NMOS/PMOS)

MOSFET models are the central part of NGSPICE, probably because they are the most widely used devices in the electronics world. NGSPICE provides all the MOSFETs implemented in the original Spice3f and adds several models developed by Berkeley's Device Group and other independent groups. Not all models below are included in the standard NGSPICE distribution because of copyright restrictions.

NGSPICE provides four MOSFET device models, which differ in the formulation of the I-V characteristic. The variable LEVEL specifies the model to be used:

LEVEL Model Notes
1 Shichman-Hodges The classical model
2 MOS2 Described in [2]
3 MOS3 A semi-empirical model (see [1])
4 BSIM Described in [3]
5 BSIM2 Described in [5]
6 MOS6 Described in [2]
8 BSIM3 Described in [13]
9 MOS9 n/a
10 B3SOI n/a
14 BSIM4 n/a
17 HiSIM1 n/a
29 B3SOIPD n/a
30 B3SOIFD n/a
31 B3SOIDD n/a
14 BSIM4 n/a
44 EKV n/a
49 BSIM3v1s n/a (Serban Version)
50 BSIM3v1 n/a (Berkeley Version)
51 BSIM3v1a n/a (Alan Version)
52 BSIM3v0 n/a (Berkeley Version)
62 STAG n/a

Level 44 model (EKV) is not available in the standard distribution since it is not released in source form. To obtain the code please refer to the EKV group home page.

The dc characteristics of the level 1 through level 3 MOSFETs are defined by the device parameters VTO, KP, LAMBDA, PHI and GAMMA. These parameters are computed by NGSPICE if process parameters (NSUB, TOX, ...) are given, but users specified values always override. VTO is positive (negative) for enhancement mode and negative (positive) for depletion mode N-channel (P-channel) devices. Charge storage is modelled by three constant capacitors, CGSO, CGDO, and CGBO which represent overlap capacitances, by the nonlinear thin-oxide capacitance which is distributed among the gate, source, drain, and bulk regions, and by the nonlinear depletion-layer capacitances for both substrate junctions divided into bottom and periphery, which vary as the MJ and MJSW power of junction voltage respectively, and are determined by the parameters CBD, CBS, CJ, CJSW, MJ, MJSW and PB. Charge storage effects are modelled by the piecewise linear voltages-dependent capacitance model proposed by Meyer. The thin-oxide charge-storage effects are treated slightly different for the LEVEL=1 model. These voltage-dependent capacitances are included only if TOX is specified in the input description and they are represented using Meyer's formulation.

There is some overlap among the parameters describing the junctions, e.g. the reverse current can be input either as IS (in A) or as JS (in A/m^2). Whereas the first is an absolute value the second is multiplied by AD and AS to give the reverse current of the drain and source junctions respectively. This methodology has been chosen since there is no sense in relating always junction characteristics with AD and AS entered on the device line; the areas can be defaulted. The same idea applies also to the zero-bias junction capacitances CBD and CBS (in F) on one hand, and CJ (in F/m^2) on the other. The parasitic drain and source series resistance can be expressed as either RD and RS (in ohms) or RSH (in ohms/sq.), the latter being multiplied by the number of squares NRD and NRS input on the device line.

A discontinuity in the MOS level 3 model with respect to the KAPPA parameter has been detected (see [10]). The supplied fix has been implemented in Spice3f2 and later. Since this fix may affect parameter fitting, the option "BADMOS3" may be set to use the old implementation (see the section on simulation variables and the ".OPTIONS" line). NGSPICE level 1, 2, 3 and 6 parameters:

name parameter units default example
LEVEL model index - 1
VTO zero-bias threshold voltage (V_T0) V 0.0 1.0
KP transconductance parameter A/V^2 2.0e-5 3.1e-5
GAMMA bulk threshold parameter V^1/2 0.0 0.37
PHI surface potential (U) V 0.6 0.65
LAMBDA channel-length modulation (MOS1 and MOS2 only) (L) 1/V 0.0 0.02
RD drain ohmic resistance Z 0.0 1.0
RS source ohmic resistance Z 0.0 1.0
CBD zero-bias B-D junction capacitance F 0.0 20fF
CBS zero-bias B-S junction capacitance F 0.0 20fF
IS bulk junction saturation current (I_S) A 1.0e-14 1.0e-15
PB bulk junction potential V 0.8 0.87
CGSO gate-source overlap capacitance per meter channel width F/m 0.0 4.0e-11
CGDO gate-drain overlap capacitance per meter channel width F/m 0.0 4.0e-11
CGBO gate-bulk overlap capacitance per meter channel length F/m 0.0 2.0e-10
RSH drain and source diffusion sheet resistance Z/[] 0.0 10.0
CJ zero-bias bulk junction bottom cap. per sq-meter of junction area F/m^2 0.0 2.0e-4
MJ bulk junction bottom grading coeff. - 0.5 0.5
CJSW zero-bias bulk junction sidewall cap. per meter of junction perimeter F/m 0.0 1.0e-9
MJSW bulk junction sidewall grading coeff. - 0.50(level1), 0.33(level2, 3)
JS bulk junction saturation current per sq-meter of junction area A/m^2 1.0e-8
TOX oxide thickness meter 1.0e-7 1.0e-7
NSUB substrate doping 1/cm^3 0.0 4.0e15
NSS surface state density 1/cm^2 0.0 1.0e10
NFS fast surface state density 1/cm^2 0.0 1.0e10
TPG type of gate material: +1 opp. to substrate, -1 same as substrate, 0 Al gate - 1.0
XJ metallurgical junction depth meter 0.0 1M
LD lateral diffusion meter 0.0 0.8M
UO surface mobility cm^2/Vs 600 700
UCRIT critical field for mobility degradation (MOS2 only) V/cm 1.0e4 1.0e4
UEXP critical field exponent in mobility degradation (MOS2 only) - 0.0 0.1
UTRA transverse field coeff. (mobility) (deleted for MOS2) - 0.0 0.3
VMAX maximum drift velocity of carriers m/s 0.0 5.0e4
NEFF total channel-charge (fixed and mobile) coefficient (MOS2 only) - 1.0 5.0
KF flicker noise coefficient - 0.0 1.0e-26
AF flicker noise exponent - 1.0 1.2
FC coefficient for forward-bias depletion capacitance formula - 0.5
DELTA width effect on threshold voltage (MOS2 and MOS3) - 0.0 1.0
THETA mobility modulation (MOS3 only) 1/V 0.0 0.1
ETA static feedback (MOS3 only) - 0.0 1.0
KAPPA saturation field factor (MOS3 only) - 0.2 0.5
TNOM parameter measurement temperature ^oC 27 50

The level 3 model available into ngspice takes into account length and width mask adjustments (xl and xw) and device width narrowing due to diffusion (wd).

The level 4 and level 5 (BSIM1 and BSIM2) parameters are all values obtained from process characterization, and can be generated automatically. J. Pierret [4] describes a means of generating a 'process' file, and the program Proc2Mod provided with NGSPICE converts this file into a sequence of BSIM1 ".MODEL" lines suitable for inclusion in a NGSPICE input file. Parameters marked below with an * in the l/w column also have corresponding parameters with a length and width dependency. For example, VFB is the basic parameter with units of Volts, and LVFB and WVFB also exist and have units of Volt-Mmeter The formula

                           P            P
                            L            W
              P = P  + ---------- + ----------
                   0
                       L            W
                        effective    effective

is used to evaluate the parameter for the actual device specified with

                  L          = L      - DL
                   effective    input

and

                  W          = W      - DW
                   effective    input

Note that unlike the other models in NGSPICE, the BSIM model is designed for use with a process characterization system that provides all the parameters, thus there are no defaults for the parameters, and leaving one out is considered an error. For an example set of parameters and the format of a process file, see the SPICE2 implementation notes[3].

For more information on BSIM2, see reference [5].

NGSPICE BSIM (level 4) parameters.

name parameter units l/w
VFB flat-band voltage V *
PHI surface inversion potential V *
K1 body effect coefficient V^(1/2) *
K2 drain/source depletion charge-sharing coefficient - *
ETA zero-bias drain-induced barrier-lowering coefficient - *
MUZ zero-bias mobility cm^2/V-s
DL shortening of channel Mm
DW narrowing of channel Mm
U0 zero-bias transverse-field mobility degradation coefficient V^-1 *
U1 zero-bias velocity saturation coefficient Mm/V *
X2MZ sens. of mobility to substrate bias at V_ds=0 cm^2/V-s *
X2E sens. of drain-induced barrier lowering effect to substrate bias V^-1 *
X3E sens. of drain-induced barrier lowering effect to drain bias at V_ds=V_dd V^-1 *
X2U0 sens. of transverse field mobility degradation effect to substrate bias V^2 *
X2U1 sens. of velocity saturation effect to substrate bias MmV^2 *
MUS mobility at zero substrate bias and at V_ds=V_dd cm^2/V^2-s
X2MS sens. of mobility to substrate bias at V_ds=V_dd cm^2/V^2-s *
X3MS sens. of mobility to drain bias at V_ds=V_dd cm^2/V^2-s *
X3U1 sens. of velocity saturation effect on drain bias at V_ds=V_dd MmV^2 *
TOX gate oxide thickness Mm
TEMP temperature at which parameters were measured C
VDD measurement bias range V
CGDO gate-drain overlap capacitance per meter channel width F/m
CGSO gate-source overlap capacitance per meter channel width F/m
CGBO gate-bulk overlap capacitance per meter channel length F/m
XPART gate-oxide capacitance-charge model flag -
N0 zero-bias subthreshold slope coefficient - *
NB sens. of subthreshold slope to substrate bias - *
ND sens. of subthreshold slope to drain bias - *
RSH drain and source diffusion sheet resistance Z/[]
JS source drain junction current density A/m^2
PB built in potential of source drain junction V
MJ Grading coefficient of source drain junction -
BSW built in potential of source, drain junction sidewall V
MJSW grading coefficient of source drain junction sidewall -
CJ Source drain junction capacitance per unit area F/m^2
CJSW source drain junction sidewall capacitance per unit length F/m
WDF source drain junction default width m
DELL Source drain junction length reduction m

XPART = 0 selects a 40/60 drain/source charge partition in saturation, while XPART=1 selects a 0/100 drain/source charge partition.

ND, NG, and NS are the drain, gate, and source nodes, respectively. MNAME is the model name, AREA is the area factor, and OFF indicates an (optional) initial condition on the device for dc analysis. If the area factor is omitted, a value of 1.0 is assumed. The (optional) initial condition specification, using IC=VDS, VGS is intended for use with the UIC option on the .TRAN control line, when a transient analysis is desired starting from other than the quiescent operating point. See the .IC control line for a better way to set initial conditions.